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drm/nouveau/pm/gf100: add compute signals/sources

Browse source 
These signals and sources have been reverse engineered from CUPTI
(Linux). Graphics signals exposed by PerfKit (Windows only) will be
added later. I need to reverse engineer them and it's a bit painful.

This commit also adds a new class for GF108 and GF117.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
This commit is contained in:
Samuel Pitoiset 2015-06-14 13:33:55 +02:00 committed by Ben Skeggs
parent 060f50e3b1
commit 94a2ef69aa
7 changed files with 282 additions and 5 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

2
drivers/gpu/drm/nouveau/include/nvkm/engine/pm.h
View file

@ -27,6 +27,8 @@ extern struct nvkm_oclass *g84_pm_oclass;
extern struct nvkm_oclass *gt200_pm_oclass;
extern struct nvkm_oclass *gt215_pm_oclass;
extern struct nvkm_oclass *gf100_pm_oclass;
extern struct nvkm_oclass *gf108_pm_oclass;
extern struct nvkm_oclass *gf117_pm_oclass;
extern struct nvkm_oclass gk104_pm_oclass;
extern struct nvkm_oclass gk110_pm_oclass;
#endif

6
drivers/gpu/drm/nouveau/nvkm/engine/device/gf100.c
View file

@ -252,7 +252,7 @@ gf100_identify(struct nvkm_device *device)
device->oclass[NVDEV_ENGINE_MSPPP ] = &gf100_msppp_oclass;
device->oclass[NVDEV_ENGINE_CE0 ] = &gf100_ce0_oclass;
device->oclass[NVDEV_ENGINE_DISP ] = gt215_disp_oclass;
device->oclass[NVDEV_ENGINE_PM ] = gf100_pm_oclass;
device->oclass[NVDEV_ENGINE_PM ] = gf108_pm_oclass;
break;
case 0xc8:
device->cname = "GF110";
@ -317,7 +317,7 @@ gf100_identify(struct nvkm_device *device)
device->oclass[NVDEV_ENGINE_MSPPP ] = &gf100_msppp_oclass;
device->oclass[NVDEV_ENGINE_CE0 ] = &gf100_ce0_oclass;
device->oclass[NVDEV_ENGINE_DISP ] = gf110_disp_oclass;
device->oclass[NVDEV_ENGINE_PM ] = gf100_pm_oclass;
device->oclass[NVDEV_ENGINE_PM ] = gf117_pm_oclass;
break;
case 0xd7:
device->cname = "GF117";
@ -347,7 +347,7 @@ gf100_identify(struct nvkm_device *device)
device->oclass[NVDEV_ENGINE_MSPPP ] = &gf100_msppp_oclass;
device->oclass[NVDEV_ENGINE_CE0 ] = &gf100_ce0_oclass;
device->oclass[NVDEV_ENGINE_DISP ] = gf110_disp_oclass;
device->oclass[NVDEV_ENGINE_PM ] = gf100_pm_oclass;
device->oclass[NVDEV_ENGINE_PM ] = gf117_pm_oclass;
break;
default:
nv_fatal(device, "unknown Fermi chipset\n");

2
drivers/gpu/drm/nouveau/nvkm/engine/pm/Kbuild
View file

@ -5,5 +5,7 @@ nvkm-y += nvkm/engine/pm/g84.o
nvkm-y += nvkm/engine/pm/gt200.o
nvkm-y += nvkm/engine/pm/gt215.o
nvkm-y += nvkm/engine/pm/gf100.o
nvkm-y += nvkm/engine/pm/gf108.o
nvkm-y += nvkm/engine/pm/gf117.o
nvkm-y += nvkm/engine/pm/gk104.o
nvkm-y += nvkm/engine/pm/gk110.o

96
drivers/gpu/drm/nouveau/nvkm/engine/pm/gf100.c
View file

@ -23,18 +23,110 @@
*/
#include "gf100.h"
const struct nvkm_specsrc
gf100_pmfb_sources[] = {
{ 0x140028, (const struct nvkm_specmux[]) {
{ 0x3fff, 0, "unk0" },
{ 0x7, 16, "unk16" },
{ 0x3, 24, "unk24" },
{ 0x2, 29, "unk29" },
{}
}, "pmfb0_pm_unk28" },
{}
};
static const struct nvkm_specsrc
gf100_l1_sources[] = {
{ 0x5044a8, (const struct nvkm_specmux[]) {
{ 0x3f, 0, "sel", true },
{}
}, "pgraph_gpc0_tpc0_l1_pm_mux" },
{}
};
static const struct nvkm_specsrc
gf100_pbfb_sources[] = {
{ 0x10f100, (const struct nvkm_specmux[]) {
{ 0x1, 0, "unk0" },
{ 0xf, 4, "unk4" },
{ 0x3, 8, "unk8" },
{}
}, "pbfb_broadcast_pm_unk100" },
{}
};
static const struct nvkm_specsrc
gf100_tex_sources[] = {
{ 0x5042c0, (const struct nvkm_specmux[]) {
{ 0xf, 0, "sel0", true },
{ 0x7, 8, "sel1", true },
{}
}, "pgraph_gpc0_tpc0_tex_pm_mux_c_d" },
{ 0x5042c8, (const struct nvkm_specmux[]) {
{ 0x1f, 0, "sel", true },
{}
}, "pgraph_gpc0_tpc0_tex_pm_unkc8" },
{}
};
static const struct nvkm_specsrc
gf100_unk400_sources[] = {
{ 0x50440c, (const struct nvkm_specmux[]) {
{ 0x3f, 0, "sel", true },
{}
}, "pgraph_gpc0_tpc0_unk400_pm_mux" },
{}
};
static const struct nvkm_specdom
gf100_pm_hub[] = {
{}
};
static const struct nvkm_specdom
const struct nvkm_specdom
gf100_pm_gpc[] = {
{ 0xe0, (const struct nvkm_specsig[]) {
{ 0x00, "gpc00_l1_00", gf100_l1_sources },
{ 0x01, "gpc00_l1_01", gf100_l1_sources },
{ 0x02, "gpc00_l1_02", gf100_l1_sources },
{ 0x03, "gpc00_l1_03", gf100_l1_sources },
{ 0x05, "gpc00_l1_04", gf100_l1_sources },
{ 0x06, "gpc00_l1_05", gf100_l1_sources },
{ 0x0a, "gpc00_tex_00", gf100_tex_sources },
{ 0x0b, "gpc00_tex_01", gf100_tex_sources },
{ 0x0c, "gpc00_tex_02", gf100_tex_sources },
{ 0x0d, "gpc00_tex_03", gf100_tex_sources },
{ 0x0e, "gpc00_tex_04", gf100_tex_sources },
{ 0x0e, "gpc00_tex_05", gf100_tex_sources },
{ 0x0f, "gpc00_tex_06", gf100_tex_sources },
{ 0x10, "gpc00_tex_07", gf100_tex_sources },
{ 0x11, "gpc00_tex_08", gf100_tex_sources },
{ 0x12, "gpc00_tex_09", gf100_tex_sources },
{ 0x26, "gpc00_unk400_00", gf100_unk400_sources },
{}
}, &gf100_perfctr_func },
{}
};
static const struct nvkm_specdom
const struct nvkm_specdom
gf100_pm_part[] = {
{ 0xe0, (const struct nvkm_specsig[]) {
{ 0x0f, "part00_pbfb_00", gf100_pbfb_sources },
{ 0x10, "part00_pbfb_01", gf100_pbfb_sources },
{ 0x21, "part00_pmfb_00", gf100_pmfb_sources },
{ 0x04, "part00_pmfb_01", gf100_pmfb_sources },
{ 0x00, "part00_pmfb_02", gf100_pmfb_sources },
{ 0x02, "part00_pmfb_03", gf100_pmfb_sources },
{ 0x01, "part00_pmfb_04", gf100_pmfb_sources },
{ 0x2e, "part00_pmfb_05", gf100_pmfb_sources },
{ 0x2f, "part00_pmfb_06", gf100_pmfb_sources },
{ 0x1b, "part00_pmfb_07", gf100_pmfb_sources },
{ 0x1c, "part00_pmfb_08", gf100_pmfb_sources },
{ 0x1d, "part00_pmfb_09", gf100_pmfb_sources },
{ 0x1e, "part00_pmfb_0a", gf100_pmfb_sources },
{ 0x1f, "part00_pmfb_0b", gf100_pmfb_sources },
{}
}, &gf100_perfctr_func },
{}
};

5
drivers/gpu/drm/nouveau/nvkm/engine/pm/gf100.h
View file

@ -23,4 +23,9 @@ struct gf100_pm_cntr {
extern const struct nvkm_funcdom gf100_perfctr_func;
int gf100_pm_fini(struct nvkm_object *, bool);
extern const struct nvkm_specdom gf100_pm_gpc[];
extern const struct nvkm_specsrc gf100_pmfb_sources[];
#endif

84
drivers/gpu/drm/nouveau/nvkm/engine/pm/gf108.c Normal file
View file

@ -0,0 +1,84 @@
/*
* Copyright 2015 Samuel Pitoiset
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*
* Authors: Samuel Pitoiset
*/
#include "gf100.h"
static const struct nvkm_specsrc
gf108_pbfb_sources[] = {
{ 0x110100, (const struct nvkm_specmux[]) {
{ 0x1, 0, "unk0" },
{ 0xf, 4, "unk4" },
{ 0x3, 8, "unk8" },
{}
}, "pbfb0_pm_unk100" },
{ 0x111100, (const struct nvkm_specmux[]) {
{ 0x1, 0, "unk0" },
{ 0xf, 4, "unk4" },
{ 0x3, 8, "unk8" },
{}
}, "pbfb1_pm_unk100" },
{}
};
static const struct nvkm_specdom
gf108_pm_hub[] = {
{}
};
static const struct nvkm_specdom
gf108_pm_part[] = {
{ 0xe0, (const struct nvkm_specsig[]) {
{ 0x14, "part00_pbfb_00", gf108_pbfb_sources },
{ 0x15, "part00_pbfb_01", gf108_pbfb_sources },
{ 0x20, "part00_pbfb_02", gf108_pbfb_sources },
{ 0x21, "part00_pbfb_03", gf108_pbfb_sources },
{ 0x01, "part00_pmfb_00", gf100_pmfb_sources },
{ 0x04, "part00_pmfb_01", gf100_pmfb_sources },
{ 0x05, "part00_pmfb_02", gf100_pmfb_sources},
{ 0x07, "part00_pmfb_03", gf100_pmfb_sources },
{ 0x0d, "part00_pmfb_04", gf100_pmfb_sources },
{ 0x12, "part00_pmfb_05", gf100_pmfb_sources },
{ 0x13, "part00_pmfb_06", gf100_pmfb_sources },
{ 0x2c, "part00_pmfb_07", gf100_pmfb_sources },
{ 0x2d, "part00_pmfb_08", gf100_pmfb_sources },
{ 0x2e, "part00_pmfb_09", gf100_pmfb_sources },
{ 0x2f, "part00_pmfb_0a", gf100_pmfb_sources },
{ 0x30, "part00_pmfb_0b", gf100_pmfb_sources },
{}
}, &gf100_perfctr_func },
{}
};
struct nvkm_oclass *
gf108_pm_oclass = &(struct gf100_pm_oclass) {
.base.handle = NV_ENGINE(PM, 0xc1),
.base.ofuncs = &(struct nvkm_ofuncs) {
.ctor = gf100_pm_ctor,
.dtor = _nvkm_pm_dtor,
.init = _nvkm_pm_init,
.fini = gf100_pm_fini,
},
.doms_hub = gf108_pm_hub,
.doms_gpc = gf100_pm_gpc,
.doms_part = gf108_pm_part,
}.base;

92
drivers/gpu/drm/nouveau/nvkm/engine/pm/gf117.c Normal file
View file

@ -0,0 +1,92 @@
/*
* Copyright 2015 Samuel Pitoiset
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*
* Authors: Samuel Pitoiset
*/
#include "gf100.h"
static const struct nvkm_specsrc
gf117_pmfb_sources[] = {
{ 0x140028, (const struct nvkm_specmux[]) {
{ 0x3fff, 0, "unk0" },
{ 0x7, 16, "unk16" },
{ 0x3, 24, "unk24" },
{ 0x2, 28, "unk28" },
{}
}, "pmfb0_pm_unk28" },
{ 0x14125c, (const struct nvkm_specmux[]) {
{ 0x3fff, 0, "unk0" },
{}
}, "pmfb0_subp0_pm_unk25c" },
{}
};
static const struct nvkm_specsrc
gf117_pbfb_sources[] = {
{ 0x110100, (const struct nvkm_specmux[]) {
{ 0x1, 0, "unk0" },
{ 0xf, 4, "unk4" },
{ 0x3, 8, "unk8" },
{}
}, "pbfb0_pm_unk100" },
{}
};
static const struct nvkm_specdom
gf117_pm_hub[] = {
{}
};
static const struct nvkm_specdom
gf117_pm_part[] = {
{ 0xe0, (const struct nvkm_specsig[]) {
{ 0x00, "part00_pbfb_00", gf117_pbfb_sources },
{ 0x01, "part00_pbfb_01", gf117_pbfb_sources },
{ 0x12, "part00_pmfb_00", gf117_pmfb_sources },
{ 0x15, "part00_pmfb_01", gf117_pmfb_sources },
{ 0x16, "part00_pmfb_02", gf117_pmfb_sources },
{ 0x18, "part00_pmfb_03", gf117_pmfb_sources },
{ 0x1e, "part00_pmfb_04", gf117_pmfb_sources },
{ 0x23, "part00_pmfb_05", gf117_pmfb_sources },
{ 0x24, "part00_pmfb_06", gf117_pmfb_sources },
{ 0x0c, "part00_pmfb_07", gf117_pmfb_sources },
{ 0x0d, "part00_pmfb_08", gf117_pmfb_sources },
{ 0x0e, "part00_pmfb_09", gf117_pmfb_sources },
{ 0x0f, "part00_pmfb_0a", gf117_pmfb_sources },
{ 0x10, "part00_pmfb_0b", gf117_pmfb_sources },
{}
}, &gf100_perfctr_func },
{}
};
struct nvkm_oclass *
gf117_pm_oclass = &(struct gf100_pm_oclass) {
.base.handle = NV_ENGINE(PM, 0xd7),
.base.ofuncs = &(struct nvkm_ofuncs) {
.ctor = gf100_pm_ctor,
.dtor = _nvkm_pm_dtor,
.init = _nvkm_pm_init,
.fini = gf100_pm_fini,
},
.doms_gpc = gf100_pm_gpc,
.doms_hub = gf117_pm_hub,
.doms_part = gf117_pm_part,
}.base;