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OMAP: DSS2: Handle dpll4_m4_ck in dss_get/put_clocks
Get and put for dpll4_m4_ck was handled in dss_init/dss_exit. Move the code to dss_get/put_clocks(), which is a better place to handle it. Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
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parent
5ed8cf5b8e
commit
94c042ce58
1 changed files with 26 additions and 26 deletions
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@ -669,7 +669,6 @@ static int dss_init(void)
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int r;
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u32 rev;
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struct resource *dss_mem;
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struct clk *dpll4_m4_ck;
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dss_mem = platform_get_resource(dss.pdev, IORESOURCE_MEM, 0);
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if (!dss_mem) {
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@ -715,26 +714,6 @@ static int dss_init(void)
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REG_FLD_MOD(DSS_CONTROL, 1, 3, 3); /* venc clock 4x enable */
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REG_FLD_MOD(DSS_CONTROL, 0, 2, 2); /* venc clock mode = normal */
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#endif
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if (cpu_is_omap34xx()) {
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dpll4_m4_ck = clk_get(NULL, "dpll4_m4_ck");
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if (IS_ERR(dpll4_m4_ck)) {
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DSSERR("Failed to get dpll4_m4_ck\n");
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r = PTR_ERR(dpll4_m4_ck);
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goto fail1;
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}
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} else if (cpu_is_omap44xx()) {
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dpll4_m4_ck = clk_get(NULL, "dpll_per_m5x2_ck");
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if (IS_ERR(dpll4_m4_ck)) {
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DSSERR("Failed to get dpll4_m4_ck\n");
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r = PTR_ERR(dpll4_m4_ck);
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goto fail1;
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}
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} else { /* omap24xx */
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dpll4_m4_ck = NULL;
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}
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dss.dpll4_m4_ck = dpll4_m4_ck;
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dss.dsi_clk_source[0] = OMAP_DSS_CLK_SRC_FCK;
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dss.dsi_clk_source[1] = OMAP_DSS_CLK_SRC_FCK;
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dss.dispc_clk_source = OMAP_DSS_CLK_SRC_FCK;
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@ -749,17 +728,12 @@ static int dss_init(void)
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return 0;
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fail1:
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iounmap(dss.base);
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fail0:
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return r;
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}
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static void dss_exit(void)
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{
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if (dss.dpll4_m4_ck)
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clk_put(dss.dpll4_m4_ck);
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iounmap(dss.base);
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}
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@ -845,6 +819,7 @@ static int dss_get_clock(struct clk **clock, const char *clk_name)
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static int dss_get_clocks(void)
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{
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int r;
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struct clk *dpll4_m4_ck;
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struct omap_display_platform_data *pdata = dss.pdev->dev.platform_data;
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dss.dss_ick = NULL;
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@ -884,6 +859,27 @@ static int dss_get_clocks(void)
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goto err;
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}
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if (cpu_is_omap34xx()) {
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dpll4_m4_ck = clk_get(NULL, "dpll4_m4_ck");
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if (IS_ERR(dpll4_m4_ck)) {
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DSSERR("Failed to get dpll4_m4_ck\n");
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r = PTR_ERR(dpll4_m4_ck);
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goto err;
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}
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} else if (cpu_is_omap44xx()) {
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dpll4_m4_ck = clk_get(NULL, "dpll_per_m5x2_ck");
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if (IS_ERR(dpll4_m4_ck)) {
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DSSERR("Failed to get dpll_per_m5x2_ck\n");
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r = PTR_ERR(dpll4_m4_ck);
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goto err;
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}
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} else { /* omap24xx */
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dpll4_m4_ck = NULL;
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}
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dss.dpll4_m4_ck = dpll4_m4_ck;
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return 0;
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err:
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@ -897,12 +893,16 @@ static int dss_get_clocks(void)
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clk_put(dss.dss_tv_fck);
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if (dss.dss_video_fck)
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clk_put(dss.dss_video_fck);
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if (dss.dpll4_m4_ck)
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clk_put(dss.dpll4_m4_ck);
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return r;
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}
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static void dss_put_clocks(void)
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{
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if (dss.dpll4_m4_ck)
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clk_put(dss.dpll4_m4_ck);
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if (dss.dss_video_fck)
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clk_put(dss.dss_video_fck);
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if (dss.dss_tv_fck)
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