mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
synced 2024-09-26 04:16:39 +00:00
SoC: DT changes for 6.3
About a quarter of the changes are for 32-bit arm, mostly filling in device support for existing machines and adding minor cleanups, mostly for Qualcomm and Samsung based machines. Two new 32-bit SoCs are added, both are quad-core Cortex-A7 chips from Rockchips that have been around for a while but were lacking kernel support so far: RV1126 is a Vision SoC with an NPU and is used in the Edgeble Neural Compute Module 2(Neu2) board, while RK3128 is design for TV boxes and so far only comes with a dts for its refernece design. The other 32-bit boards that were added are two ASpeed AST2600 based BMC boards, the Microchip sam9x60_curiosity development board (Armv5 based!), the Enclustra PE1 FPGA-SoM baseboard, and a few more boards for i.MX53 and i.MX6ULL. On the RISC-V side, there are fewer patches, but a total of ten new single-board computers based on variations of the Allwinner D1/T113 chip, plus one more board based on Microchip Polarfire. As usual, arm64 has by far the most changes here, with over 700 non-merge changesets, among them over 400 alone for Qualcomm. The newly added SoCs this time are all recent high-end embedded SoCs for various markets, each on comes with support for its reference board: - Qualcomm SM8550 (Snapdragon 8 Gen 2) for mobile phones - Qualcomm QDU1000/QRU1000 5G RAN platform - Rockchips RK3588/RK3588s for tablets, chromebooks and SBCs - TI J784S4 for industrial and automotive applications In total, there are 46 new arm64 machines: - Reference platforms for each of the five new SoCs - Three Amlogic based development boards - Six embedded machines based on NXP i.MX8MM and i.MX8MP - The Mediatek mt7986a based Banana Pi R3 router - Six tablets based on Qualcomm MSM8916 (Snapdragon 410), SM6115 (Snapdragon 662) and SM8250 (Snapdragon 865) - Two LTE dongles, also based on MSM8916 - Seven mobile phones, based on Qualcomm MSM8953 (Snapdragon 610), SDM450 and SDM632 - Three chromebooks based on Qualcomm SC7280 (Snapdragon 7c) - Nine development boards based on Rockchips RK3588, RK3568, RK3566 and RK3328. - Five development machines based on TI K3 (AM642/AM654/AM68/AM69) The cleanup of dtc warnings continues across all platforms, adding to the total number of changes. -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmPvpVYACgkQmmx57+YA GNm3iA/+NgaiEgwxaot1eoBqKImyP6NtC9VHFYRbscVkaBEkdNpm2zeVX92E2/8d dZuGiOqY5VC+e53Rbig6m0GLrctYJfZTdJ0tYih8cwkB0jVL6bHzFQE1ugZkXkQC /dXx2ozNQD1XqfgXqi7OC2PeaBqBxOK4UFrhUvjfzR68GuZmWpdC4+1mdIs106D1 252vV3y3biMDKXg1SgTXc4t8nb/ZT69gJpgJdbNuypDcAVrqlLaQZQ1sdEUu2wsh 6XnBZKe8srkFFwN+eR0Tdf9MhneUFJxLQsAajAm4WN1QiGrqtU42mrpJE80b6Uic wnkvgwfyGVeGivM4/bAkeug5dCiElzCiwQBCKzL95ucf75Z8SfmhFAVAqji/MFBF yzfetUld975qI0Bw6zh9dJALz6hElZAbbvcGI1imlXjVIsOwINvCoB5r3YPJw7FR 2nhJrsXs8h37VZgkeTlMp5BMu9j0AQKoBL4zbOSdrDr+XuOvuzIez+8ashFLijvu FO+qlXfHUC7WsR6wktVumCsADnVRPJZN0UeMhSFixceD/njVaRZBk3BOY5Ea9wjm G0s3KpqnLgEMrjDW3FLBf8xb9qEQPBAyeYUL9d0MHByz8W7iI/dQjEie0UEzmCqI J+cDdhMCKDNYOF0Xk8d9k2g5/p62/0akmncOBCZRJf9bMHklBWY= =I8Ga -----END PGP SIGNATURE----- Merge tag 'soc-dt-6.3' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc Pull SoC DT updates from Arnd Bergmann: "About a quarter of the changes are for 32-bit arm, mostly filling in device support for existing machines and adding minor cleanups, mostly for Qualcomm and Samsung based machines. Two new 32-bit SoCs are added, both are quad-core Cortex-A7 chips from Rockchips that have been around for a while but were lacking kernel support so far: RV1126 is a Vision SoC with an NPU and is used in the Edgeble Neural Compute Module 2(Neu2) board, while RK3128 is design for TV boxes and so far only comes with a dts for its refernece design. The other 32-bit boards that were added are two ASpeed AST2600 based BMC boards, the Microchip sam9x60_curiosity development board (Armv5 based!), the Enclustra PE1 FPGA-SoM baseboard, and a few more boards for i.MX53 and i.MX6ULL. On the RISC-V side, there are fewer patches, but a total of ten new single-board computers based on variations of the Allwinner D1/T113 chip, plus one more board based on Microchip Polarfire. As usual, arm64 has by far the most changes here, with over 700 non-merge changesets, among them over 400 alone for Qualcomm. The newly added SoCs this time are all recent high-end embedded SoCs for various markets, each on comes with support for its reference board: - Qualcomm SM8550 (Snapdragon 8 Gen 2) for mobile phones - Qualcomm QDU1000/QRU1000 5G RAN platform - Rockchips RK3588/RK3588s for tablets, chromebooks and SBCs - TI J784S4 for industrial and automotive applications In total, there are 46 new arm64 machines: - Reference platforms for each of the five new SoCs - Three Amlogic based development boards - Six embedded machines based on NXP i.MX8MM and i.MX8MP - The Mediatek mt7986a based Banana Pi R3 router - Six tablets based on Qualcomm MSM8916 (Snapdragon 410), SM6115 (Snapdragon 662) and SM8250 (Snapdragon 865) - Two LTE dongles, also based on MSM8916 - Seven mobile phones, based on Qualcomm MSM8953 (Snapdragon 610), SDM450 and SDM632 - Three chromebooks based on Qualcomm SC7280 (Snapdragon 7c) - Nine development boards based on Rockchips RK3588, RK3568, RK3566 and RK3328. - Five development machines based on TI K3 (AM642/AM654/AM68/AM69) The cleanup of dtc warnings continues across all platforms, adding to the total number of changes" * tag 'soc-dt-6.3' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (1035 commits) dt-bindings: riscv: correct starfive visionfive 2 compatibles ARM: dts: socfpga: Add enclustra PE1 devicetree dt-bindings: altera: Add enclustra mercury PE1 arm64: dts: qcom: msm8996: align RPM G-Link clock-controller node with bindings arm64: dts: qcom: qcs404: align RPM G-Link node with bindings arm64: dts: qcom: ipq6018: align RPM G-Link node with bindings arm64: dts: qcom: sm8550: remove invalid interconnect property from cryptobam arm64: dts: qcom: sc7280: Adjust zombie PWM frequency arm64: dts: qcom: sc8280xp-pmics: Specify interrupt parent explicitly arm64: dts: qcom: sm7225-fairphone-fp4: enable remaining i2c busses arm64: dts: qcom: sm7225-fairphone-fp4: move status property down arm64: dts: qcom: pmk8350: Use the correct PON compatible arm64: dts: qcom: sc8280xp-x13s: Enable external display arm64: dts: qcom: sc8280xp-crd: Introduce pmic_glink arm64: dts: qcom: sc8280xp: Add USB-C-related DP blocks arm64: dts: qcom: sm8350-hdk: enable GPU arm64: dts: qcom: sm8350: add GPU, GMU, GPU CC and SMMU nodes arm64: dts: qcom: sm8350: finish reordering nodes arm64: dts: qcom: sm8350: move more nodes to correct place arm64: dts: qcom: sm8350: reorder device nodes ...
This commit is contained in:
commit
950b6662e2
882 changed files with 77246 additions and 18635 deletions
|
@ -31,6 +31,7 @@ properties:
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|||
- description: Mercury+ AA1 boards
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||||
items:
|
||||
- enum:
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||||
- enclustra,mercury-pe1
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||||
- google,chameleon-v3
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- const: enclustra,mercury-aa1
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||||
- const: altr,socfpga-arria10
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||||
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@ -154,6 +154,7 @@ properties:
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|||
items:
|
||||
- enum:
|
||||
- khadas,vim3
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||||
- radxa,zero2
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- const: amlogic,a311d
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- const: amlogic,g12b
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||||
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@ -165,6 +166,7 @@ properties:
|
|||
- azw,gtking-pro
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||||
- hardkernel,odroid-go-ultra
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||||
- hardkernel,odroid-n2
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||||
- hardkernel,odroid-n2l
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||||
- hardkernel,odroid-n2-plus
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- khadas,vim3
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- ugoos,am6
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@ -176,6 +178,7 @@ properties:
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|||
- enum:
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||||
- amediatech,x96-air
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- amediatech,x96-air-gbit
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||||
- bananapi,bpi-m2-pro
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- bananapi,bpi-m5
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- cyx,a95xf3-air
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- cyx,a95xf3-air-gbit
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@ -78,6 +78,7 @@ properties:
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|||
- facebook,cloudripper-bmc
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||||
- facebook,elbert-bmc
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- facebook,fuji-bmc
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||||
- facebook,greatlakes-bmc
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- ibm,everest-bmc
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||||
- ibm,rainier-bmc
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||||
- ibm,tacoma-bmc
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||||
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@ -85,6 +86,7 @@ properties:
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|||
- jabil,rbp-bmc
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||||
- qcom,dc-scm-v1-bmc
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- quanta,s6q-bmc
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- ufispace,ncplite-bmc
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||||
- const: aspeed,ast2600
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||||
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additionalProperties: true
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||||
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@ -91,9 +91,11 @@ properties:
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|||
- const: atmel,sama5d2
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- const: atmel,sama5
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||||
- description: SAM9X60-EK board
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- description: Microchip SAM9X60 Evaluation Boards
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items:
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||||
- const: microchip,sam9x60ek
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||||
- enum:
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||||
- microchip,sam9x60ek
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- microchip,sam9x60-curiosity
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- const: microchip,sam9x60
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- const: atmel,at91sam9
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@ -88,12 +88,56 @@ properties:
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items:
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||||
- enum:
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- armadeus,imx28-apf28 # APF28 SoM
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- armadeus,imx28-apf28dev # APF28 SoM on APF28Dev board
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- bluegiga,apx4devkit # Bluegiga APx4 SoM on dev board
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- crystalfontz,cfa10036 # Crystalfontz CFA-10036 SoM
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- eukrea,mbmx28lc
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- fsl,imx28-evk
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- i2se,duckbill
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- i2se,duckbill-2
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- karo,tx28 # Ka-Ro electronics TX28 module
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- lwn,imx28-xea
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- msr,m28cu3 # M28 SoM with custom base board
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- schulercontrol,imx28-sps1
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- technologic,imx28-ts4600
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- const: fsl,imx28
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||||
|
||||
- description: i.MX28 Aries M28 SoM Board
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items:
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||||
- const: aries,m28
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||||
- const: denx,m28
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- const: fsl,imx28
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||||
|
||||
- description: i.MX28 Aries M28EVK Board
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||||
items:
|
||||
- const: aries,m28evk
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- const: denx,m28evk
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||||
- const: fsl,imx28
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||||
|
||||
- description: i.MX28 Armadeus Systems APF28Dev Board
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||||
items:
|
||||
- const: armadeus,imx28-apf28dev
|
||||
- const: armadeus,imx28-apf28
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||||
- const: fsl,imx28
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||||
|
||||
- description: i.MX28 Crystalfontz CFA-10036 based Boards
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items:
|
||||
- enum:
|
||||
- crystalfontz,cfa10037
|
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- crystalfontz,cfa10049
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- crystalfontz,cfa10057
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||||
- crystalfontz,cfa10058
|
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- const: crystalfontz,cfa10036
|
||||
- const: fsl,imx28
|
||||
|
||||
- description: i.MX28 Crystalfontz CFA-10037 based Boards
|
||||
items:
|
||||
- enum:
|
||||
- crystalfontz,cfa10055
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- crystalfontz,cfa10056
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- const: crystalfontz,cfa10037
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- const: crystalfontz,cfa10036
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||||
- const: fsl,imx28
|
||||
|
||||
- description: i.MX28 Duckbill 2 based Boards
|
||||
items:
|
||||
- enum:
|
||||
|
@ -103,6 +147,19 @@ properties:
|
|||
- const: i2se,duckbill-2
|
||||
- const: fsl,imx28
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||||
|
||||
- description: i.MX28 Eukrea Electromatique MBMX283LC Board
|
||||
items:
|
||||
- const: eukrea,mbmx283lc
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||||
- const: eukrea,mbmx28lc
|
||||
- const: fsl,imx28
|
||||
|
||||
- description: i.MX28 Eukrea Electromatique MBMX287LC Board
|
||||
items:
|
||||
- const: eukrea,mbmx287lc
|
||||
- const: eukrea,mbmx283lc
|
||||
- const: eukrea,mbmx28lc
|
||||
- const: fsl,imx28
|
||||
|
||||
- description: i.MX31 based Boards
|
||||
items:
|
||||
- enum:
|
||||
|
@ -173,6 +230,7 @@ properties:
|
|||
- kiebackpeter,imx53-ddc # K+P imx53 DDC
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||||
- kiebackpeter,imx53-hsc # K+P imx53 HSC
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||||
- menlo,m53menlo # i.MX53 Menlo board
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||||
- starterkit,sk-imx53
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||||
- voipac,imx53-dmm-668 # Voipac i.MX53 X53-DMM-668
|
||||
- const: fsl,imx53
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|
||||
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@ -644,6 +702,16 @@ properties:
|
|||
- const: armadeus,imx6ull-opos6ul # OPOS6UL (i.MX6ULL) SoM
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- const: fsl,imx6ull
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||||
- description: i.MX6ULL DHCOM SoM based Boards
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items:
|
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- enum:
|
||||
- dh,imx6ull-dhcom-drc02
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||||
- dh,imx6ull-dhcom-pdk2
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- dh,imx6ull-dhcom-picoitx
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||||
- const: dh,imx6ull-dhcom-som # The DHCOR is soldered on the DHCOM
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- const: dh,imx6ull-dhcor-som
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- const: fsl,imx6ull
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||||
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||||
- description: i.MX6ULL PHYTEC phyBOARD-Segin
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||||
items:
|
||||
- enum:
|
||||
|
@ -815,7 +883,6 @@ properties:
|
|||
- enum:
|
||||
- beacon,imx8mm-beacon-kit # i.MX8MM Beacon Development Kit
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||||
- boundary,imx8mm-nitrogen8mm # i.MX8MM Nitrogen Board
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||||
- cloos,imx8mm-phg # i.MX8MM Cloos PHG Board
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||||
- dmo,imx8mm-data-modul-edm-sbc # i.MX8MM eDM SBC
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||||
- emtrion,emcon-mx8mm-avari # emCON-MX8MM SoM on Avari Base
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||||
- fsl,imx8mm-ddr4-evk # i.MX8MM DDR4 EVK Board
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||||
|
@ -830,7 +897,6 @@ properties:
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|||
- innocomm,wb15-evk # i.MX8MM Innocomm EVK board with WB15 SoM
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||||
- kontron,imx8mm-sl # i.MX8MM Kontron SL (N801X) SOM
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||||
- kontron,imx8mm-osm-s # i.MX8MM Kontron OSM-S (N802X) SOM
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||||
- menlo,mx8menlo # i.MX8MM Menlo board with Verdin SoM
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||||
- toradex,verdin-imx8mm # Verdin iMX8M Mini Modules
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||||
- toradex,verdin-imx8mm-nonwifi # Verdin iMX8M Mini Modules without Wi-Fi / BT
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||||
- toradex,verdin-imx8mm-wifi # Verdin iMX8M Mini Wi-Fi / BT Modules
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||||
|
@ -861,8 +927,10 @@ properties:
|
|||
- description: Toradex Boards with Verdin iMX8M Mini Modules
|
||||
items:
|
||||
- enum:
|
||||
- menlo,mx8menlo # Verdin iMX8M Mini Module on i.MX8MM Menlo board
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||||
- toradex,verdin-imx8mm-nonwifi-dahlia # Verdin iMX8M Mini Module on Dahlia
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||||
- toradex,verdin-imx8mm-nonwifi-dev # Verdin iMX8M Mini Module on Verdin Development Board
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||||
- toradex,verdin-imx8mm-nonwifi-yavia # Verdin iMX8M Mini Module on Yavia
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||||
- const: toradex,verdin-imx8mm-nonwifi # Verdin iMX8M Mini Module without Wi-Fi / BT
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||||
- const: toradex,verdin-imx8mm # Verdin iMX8M Mini Module
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||||
- const: fsl,imx8mm
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||||
|
@ -872,6 +940,7 @@ properties:
|
|||
- enum:
|
||||
- toradex,verdin-imx8mm-wifi-dahlia # Verdin iMX8M Mini Wi-Fi / BT Module on Dahlia
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||||
- toradex,verdin-imx8mm-wifi-dev # Verdin iMX8M Mini Wi-Fi / BT M. on Verdin Development B.
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||||
- toradex,verdin-imx8mm-wifi-yavia # Verdin iMX8M Mini Wi-Fi / BT Module on Yavia
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- const: toradex,verdin-imx8mm-wifi # Verdin iMX8M Mini Wi-Fi / BT Module
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||||
- const: toradex,verdin-imx8mm # Verdin iMX8M Mini Module
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||||
- const: fsl,imx8mm
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||||
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@ -895,6 +964,7 @@ properties:
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|||
one compatible is needed.
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||||
items:
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||||
- enum:
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||||
- cloos,imx8mm-phg # i.MX8MM Cloos PHG Board
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||||
- tq,imx8mm-tqma8mqml-mba8mx # TQ-Systems GmbH i.MX8MM TQMa8MQML SOM on MBa8Mx
|
||||
- const: tq,imx8mm-tqma8mqml # TQ-Systems GmbH i.MX8MM TQMa8MQML SOM
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||||
- const: fsl,imx8mm
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||||
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@ -931,10 +1001,11 @@ properties:
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|||
- description: i.MX8MP based Boards
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||||
items:
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||||
- enum:
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||||
- dh,imx8mp-dhcom-som # i.MX8MP DHCOM SoM
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||||
- dh,imx8mp-dhcom-pdk2 # i.MX8MP DHCOM SoM on PDK2 board
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||||
- beacon,imx8mp-beacon-kit # i.MX8MP Beacon Development Kit
|
||||
- fsl,imx8mp-evk # i.MX8MP EVK Board
|
||||
- gateworks,imx8mp-gw74xx # i.MX8MP Gateworks Board
|
||||
- polyhex,imx8mp-debix # Polyhex Debix boards
|
||||
- polyhex,imx8mp-debix-model-a # Polyhex Debix Model A Board
|
||||
- toradex,verdin-imx8mp # Verdin iMX8M Plus Modules
|
||||
- toradex,verdin-imx8mp-nonwifi # Verdin iMX8M Plus Modules without Wi-Fi / BT
|
||||
- toradex,verdin-imx8mp-wifi # Verdin iMX8M Plus Wi-Fi / BT Modules
|
||||
|
@ -947,6 +1018,12 @@ properties:
|
|||
- const: avnet,sm2s-imx8mp # SM2S-IMX8PLUS SoM
|
||||
- const: fsl,imx8mp
|
||||
|
||||
- description: i.MX8MP DHCOM based Boards
|
||||
items:
|
||||
- const: dh,imx8mp-dhcom-pdk2 # i.MX8MP DHCOM SoM on PDK2 board
|
||||
- const: dh,imx8mp-dhcom-som # i.MX8MP DHCOM SoM
|
||||
- const: fsl,imx8mp
|
||||
|
||||
- description: Engicam i.Core MX8M Plus SoM based boards
|
||||
items:
|
||||
- enum:
|
||||
|
@ -965,6 +1042,7 @@ properties:
|
|||
- enum:
|
||||
- toradex,verdin-imx8mp-nonwifi-dahlia # Verdin iMX8M Plus Module on Dahlia
|
||||
- toradex,verdin-imx8mp-nonwifi-dev # Verdin iMX8M Plus Module on Verdin Development Board
|
||||
- toradex,verdin-imx8mp-nonwifi-yavia # Verdin iMX8M Plus Module on Yavia
|
||||
- const: toradex,verdin-imx8mp-nonwifi # Verdin iMX8M Plus Module without Wi-Fi / BT
|
||||
- const: toradex,verdin-imx8mp # Verdin iMX8M Plus Module
|
||||
- const: fsl,imx8mp
|
||||
|
@ -974,6 +1052,7 @@ properties:
|
|||
- enum:
|
||||
- toradex,verdin-imx8mp-wifi-dahlia # Verdin iMX8M Plus Wi-Fi / BT Module on Dahlia
|
||||
- toradex,verdin-imx8mp-wifi-dev # Verdin iMX8M Plus Wi-Fi / BT M. on Verdin Development B.
|
||||
- toradex,verdin-imx8mp-wifi-yavia # Verdin iMX8M Plus Wi-Fi / BT Module on Yavia
|
||||
- const: toradex,verdin-imx8mp-wifi # Verdin iMX8M Plus Wi-Fi / BT Module
|
||||
- const: toradex,verdin-imx8mp # Verdin iMX8M Plus Module
|
||||
- const: fsl,imx8mp
|
||||
|
@ -999,12 +1078,17 @@ properties:
|
|||
- fsl,imx8mq-evk # i.MX8MQ EVK Board
|
||||
- google,imx8mq-phanbell # Google Coral Edge TPU
|
||||
- kontron,pitx-imx8m # Kontron pITX-imx8m Board
|
||||
- mntre,reform2 # MNT Reform2 Laptop
|
||||
- purism,librem5-devkit # Purism Librem5 devkit
|
||||
- solidrun,hummingboard-pulse # SolidRun Hummingboard Pulse
|
||||
- technexion,pico-pi-imx8m # TechNexion PICO-PI-8M evk
|
||||
- const: fsl,imx8mq
|
||||
|
||||
- description: i.MX8MQ NITROGEN SoM based Boards
|
||||
items:
|
||||
- const: mntre,reform2 # MNT Reform2 Laptop
|
||||
- const: boundary,imx8mq-nitrogen8m-som # i.MX8MQ NITROGEN SoM
|
||||
- const: fsl,imx8mq
|
||||
|
||||
- description: Purism Librem5 phones
|
||||
items:
|
||||
- enum:
|
||||
|
|
|
@ -244,6 +244,10 @@ properties:
|
|||
- enum:
|
||||
- mediatek,mt8183-pumpkin
|
||||
- const: mediatek,mt8183
|
||||
- items:
|
||||
- enum:
|
||||
- mediatek,mt8365-evk
|
||||
- const: mediatek,mt8365
|
||||
- items:
|
||||
- enum:
|
||||
- mediatek,mt8516-pumpkin
|
||||
|
|
|
@ -35,6 +35,8 @@ description: |
|
|||
mdm9615
|
||||
msm8226
|
||||
msm8916
|
||||
msm8939
|
||||
msm8953
|
||||
msm8956
|
||||
msm8974
|
||||
msm8976
|
||||
|
@ -47,11 +49,13 @@ description: |
|
|||
qru1000
|
||||
sa8155p
|
||||
sa8540p
|
||||
sa8775p
|
||||
sc7180
|
||||
sc7280
|
||||
sc8180x
|
||||
sc8280xp
|
||||
sda660
|
||||
sdm450
|
||||
sdm630
|
||||
sdm632
|
||||
sdm636
|
||||
|
@ -62,6 +66,7 @@ description: |
|
|||
sdx65
|
||||
sm4250
|
||||
sm6115
|
||||
sm6115p
|
||||
sm6125
|
||||
sm6350
|
||||
sm6375
|
||||
|
@ -70,6 +75,7 @@ description: |
|
|||
sm8250
|
||||
sm8350
|
||||
sm8450
|
||||
sm8550
|
||||
|
||||
The 'board' element must be one of the following strings:
|
||||
|
||||
|
@ -84,6 +90,7 @@ description: |
|
|||
liquid
|
||||
mtp
|
||||
qrd
|
||||
ride
|
||||
sbc
|
||||
x100
|
||||
|
||||
|
@ -160,6 +167,12 @@ properties:
|
|||
- samsung,s3ve3g
|
||||
- const: qcom,msm8226
|
||||
|
||||
- items:
|
||||
- enum:
|
||||
- sony,kanuti-tulip
|
||||
- square,apq8039-t2
|
||||
- const: qcom,msm8939
|
||||
|
||||
- items:
|
||||
- enum:
|
||||
- sony,kugo-row
|
||||
|
@ -194,8 +207,10 @@ properties:
|
|||
|
||||
- items:
|
||||
- enum:
|
||||
- acer,a1-724
|
||||
- alcatel,idol347
|
||||
- asus,z00l
|
||||
- gplus,fl8005a
|
||||
- huawei,g7
|
||||
- longcheer,l8910
|
||||
- samsung,a3u-eur
|
||||
|
@ -203,8 +218,13 @@ properties:
|
|||
- samsung,e5
|
||||
- samsung,e7
|
||||
- samsung,grandmax
|
||||
- samsung,gt510
|
||||
- samsung,gt58
|
||||
- samsung,j5
|
||||
- samsung,j5x
|
||||
- samsung,serranove
|
||||
- thwc,uf896
|
||||
- thwc,ufi001c
|
||||
- wingtech,wt88047
|
||||
- const: qcom,msm8916
|
||||
|
||||
|
@ -213,6 +233,15 @@ properties:
|
|||
- const: qcom,msm8916-v1-qrd/9-v1
|
||||
- const: qcom,msm8916
|
||||
|
||||
- items:
|
||||
- enum:
|
||||
- motorola,potter
|
||||
- xiaomi,daisy
|
||||
- xiaomi,mido
|
||||
- xiaomi,tissot
|
||||
- xiaomi,vince
|
||||
- const: qcom,msm8953
|
||||
|
||||
- items:
|
||||
- enum:
|
||||
- lg,bullhead
|
||||
|
@ -627,6 +656,12 @@ properties:
|
|||
- const: google,hoglin
|
||||
- const: qcom,sc7280
|
||||
|
||||
- description: Qualcomm Technologies, Inc. sc7280 CRD Pro platform (newest rev)
|
||||
items:
|
||||
- const: google,zoglin-sku1536
|
||||
- const: google,hoglin-sku1536
|
||||
- const: qcom,sc7280
|
||||
|
||||
- description: Qualcomm Technologies, Inc. sc7280 IDP SKU1 platform
|
||||
items:
|
||||
- const: qcom,sc7280-idp
|
||||
|
@ -679,6 +714,18 @@ properties:
|
|||
- const: google,zombie-sku512
|
||||
- const: qcom,sc7280
|
||||
|
||||
- description: Google Zombie with NVMe (newest rev)
|
||||
items:
|
||||
- const: google,zombie-sku2
|
||||
- const: google,zombie-sku3
|
||||
- const: google,zombie-sku515
|
||||
- const: qcom,sc7280
|
||||
|
||||
- description: Google Zombie with LTE and NVMe (newest rev)
|
||||
items:
|
||||
- const: google,zombie-sku514
|
||||
- const: qcom,sc7280
|
||||
|
||||
- items:
|
||||
- enum:
|
||||
- lenovo,flex-5g
|
||||
|
@ -693,6 +740,11 @@ properties:
|
|||
- qcom,sc8280xp-qrd
|
||||
- const: qcom,sc8280xp
|
||||
|
||||
- items:
|
||||
- enum:
|
||||
- motorola,ali
|
||||
- const: qcom,sdm450
|
||||
|
||||
- items:
|
||||
- enum:
|
||||
- sony,discovery-row
|
||||
|
@ -709,6 +761,7 @@ properties:
|
|||
- items:
|
||||
- enum:
|
||||
- fairphone,fp3
|
||||
- motorola,ocean
|
||||
- const: qcom,sdm632
|
||||
|
||||
- items:
|
||||
|
@ -762,6 +815,11 @@ properties:
|
|||
- qcom,sa8540p-ride
|
||||
- const: qcom,sa8540p
|
||||
|
||||
- items:
|
||||
- enum:
|
||||
- qcom,sa8775p-ride
|
||||
- const: qcom,sa8775p
|
||||
|
||||
- items:
|
||||
- enum:
|
||||
- google,cheza
|
||||
|
@ -790,6 +848,12 @@ properties:
|
|||
- oneplus,billie2
|
||||
- const: qcom,sm4250
|
||||
|
||||
- items:
|
||||
- enum:
|
||||
- lenovo,j606f
|
||||
- const: qcom,sm6115p
|
||||
- const: qcom,sm6115
|
||||
|
||||
- items:
|
||||
- enum:
|
||||
- sony,pdx201
|
||||
|
@ -826,6 +890,7 @@ properties:
|
|||
- qcom,sm8250-mtp
|
||||
- sony,pdx203-generic
|
||||
- sony,pdx206-generic
|
||||
- xiaomi,elish
|
||||
- const: qcom,sm8250
|
||||
|
||||
- items:
|
||||
|
@ -845,6 +910,11 @@ properties:
|
|||
- sony,pdx224
|
||||
- const: qcom,sm8450
|
||||
|
||||
- items:
|
||||
- enum:
|
||||
- qcom,sm8550-mtp
|
||||
- const: qcom,sm8550
|
||||
|
||||
# Board compatibles go above
|
||||
|
||||
qcom,msm-id:
|
||||
|
@ -922,15 +992,22 @@ allOf:
|
|||
- qcom,apq8026
|
||||
- qcom,apq8094
|
||||
- qcom,apq8096
|
||||
- qcom,msm8939
|
||||
- qcom,msm8953
|
||||
- qcom,msm8956
|
||||
- qcom,msm8992
|
||||
- qcom,msm8994
|
||||
- qcom,msm8996
|
||||
- qcom,msm8998
|
||||
- qcom,sdm450
|
||||
- qcom,sdm630
|
||||
- qcom,sdm632
|
||||
- qcom,sdm636
|
||||
- qcom,sdm845
|
||||
- qcom,sdx55
|
||||
- qcom,sdx65
|
||||
- qcom,sm4250
|
||||
- qcom,sm6115
|
||||
- qcom,sm6125
|
||||
- qcom,sm6350
|
||||
- qcom,sm7225
|
||||
|
@ -954,6 +1031,8 @@ allOf:
|
|||
- oneplus,dumpling
|
||||
- oneplus,enchilada
|
||||
- oneplus,fajita
|
||||
- oneplus,oneplus3
|
||||
- oneplus,oneplus3t
|
||||
then:
|
||||
properties:
|
||||
qcom,board-id:
|
||||
|
|
|
@ -90,11 +90,33 @@ properties:
|
|||
- const: chipspark,rayeager-px2
|
||||
- const: rockchip,rk3066a
|
||||
|
||||
- description: Edgeble Neural Compute Module 2(Neu2) SoM based boards
|
||||
items:
|
||||
- const: edgeble,neural-compute-module-2-io # Edgeble Neural Compute Module 2 IO Board
|
||||
- const: edgeble,neural-compute-module-2 # Edgeble Neural Compute Module 2 SoM
|
||||
- const: rockchip,rv1126
|
||||
|
||||
- description: Edgeble Neural Compute Module 6(Neu6) Model A SoM based boards
|
||||
items:
|
||||
- const: edgeble,neural-compute-module-6a-io # Edgeble Neural Compute Module 6A IO Board
|
||||
- const: edgeble,neural-compute-module-6a # Edgeble Neural Compute Module 6A SoM
|
||||
- const: rockchip,rk3588
|
||||
|
||||
- description: Elgin RV1108 R1
|
||||
items:
|
||||
- const: elgin,rv1108-r1
|
||||
- const: rockchip,rv1108
|
||||
|
||||
- description: EmbedFire LubanCat 1
|
||||
items:
|
||||
- const: embedfire,lubancat-1
|
||||
- const: rockchip,rk3566
|
||||
|
||||
- description: EmbedFire LubanCat 2
|
||||
items:
|
||||
- const: embedfire,lubancat-2
|
||||
- const: rockchip,rk3568
|
||||
|
||||
- description: Engicam PX30.Core C.TOUCH 2.0
|
||||
items:
|
||||
- const: engicam,px30-core-ctouch2
|
||||
|
@ -599,6 +621,20 @@ properties:
|
|||
- const: pine64,soquartz
|
||||
- const: rockchip,rk3566
|
||||
|
||||
- description: Radxa Compute Module 3(CM3)
|
||||
items:
|
||||
- enum:
|
||||
- radxa,cm3-io
|
||||
- const: radxa,cm3
|
||||
- const: rockchip,rk3566
|
||||
|
||||
- description: Radxa CM3 Industrial
|
||||
items:
|
||||
- enum:
|
||||
- radxa,e25
|
||||
- const: radxa,cm3i
|
||||
- const: rockchip,rk3568
|
||||
|
||||
- description: Radxa Rock
|
||||
items:
|
||||
- const: radxa,rock
|
||||
|
@ -652,6 +688,16 @@ properties:
|
|||
- const: radxa,rock3a
|
||||
- const: rockchip,rk3568
|
||||
|
||||
- description: Radxa ROCK 5 Model A
|
||||
items:
|
||||
- const: radxa,rock-5a
|
||||
- const: rockchip,rk3588s
|
||||
|
||||
- description: Radxa ROCK 5 Model B
|
||||
items:
|
||||
- const: radxa,rock-5b
|
||||
- const: rockchip,rk3588
|
||||
|
||||
- description: Rikomagic MK808 v1
|
||||
items:
|
||||
- const: rikomagic,mk808
|
||||
|
@ -689,6 +735,11 @@ properties:
|
|||
- const: rockchip,rk3036-evb
|
||||
- const: rockchip,rk3036
|
||||
|
||||
- description: Rockchip RK3128 Evaluation board
|
||||
items:
|
||||
- const: rockchip,rk3128-evb
|
||||
- const: rockchip,rk3128
|
||||
|
||||
- description: Rockchip RK3228 Evaluation board
|
||||
items:
|
||||
- const: rockchip,rk3228-evb
|
||||
|
@ -736,6 +787,11 @@ properties:
|
|||
- const: rockchip,rk3399-sapphire-excavator
|
||||
- const: rockchip,rk3399
|
||||
|
||||
- description: Rockchip RK3588 Evaluation board
|
||||
items:
|
||||
- const: rockchip,rk3588-evb1-v10
|
||||
- const: rockchip,rk3588
|
||||
|
||||
- description: Rockchip RV1108 Evaluation board
|
||||
items:
|
||||
- const: rockchip,rv1108-evb
|
||||
|
@ -761,6 +817,11 @@ properties:
|
|||
- const: tronsmart,orion-r68-meta
|
||||
- const: rockchip,rk3368
|
||||
|
||||
- description: Xunlong Orange Pi R1 Plus
|
||||
items:
|
||||
- const: xunlong,orangepi-r1-plus
|
||||
- const: rockchip,rk3328
|
||||
|
||||
- description: Zkmagic A95X Z2
|
||||
items:
|
||||
- const: zkmagic,a95x-z2
|
||||
|
|
|
@ -27,6 +27,7 @@ select:
|
|||
- rockchip,rk3399-pmu
|
||||
- rockchip,rk3568-pmu
|
||||
- rockchip,rk3588-pmu
|
||||
- rockchip,rv1126-pmu
|
||||
|
||||
required:
|
||||
- compatible
|
||||
|
@ -43,6 +44,7 @@ properties:
|
|||
- rockchip,rk3399-pmu
|
||||
- rockchip,rk3568-pmu
|
||||
- rockchip,rk3588-pmu
|
||||
- rockchip,rv1126-pmu
|
||||
- const: syscon
|
||||
- const: simple-mfd
|
||||
|
||||
|
|
|
@ -171,6 +171,7 @@ properties:
|
|||
- hardkernel,odroid-xu3-lite # Hardkernel Odroid XU3 Lite
|
||||
- hardkernel,odroid-xu4 # Hardkernel Odroid XU4
|
||||
- hardkernel,odroid-hc1 # Hardkernel Odroid HC1
|
||||
- samsung,k3g # Samsung Galaxy S5 (SM-G900H)
|
||||
- const: samsung,exynos5800
|
||||
- const: samsung,exynos5
|
||||
|
||||
|
|
|
@ -38,10 +38,17 @@ properties:
|
|||
- ti,am642-sk
|
||||
- const: ti,am642
|
||||
|
||||
- description: K3 AM642 SoC PHYTEC phyBOARD-Electra
|
||||
items:
|
||||
- const: phytec,am642-phyboard-electra-rdk
|
||||
- const: phytec,am64-phycore-som
|
||||
- const: ti,am642
|
||||
|
||||
- description: K3 AM654 SoC
|
||||
items:
|
||||
- enum:
|
||||
- siemens,iot2050-advanced
|
||||
- siemens,iot2050-advanced-m2
|
||||
- siemens,iot2050-advanced-pg2
|
||||
- siemens,iot2050-basic
|
||||
- siemens,iot2050-basic-pg2
|
||||
|
@ -69,9 +76,17 @@ properties:
|
|||
- description: K3 J721s2 SoC
|
||||
items:
|
||||
- enum:
|
||||
- ti,am68-sk
|
||||
- ti,j721s2-evm
|
||||
- const: ti,j721s2
|
||||
|
||||
- description: K3 J784s4 SoC
|
||||
items:
|
||||
- enum:
|
||||
- ti,am69-sk
|
||||
- ti,j784s4-evm
|
||||
- const: ti,j784s4
|
||||
|
||||
additionalProperties: true
|
||||
|
||||
...
|
||||
|
|
|
@ -40,10 +40,10 @@ properties:
|
|||
maxItems: 1
|
||||
|
||||
"#address-cells":
|
||||
const: 1
|
||||
enum: [ 1, 2 ]
|
||||
|
||||
"#size-cells":
|
||||
const: 1
|
||||
enum: [ 1, 2 ]
|
||||
|
||||
ranges: true
|
||||
|
||||
|
|
|
@ -0,0 +1,51 @@
|
|||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/clock/qcom,qdu1000-gcc.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Qualcomm Global Clock & Reset Controller for QDU1000 and QRU1000
|
||||
|
||||
maintainers:
|
||||
- Melody Olvera <quic_molvera@quicinc.com>
|
||||
|
||||
description: |
|
||||
Qualcomm global clock control module which supports the clocks, resets and
|
||||
power domains on QDU1000 and QRU1000
|
||||
|
||||
See also:: include/dt-bindings/clock/qcom,qdu1000-gcc.h
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: qcom,qdu1000-gcc
|
||||
|
||||
clocks:
|
||||
items:
|
||||
- description: Board XO source
|
||||
- description: Sleep clock source
|
||||
- description: PCIE 0 Pipe clock source
|
||||
- description: PCIE 0 Phy Auxiliary clock source
|
||||
- description: USB3 Phy wrapper pipe clock source
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- clocks
|
||||
|
||||
allOf:
|
||||
- $ref: qcom,gcc.yaml#
|
||||
|
||||
unevaluatedProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/clock/qcom,rpmh.h>
|
||||
clock-controller@100000 {
|
||||
compatible = "qcom,qdu1000-gcc";
|
||||
reg = <0x00100000 0x001f4200>;
|
||||
clocks = <&rpmhcc RPMH_CXO_CLK>, <&sleep_clk>,
|
||||
<&pcie_0_pipe_clk>, <&pcie_0_phy_aux_clk>,
|
||||
<&usb3_phy_wrapper_pipe_clk>;
|
||||
#clock-cells = <1>;
|
||||
#reset-cells = <1>;
|
||||
#power-domain-cells = <1>;
|
||||
};
|
|
@ -0,0 +1,49 @@
|
|||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/clock/qcom,sm6350-camcc.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Qualcomm Camera Clock & Reset Controller on SM6350
|
||||
|
||||
maintainers:
|
||||
- Konrad Dybcio <konrad.dybcio@linaro.org>
|
||||
|
||||
description: |
|
||||
Qualcomm camera clock control module provides the clocks, resets and power
|
||||
domains on SM6350.
|
||||
|
||||
See also:: include/dt-bindings/clock/qcom,sm6350-camcc.h
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: qcom,sm6350-camcc
|
||||
|
||||
clocks:
|
||||
items:
|
||||
- description: Board XO source
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- clocks
|
||||
|
||||
allOf:
|
||||
- $ref: qcom,gcc.yaml#
|
||||
|
||||
unevaluatedProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/clock/qcom,rpmh.h>
|
||||
clock-controller@ad00000 {
|
||||
compatible = "qcom,sm6350-camcc";
|
||||
reg = <0x0ad00000 0x16000>;
|
||||
clocks = <&rpmhcc RPMH_CXO_CLK>;
|
||||
#clock-cells = <1>;
|
||||
#reset-cells = <1>;
|
||||
#power-domain-cells = <1>;
|
||||
};
|
||||
...
|
105
Documentation/devicetree/bindings/clock/qcom,sm8550-dispcc.yaml
Normal file
105
Documentation/devicetree/bindings/clock/qcom,sm8550-dispcc.yaml
Normal file
|
@ -0,0 +1,105 @@
|
|||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/clock/qcom,sm8550-dispcc.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Qualcomm Display Clock & Reset Controller for SM8550
|
||||
|
||||
maintainers:
|
||||
- Bjorn Andersson <andersson@kernel.org>
|
||||
- Neil Armstrong <neil.armstrong@linaro.org>
|
||||
|
||||
description: |
|
||||
Qualcomm display clock control module provides the clocks, resets and power
|
||||
domains on SM8550.
|
||||
|
||||
See also:: include/dt-bindings/clock/qcom,sm8550-dispcc.h
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
- qcom,sm8550-dispcc
|
||||
|
||||
clocks:
|
||||
items:
|
||||
- description: Board XO source
|
||||
- description: Board Always On XO source
|
||||
- description: Display's AHB clock
|
||||
- description: sleep clock
|
||||
- description: Byte clock from DSI PHY0
|
||||
- description: Pixel clock from DSI PHY0
|
||||
- description: Byte clock from DSI PHY1
|
||||
- description: Pixel clock from DSI PHY1
|
||||
- description: Link clock from DP PHY0
|
||||
- description: VCO DIV clock from DP PHY0
|
||||
- description: Link clock from DP PHY1
|
||||
- description: VCO DIV clock from DP PHY1
|
||||
- description: Link clock from DP PHY2
|
||||
- description: VCO DIV clock from DP PHY2
|
||||
- description: Link clock from DP PHY3
|
||||
- description: VCO DIV clock from DP PHY3
|
||||
|
||||
'#clock-cells':
|
||||
const: 1
|
||||
|
||||
'#reset-cells':
|
||||
const: 1
|
||||
|
||||
'#power-domain-cells':
|
||||
const: 1
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
power-domains:
|
||||
description:
|
||||
A phandle and PM domain specifier for the MMCX power domain.
|
||||
maxItems: 1
|
||||
|
||||
required-opps:
|
||||
description:
|
||||
A phandle to an OPP node describing required MMCX performance point.
|
||||
maxItems: 1
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- clocks
|
||||
- '#clock-cells'
|
||||
- '#reset-cells'
|
||||
- '#power-domain-cells'
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/clock/qcom,sm8550-gcc.h>
|
||||
#include <dt-bindings/clock/qcom,rpmh.h>
|
||||
#include <dt-bindings/power/qcom-rpmpd.h>
|
||||
clock-controller@af00000 {
|
||||
compatible = "qcom,sm8550-dispcc";
|
||||
reg = <0x0af00000 0x10000>;
|
||||
clocks = <&rpmhcc RPMH_CXO_CLK>,
|
||||
<&rpmhcc RPMH_CXO_CLK_A>,
|
||||
<&gcc GCC_DISP_AHB_CLK>,
|
||||
<&sleep_clk>,
|
||||
<&dsi0_phy 0>,
|
||||
<&dsi0_phy 1>,
|
||||
<&dsi1_phy 0>,
|
||||
<&dsi1_phy 1>,
|
||||
<&dp0_phy 0>,
|
||||
<&dp0_phy 1>,
|
||||
<&dp1_phy 0>,
|
||||
<&dp1_phy 1>,
|
||||
<&dp2_phy 0>,
|
||||
<&dp2_phy 1>,
|
||||
<&dp3_phy 0>,
|
||||
<&dp3_phy 1>;
|
||||
#clock-cells = <1>;
|
||||
#reset-cells = <1>;
|
||||
#power-domain-cells = <1>;
|
||||
power-domains = <&rpmhpd SM8550_MMCX>;
|
||||
required-opps = <&rpmhpd_opp_low_svs>;
|
||||
};
|
||||
...
|
|
@ -0,0 +1,55 @@
|
|||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/clock/qcom,sm8550-tcsr.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Qualcomm TCSR Clock Controller on SM8550
|
||||
|
||||
maintainers:
|
||||
- Bjorn Andersson <andersson@kernel.org>
|
||||
|
||||
description: |
|
||||
Qualcomm TCSR clock control module provides the clocks, resets and
|
||||
power domains on SM8550
|
||||
|
||||
See also:: include/dt-bindings/clock/qcom,sm8550-tcsr.h
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
items:
|
||||
- const: qcom,sm8550-tcsr
|
||||
- const: syscon
|
||||
|
||||
clocks:
|
||||
items:
|
||||
- description: TCXO pad clock
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
'#clock-cells':
|
||||
const: 1
|
||||
|
||||
'#reset-cells':
|
||||
const: 1
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- clocks
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/clock/qcom,rpmh.h>
|
||||
|
||||
clock-controller@1fc0000 {
|
||||
compatible = "qcom,sm8550-tcsr", "syscon";
|
||||
reg = <0x1fc0000 0x30000>;
|
||||
clocks = <&rpmhcc RPMH_CXO_CLK>;
|
||||
#clock-cells = <1>;
|
||||
#reset-cells = <1>;
|
||||
};
|
||||
|
||||
...
|
|
@ -20,10 +20,10 @@ properties:
|
|||
- nvidia,tegra194-display
|
||||
|
||||
'#address-cells':
|
||||
const: 1
|
||||
enum: [ 1, 2 ]
|
||||
|
||||
'#size-cells':
|
||||
const: 1
|
||||
enum: [ 1, 2 ]
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
|
|
@ -0,0 +1,70 @@
|
|||
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/interconnect/qcom,qdu1000-rpmh.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Qualcomm RPMh Network-On-Chip Interconnect on QDU1000
|
||||
|
||||
maintainers:
|
||||
- Georgi Djakov <djakov@kernel.org>
|
||||
- Odelu Kukatla <quic_okukatla@quicinc.com>
|
||||
|
||||
description: |
|
||||
RPMh interconnect providers support system bandwidth requirements through
|
||||
RPMh hardware accelerators known as Bus Clock Manager (BCM). The provider is
|
||||
able to communicate with the BCM through the Resource State Coordinator (RSC)
|
||||
associated with each execution environment. Provider nodes must point to at
|
||||
least one RPMh device child node pertaining to their RSC and each provider
|
||||
can map to multiple RPMh resources.
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
- qcom,qdu1000-clk-virt
|
||||
- qcom,qdu1000-gem-noc
|
||||
- qcom,qdu1000-mc-virt
|
||||
- qcom,qdu1000-system-noc
|
||||
|
||||
'#interconnect-cells': true
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
allOf:
|
||||
- $ref: qcom,rpmh-common.yaml#
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
enum:
|
||||
- qcom,qdu1000-clk-virt
|
||||
- qcom,qdu1000-mc-virt
|
||||
then:
|
||||
properties:
|
||||
reg: false
|
||||
else:
|
||||
required:
|
||||
- reg
|
||||
|
||||
required:
|
||||
- compatible
|
||||
|
||||
unevaluatedProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/interconnect/qcom,qdu1000-rpmh.h>
|
||||
|
||||
system_noc: interconnect@1640000 {
|
||||
compatible = "qcom,qdu1000-system-noc";
|
||||
reg = <0x1640000 0x45080>;
|
||||
#interconnect-cells = <2>;
|
||||
qcom,bcm-voters = <&apps_bcm_voter>;
|
||||
};
|
||||
|
||||
clk_virt: interconnect-0 {
|
||||
compatible = "qcom,qdu1000-clk-virt";
|
||||
#interconnect-cells = <2>;
|
||||
qcom,bcm-voters = <&apps_bcm_voter>;
|
||||
};
|
|
@ -0,0 +1,139 @@
|
|||
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/interconnect/qcom,sm8550-rpmh.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Qualcomm RPMh Network-On-Chip Interconnect on SM8550
|
||||
|
||||
maintainers:
|
||||
- Abel Vesa <abel.vesa@linaro.org>
|
||||
- Neil Armstrong <neil.armstrong@linaro.org>
|
||||
|
||||
description: |
|
||||
RPMh interconnect providers support system bandwidth requirements through
|
||||
RPMh hardware accelerators known as Bus Clock Manager (BCM). The provider is
|
||||
able to communicate with the BCM through the Resource State Coordinator (RSC)
|
||||
associated with each execution environment. Provider nodes must point to at
|
||||
least one RPMh device child node pertaining to their RSC and each provider
|
||||
can map to multiple RPMh resources.
|
||||
|
||||
See also:: include/dt-bindings/interconnect/qcom,sm8550-rpmh.h
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
- qcom,sm8550-aggre1-noc
|
||||
- qcom,sm8550-aggre2-noc
|
||||
- qcom,sm8550-clk-virt
|
||||
- qcom,sm8550-cnoc-main
|
||||
- qcom,sm8550-config-noc
|
||||
- qcom,sm8550-gem-noc
|
||||
- qcom,sm8550-lpass-ag-noc
|
||||
- qcom,sm8550-lpass-lpiaon-noc
|
||||
- qcom,sm8550-lpass-lpicx-noc
|
||||
- qcom,sm8550-mc-virt
|
||||
- qcom,sm8550-mmss-noc
|
||||
- qcom,sm8550-nsp-noc
|
||||
- qcom,sm8550-pcie-anoc
|
||||
- qcom,sm8550-system-noc
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
clocks:
|
||||
minItems: 1
|
||||
maxItems: 2
|
||||
|
||||
allOf:
|
||||
- $ref: qcom,rpmh-common.yaml#
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
enum:
|
||||
- qcom,sm8550-clk-virt
|
||||
- qcom,sm8550-mc-virt
|
||||
then:
|
||||
properties:
|
||||
reg: false
|
||||
else:
|
||||
required:
|
||||
- reg
|
||||
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
enum:
|
||||
- qcom,sm8550-pcie-anoc
|
||||
then:
|
||||
properties:
|
||||
clocks:
|
||||
items:
|
||||
- description: aggre-NOC PCIe AXI clock
|
||||
- description: cfg-NOC PCIe a-NOC AHB clock
|
||||
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
enum:
|
||||
- qcom,sm8550-aggre1-noc
|
||||
then:
|
||||
properties:
|
||||
clocks:
|
||||
items:
|
||||
- description: aggre UFS PHY AXI clock
|
||||
- description: aggre USB3 PRIM AXI clock
|
||||
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
enum:
|
||||
- qcom,sm8550-aggre2-noc
|
||||
then:
|
||||
properties:
|
||||
clocks:
|
||||
items:
|
||||
- description: RPMH CC IPA clock
|
||||
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
enum:
|
||||
- qcom,sm8550-aggre1-noc
|
||||
- qcom,sm8550-aggre2-noc
|
||||
- qcom,sm8550-pcie-anoc
|
||||
then:
|
||||
required:
|
||||
- clocks
|
||||
else:
|
||||
properties:
|
||||
clocks: false
|
||||
|
||||
required:
|
||||
- compatible
|
||||
|
||||
unevaluatedProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/clock/qcom,sm8550-gcc.h>
|
||||
|
||||
clk_virt: interconnect-0 {
|
||||
compatible = "qcom,sm8550-clk-virt";
|
||||
#interconnect-cells = <2>;
|
||||
qcom,bcm-voters = <&apps_bcm_voter>;
|
||||
};
|
||||
|
||||
aggre1_noc: interconnect@16e0000 {
|
||||
compatible = "qcom,sm8550-aggre1-noc";
|
||||
reg = <0x016e0000 0x14400>;
|
||||
#interconnect-cells = <2>;
|
||||
clocks = <&gcc GCC_AGGRE_UFS_PHY_AXI_CLK>,
|
||||
<&gcc GCC_AGGRE_USB3_PRIM_AXI_CLK>;
|
||||
qcom,bcm-voters = <&apps_bcm_voter>;
|
||||
};
|
|
@ -64,12 +64,6 @@ properties:
|
|||
- rockchip,rk3568-qos
|
||||
- rockchip,rk3588-qos
|
||||
- rockchip,rv1126-qos
|
||||
- samsung,exynos3-sysreg
|
||||
- samsung,exynos4-sysreg
|
||||
- samsung,exynos5-sysreg
|
||||
- samsung,exynos5433-sysreg
|
||||
- samsung,exynos850-sysreg
|
||||
- samsung,exynosautov9-sysreg
|
||||
|
||||
- const: syscon
|
||||
|
||||
|
|
|
@ -1,7 +1,7 @@
|
|||
# SPDX-License-Identifier: GPL-2.0
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/phy/phy-rockchip-inno-usb2.yaml#
|
||||
$id: http://devicetree.org/schemas/phy/rockchip,inno-usb2phy.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Rockchip USB2.0 phy with inno IP block
|
|
@ -0,0 +1,41 @@
|
|||
# SPDX-License-Identifier: GPL-2.0
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/phy/rockchip,rk3288-dp-phy.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Rockchip specific extensions to the Analogix Display Port PHY
|
||||
|
||||
maintainers:
|
||||
- Heiko Stuebner <heiko@sntech.de>
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: rockchip,rk3288-dp-phy
|
||||
|
||||
clocks:
|
||||
maxItems: 1
|
||||
|
||||
clock-names:
|
||||
const: 24m
|
||||
|
||||
"#phy-cells":
|
||||
const: 0
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- clocks
|
||||
- clock-names
|
||||
- "#phy-cells"
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/clock/rk3288-cru.h>
|
||||
edp-phy {
|
||||
compatible = "rockchip,rk3288-dp-phy";
|
||||
clocks = <&cru SCLK_EDP_24M>;
|
||||
clock-names = "24m";
|
||||
#phy-cells = <0>;
|
||||
};
|
|
@ -1,26 +0,0 @@
|
|||
Rockchip specific extensions to the Analogix Display Port PHY
|
||||
------------------------------------
|
||||
|
||||
Required properties:
|
||||
- compatible : should be one of the following supported values:
|
||||
- "rockchip.rk3288-dp-phy"
|
||||
- clocks: from common clock binding: handle to dp clock.
|
||||
of memory mapped region.
|
||||
- clock-names: from common clock binding:
|
||||
Required elements: "24m"
|
||||
- #phy-cells : from the generic PHY bindings, must be 0;
|
||||
|
||||
Example:
|
||||
|
||||
grf: syscon@ff770000 {
|
||||
compatible = "rockchip,rk3288-grf", "syscon", "simple-mfd";
|
||||
|
||||
...
|
||||
|
||||
edp_phy: edp-phy {
|
||||
compatible = "rockchip,rk3288-dp-phy";
|
||||
clocks = <&cru SCLK_EDP_24M>;
|
||||
clock-names = "24m";
|
||||
#phy-cells = <0>;
|
||||
};
|
||||
};
|
|
@ -23,11 +23,16 @@ description: |
|
|||
|
||||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
- fsl,imx6q-gpc
|
||||
- fsl,imx6qp-gpc
|
||||
- fsl,imx6sl-gpc
|
||||
- fsl,imx6sx-gpc
|
||||
oneOf:
|
||||
- enum:
|
||||
- fsl,imx6q-gpc
|
||||
- items:
|
||||
- enum:
|
||||
- fsl,imx6qp-gpc
|
||||
- fsl,imx6sl-gpc
|
||||
- fsl,imx6sx-gpc
|
||||
- fsl,imx6ul-gpc
|
||||
- const: fsl,imx6q-gpc
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
@ -35,6 +40,10 @@ properties:
|
|||
interrupts:
|
||||
maxItems: 1
|
||||
|
||||
interrupt-controller: true
|
||||
'#interrupt-cells':
|
||||
const: 3
|
||||
|
||||
clocks:
|
||||
maxItems: 1
|
||||
|
||||
|
|
|
@ -27,6 +27,7 @@ properties:
|
|||
|
||||
- items:
|
||||
- enum:
|
||||
- aldec,tysom-m-mpfs250t-rev2
|
||||
- aries,m100pfsevp
|
||||
- microchip,mpfs-sev-kit
|
||||
- sundance,polarberry
|
||||
|
|
|
@ -24,6 +24,12 @@ properties:
|
|||
- starfive,visionfive-v1
|
||||
- const: starfive,jh7100
|
||||
|
||||
- items:
|
||||
- enum:
|
||||
- starfive,visionfive-2-v1.2a
|
||||
- starfive,visionfive-2-v1.3b
|
||||
- const: starfive,jh7110
|
||||
|
||||
additionalProperties: true
|
||||
|
||||
...
|
||||
|
|
69
Documentation/devicetree/bindings/riscv/sunxi.yaml
Normal file
69
Documentation/devicetree/bindings/riscv/sunxi.yaml
Normal file
|
@ -0,0 +1,69 @@
|
|||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/riscv/sunxi.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Allwinner RISC-V SoC-based boards
|
||||
|
||||
maintainers:
|
||||
- Chen-Yu Tsai <wens@csie.org>
|
||||
- Jernej Skrabec <jernej.skrabec@gmail.com>
|
||||
- Samuel Holland <samuel@sholland.org>
|
||||
|
||||
description:
|
||||
Allwinner RISC-V SoC-based boards
|
||||
|
||||
properties:
|
||||
$nodename:
|
||||
const: '/'
|
||||
compatible:
|
||||
oneOf:
|
||||
- description: Dongshan Nezha STU SoM
|
||||
items:
|
||||
- const: 100ask,dongshan-nezha-stu
|
||||
- const: allwinner,sun20i-d1
|
||||
|
||||
- description: D1 Nezha board
|
||||
items:
|
||||
- const: allwinner,d1-nezha
|
||||
- const: allwinner,sun20i-d1
|
||||
|
||||
- description: ClockworkPi R-01 SoM and v3.14 board
|
||||
items:
|
||||
- const: clockwork,r-01-clockworkpi-v3.14
|
||||
- const: allwinner,sun20i-d1
|
||||
|
||||
- description: ClockworkPi R-01 SoM, v3.14 board, and DevTerm expansion
|
||||
items:
|
||||
- const: clockwork,r-01-devterm-v3.14
|
||||
- const: clockwork,r-01-clockworkpi-v3.14
|
||||
- const: allwinner,sun20i-d1
|
||||
|
||||
- description: Lichee RV SoM
|
||||
items:
|
||||
- const: sipeed,lichee-rv
|
||||
- const: allwinner,sun20i-d1
|
||||
|
||||
- description: Carrier boards for the Lichee RV SoM
|
||||
items:
|
||||
- enum:
|
||||
- sipeed,lichee-rv-86-panel-480p
|
||||
- sipeed,lichee-rv-86-panel-720p
|
||||
- sipeed,lichee-rv-dock
|
||||
- const: sipeed,lichee-rv
|
||||
- const: allwinner,sun20i-d1
|
||||
|
||||
- description: MangoPi MQ board
|
||||
items:
|
||||
- const: widora,mangopi-mq
|
||||
- const: allwinner,sun20i-d1s
|
||||
|
||||
- description: MangoPi MQ Pro board
|
||||
items:
|
||||
- const: widora,mangopi-mq-pro
|
||||
- const: allwinner,sun20i-d1
|
||||
|
||||
additionalProperties: true
|
||||
|
||||
...
|
|
@ -0,0 +1,57 @@
|
|||
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/soc/imx/fsl,imx-iomuxc-gpr.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Freescale IOMUX Controller General Purpose Registers
|
||||
|
||||
maintainers:
|
||||
- Peng Fan <peng.fan@nxp.com>
|
||||
|
||||
description:
|
||||
i.MX Processors have an IOMUXC General Purpose Register group for
|
||||
various System Settings
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
oneOf:
|
||||
- items:
|
||||
- const: fsl,imx8mq-iomuxc-gpr
|
||||
- const: syscon
|
||||
- const: simple-mfd
|
||||
- items:
|
||||
- enum:
|
||||
- fsl,imx8mm-iomuxc-gpr
|
||||
- fsl,imx8mn-iomuxc-gpr
|
||||
- fsl,imx8mp-iomuxc-gpr
|
||||
- const: syscon
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
mux-controller:
|
||||
type: object
|
||||
$ref: /schemas/mux/reg-mux.yaml
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
|
||||
examples:
|
||||
# Pinmux controller node
|
||||
- |
|
||||
iomuxc_gpr: syscon@30340000 {
|
||||
compatible = "fsl,imx8mq-iomuxc-gpr", "syscon", "simple-mfd";
|
||||
reg = <0x30340000 0x10000>;
|
||||
|
||||
mux: mux-controller {
|
||||
compatible = "mmio-mux";
|
||||
#mux-control-cells = <1>;
|
||||
mux-reg-masks = <0x34 0x00000004>; /* MIPI_MUX_SEL */
|
||||
};
|
||||
};
|
||||
|
||||
...
|
|
@ -39,6 +39,9 @@ properties:
|
|||
- const: pcie
|
||||
- const: pcie-phy
|
||||
|
||||
'#clock-cells':
|
||||
const: 0
|
||||
|
||||
clocks:
|
||||
minItems: 2
|
||||
maxItems: 2
|
||||
|
@ -85,4 +88,5 @@ examples:
|
|||
power-domain-names = "bus", "usb", "usb-phy1",
|
||||
"usb-phy2", "pcie", "pcie-phy";
|
||||
#power-domain-cells = <1>;
|
||||
#clock-cells = <0>;
|
||||
};
|
||||
|
|
|
@ -0,0 +1,56 @@
|
|||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/soc/renesas/renesas,rzv2m-pwc.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Renesas RZ/V2M External Power Sequence Controller (PWC)
|
||||
|
||||
description: |+
|
||||
The PWC IP found in the RZ/V2M family of chips comes with the below
|
||||
capabilities
|
||||
- external power supply on/off sequence generation
|
||||
- on/off signal generation for the LPDDR4 core power supply (LPVDD)
|
||||
- key input signals processing
|
||||
- general-purpose output pins
|
||||
|
||||
maintainers:
|
||||
- Fabrizio Castro <fabrizio.castro.jz@renesas.com>
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
items:
|
||||
- enum:
|
||||
- renesas,r9a09g011-pwc # RZ/V2M
|
||||
- renesas,r9a09g055-pwc # RZ/V2MA
|
||||
- const: renesas,rzv2m-pwc
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
gpio-controller: true
|
||||
|
||||
'#gpio-cells':
|
||||
const: 2
|
||||
|
||||
renesas,rzv2m-pwc-power:
|
||||
description: The PWC is used to control the system power supplies.
|
||||
type: boolean
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- gpio-controller
|
||||
- '#gpio-cells'
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
pwc: pwc@a3700000 {
|
||||
compatible = "renesas,r9a09g011-pwc", "renesas,rzv2m-pwc";
|
||||
reg = <0xa3700000 0x800>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
renesas,rzv2m-pwc-power;
|
||||
};
|
|
@ -20,6 +20,11 @@ properties:
|
|||
- rockchip,rk3568-pipe-grf
|
||||
- rockchip,rk3568-pipe-phy-grf
|
||||
- rockchip,rk3568-usb2phy-grf
|
||||
- rockchip,rk3588-bigcore0-grf
|
||||
- rockchip,rk3588-bigcore1-grf
|
||||
- rockchip,rk3588-ioc
|
||||
- rockchip,rk3588-php-grf
|
||||
- rockchip,rk3588-sys-grf
|
||||
- rockchip,rk3588-pcie3-phy-grf
|
||||
- rockchip,rk3588-pcie3-pipe-grf
|
||||
- rockchip,rv1108-usbgrf
|
||||
|
@ -92,8 +97,9 @@ allOf:
|
|||
then:
|
||||
properties:
|
||||
edp-phy:
|
||||
description:
|
||||
Documentation/devicetree/bindings/phy/rockchip-dp-phy.txt
|
||||
type: object
|
||||
$ref: /schemas/phy/rockchip,rk3288-dp-phy.yaml#
|
||||
unevaluatedProperties: false
|
||||
|
||||
- if:
|
||||
properties:
|
||||
|
@ -200,7 +206,7 @@ allOf:
|
|||
"usb2phy@[0-9a-f]+$":
|
||||
type: object
|
||||
|
||||
$ref: "/schemas/phy/phy-rockchip-inno-usb2.yaml#"
|
||||
$ref: /schemas/phy/rockchip,inno-usb2phy.yaml#
|
||||
|
||||
unevaluatedProperties: false
|
||||
|
||||
|
|
|
@ -0,0 +1,87 @@
|
|||
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/soc/samsung/samsung,exynos-sysreg.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Samsung Exynos SoC series System Registers (SYSREG)
|
||||
|
||||
maintainers:
|
||||
- Krzysztof Kozlowski <krzk@kernel.org>
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
oneOf:
|
||||
- items:
|
||||
- enum:
|
||||
- samsung,exynos3-sysreg
|
||||
- samsung,exynos4-sysreg
|
||||
- samsung,exynos5-sysreg
|
||||
- tesla,fsd-cam-sysreg
|
||||
- tesla,fsd-fsys0-sysreg
|
||||
- tesla,fsd-fsys1-sysreg
|
||||
- tesla,fsd-peric-sysreg
|
||||
- const: syscon
|
||||
- items:
|
||||
- enum:
|
||||
- samsung,exynos5433-cam0-sysreg
|
||||
- samsung,exynos5433-cam1-sysreg
|
||||
- samsung,exynos5433-disp-sysreg
|
||||
- samsung,exynos5433-fsys-sysreg
|
||||
- const: samsung,exynos5433-sysreg
|
||||
- const: syscon
|
||||
- items:
|
||||
- enum:
|
||||
- samsung,exynos5433-sysreg
|
||||
- samsung,exynos850-sysreg
|
||||
- samsung,exynosautov9-sysreg
|
||||
- const: syscon
|
||||
deprecated: true
|
||||
- items:
|
||||
- enum:
|
||||
- samsung,exynos850-cmgp-sysreg
|
||||
- samsung,exynos850-peri-sysreg
|
||||
- const: samsung,exynos850-sysreg
|
||||
- const: syscon
|
||||
- items:
|
||||
- enum:
|
||||
- samsung,exynosautov9-fsys2-sysreg
|
||||
- samsung,exynosautov9-peric0-sysreg
|
||||
- samsung,exynosautov9-peric1-sysreg
|
||||
- const: samsung,exynosautov9-sysreg
|
||||
- const: syscon
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
clocks:
|
||||
maxItems: 1
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
|
||||
allOf:
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
enum:
|
||||
- samsung,exynos850-cmgp-sysreg
|
||||
- samsung,exynos850-peri-sysreg
|
||||
- samsung,exynos850-sysreg
|
||||
then:
|
||||
required:
|
||||
- clocks
|
||||
else:
|
||||
properties:
|
||||
clocks: false
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
system-controller@10010000 {
|
||||
compatible = "samsung,exynos4-sysreg", "syscon";
|
||||
reg = <0x10010000 0x400>;
|
||||
};
|
|
@ -50,10 +50,10 @@ properties:
|
|||
maxItems: 1
|
||||
|
||||
"#address-cells":
|
||||
const: 1
|
||||
enum: [ 1, 2 ]
|
||||
|
||||
"#size-cells":
|
||||
const: 1
|
||||
enum: [ 1, 2 ]
|
||||
|
||||
ranges: true
|
||||
|
||||
|
|
|
@ -34,10 +34,10 @@ properties:
|
|||
maxItems: 1
|
||||
|
||||
"#address-cells":
|
||||
const: 1
|
||||
enum: [ 1, 2 ]
|
||||
|
||||
"#size-cells":
|
||||
const: 1
|
||||
enum: [ 1, 2 ]
|
||||
|
||||
ranges: true
|
||||
|
||||
|
|
|
@ -69,6 +69,8 @@ patternProperties:
|
|||
description: Annapurna Labs
|
||||
"^alcatel,.*":
|
||||
description: Alcatel
|
||||
"^aldec,.*":
|
||||
description: Aldec, Inc.
|
||||
"^alfa-network,.*":
|
||||
description: ALFA Network Inc.
|
||||
"^allegro,.*":
|
||||
|
@ -264,6 +266,8 @@ patternProperties:
|
|||
description: Cirrus Logic, Inc.
|
||||
"^cisco,.*":
|
||||
description: Cisco Systems, Inc.
|
||||
"^clockwork,.*":
|
||||
description: Clockwork Tech LLC
|
||||
"^cloos,.*":
|
||||
description: Carl Cloos Schweisstechnik GmbH.
|
||||
"^cloudengines,.*":
|
||||
|
@ -374,6 +378,8 @@ patternProperties:
|
|||
description: EBV Elektronik
|
||||
"^eckelmann,.*":
|
||||
description: Eckelmann AG
|
||||
"^edgeble,.*":
|
||||
description: Edgeble AI Technologies Pvt. Ltd.
|
||||
"^edimax,.*":
|
||||
description: EDIMAX Technology Co., Ltd
|
||||
"^edt,.*":
|
||||
|
@ -396,6 +402,8 @@ patternProperties:
|
|||
description: Elimo Engineering Ltd.
|
||||
"^elpida,.*":
|
||||
description: Elpida Memory, Inc.
|
||||
"^embedfire,.*":
|
||||
description: Dongguan EmbedFire Electronic Technology Co., Ltd.
|
||||
"^embest,.*":
|
||||
description: Shenzhen Embest Technology Co., Ltd.
|
||||
"^emlid,.*":
|
||||
|
@ -512,6 +520,8 @@ patternProperties:
|
|||
description: Shenzhen Huiding Technology Co., Ltd.
|
||||
"^google,.*":
|
||||
description: Google, Inc.
|
||||
"^gplus,.*":
|
||||
description: GPLUS
|
||||
"^grinn,.*":
|
||||
description: Grinn
|
||||
"^grmn,.*":
|
||||
|
@ -1025,6 +1035,8 @@ patternProperties:
|
|||
description: PocketBook International SA
|
||||
"^polaroid,.*":
|
||||
description: Polaroid Corporation
|
||||
"^polyhex,.*":
|
||||
description: Polyhex Technology Co. Ltd.
|
||||
"^portwell,.*":
|
||||
description: Portwell Inc.
|
||||
"^poslab,.*":
|
||||
|
@ -1246,6 +1258,8 @@ patternProperties:
|
|||
description: Starry Electronic Technology (ShenZhen) Co., LTD
|
||||
"^startek,.*":
|
||||
description: Startek
|
||||
"^starterkit,.*":
|
||||
description: Starterkit
|
||||
"^ste,.*":
|
||||
description: ST-Ericsson
|
||||
deprecated: true
|
||||
|
@ -1319,6 +1333,8 @@ patternProperties:
|
|||
description: thingy.jp
|
||||
"^thundercomm,.*":
|
||||
description: Thundercomm Technology Co., Ltd.
|
||||
"^thwc,.*":
|
||||
description: Shenzhen Tong Heng Wei Chuang Technology Co., Ltd.
|
||||
"^ti,.*":
|
||||
description: Texas Instruments
|
||||
"^tianma,.*":
|
||||
|
@ -1372,6 +1388,8 @@ patternProperties:
|
|||
description: uCRobotics
|
||||
"^udoo,.*":
|
||||
description: Udoo
|
||||
"^ufispace,.*":
|
||||
description: Ufi Space Co., Ltd.
|
||||
"^ugoos,.*":
|
||||
description: Ugoos Industrial Co., Ltd.
|
||||
"^uniwest,.*":
|
||||
|
@ -1444,6 +1462,8 @@ patternProperties:
|
|||
description: Shenzhen whwave Electronics, Inc.
|
||||
"^wi2wi,.*":
|
||||
description: Wi2Wi, Inc.
|
||||
"^widora,.*":
|
||||
description: Beijing Widora Technology Co., Ltd.
|
||||
"^wiligear,.*":
|
||||
description: Wiligear, Ltd.
|
||||
"^willsemi,.*":
|
||||
|
|
|
@ -1871,7 +1871,7 @@ F: drivers/pinctrl/sunxi/
|
|||
F: drivers/soc/sunxi/
|
||||
N: allwinner
|
||||
N: sun[x456789]i
|
||||
N: sun50i
|
||||
N: sun[25]0i
|
||||
|
||||
ARM/Amlogic Meson SoC CLOCK FRAMEWORK
|
||||
M: Neil Armstrong <neil.armstrong@linaro.org>
|
||||
|
@ -2669,7 +2669,7 @@ F: Documentation/devicetree/bindings/i2c/i2c-rk3x.yaml
|
|||
F: Documentation/devicetree/bindings/mmc/rockchip-dw-mshc.yaml
|
||||
F: Documentation/devicetree/bindings/spi/spi-rockchip.yaml
|
||||
F: arch/arm/boot/dts/rk3*
|
||||
F: arch/arm/boot/dts/rv1108*
|
||||
F: arch/arm/boot/dts/rv11*
|
||||
F: arch/arm/mach-rockchip/
|
||||
F: drivers/*/*/*rockchip*
|
||||
F: drivers/*/*rockchip*
|
||||
|
@ -2871,7 +2871,7 @@ M: linux-fsd@tesla.com
|
|||
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
|
||||
L: linux-samsung-soc@vger.kernel.org
|
||||
S: Maintained
|
||||
F: arch/arm64/boot/dts/tesla*
|
||||
F: arch/arm64/boot/dts/tesla/
|
||||
|
||||
ARM/TETON BGA MACHINE SUPPORT
|
||||
M: "Mark F. Brown" <mark.brown314@gmail.com>
|
||||
|
|
|
@ -51,6 +51,7 @@ dtb-$(CONFIG_SOC_AT91SAM9) += \
|
|||
at91sam9x25ek.dtb \
|
||||
at91sam9x35ek.dtb
|
||||
dtb-$(CONFIG_SOC_SAM9X60) += \
|
||||
at91-sam9x60_curiosity.dtb \
|
||||
at91-sam9x60ek.dtb
|
||||
dtb-$(CONFIG_SOC_SAM_V7) += \
|
||||
at91-kizbox2-2.dtb \
|
||||
|
@ -246,6 +247,7 @@ dtb-$(CONFIG_ARCH_EXYNOS5) += \
|
|||
exynos5422-odroidxu3.dtb \
|
||||
exynos5422-odroidxu3-lite.dtb \
|
||||
exynos5422-odroidxu4.dtb \
|
||||
exynos5422-samsung-k3g.dtb \
|
||||
exynos5800-peach-pi.dtb
|
||||
dtb-$(CONFIG_ARCH_GEMINI) += \
|
||||
gemini-dlink-dir-685.dtb \
|
||||
|
@ -465,6 +467,7 @@ dtb-$(CONFIG_SOC_IMX53) += \
|
|||
imx53-ppd.dtb \
|
||||
imx53-qsb.dtb \
|
||||
imx53-qsrb.dtb \
|
||||
imx53-sk-imx53.dtb \
|
||||
imx53-smd.dtb \
|
||||
imx53-tx53-x03x.dtb \
|
||||
imx53-tx53-x13x.dtb \
|
||||
|
@ -740,6 +743,9 @@ dtb-$(CONFIG_SOC_IMX6UL) += \
|
|||
imx6ull-colibri-wifi-eval-v3.dtb \
|
||||
imx6ull-colibri-wifi-iris.dtb \
|
||||
imx6ull-colibri-wifi-iris-v2.dtb \
|
||||
imx6ull-dhcom-drc02.dtb \
|
||||
imx6ull-dhcom-pdk2.dtb \
|
||||
imx6ull-dhcom-picoitx.dtb \
|
||||
imx6ull-jozacp.dtb \
|
||||
imx6ull-kontron-bl.dtb \
|
||||
imx6ull-myir-mys-6ulx-eval.dtb \
|
||||
|
@ -1127,12 +1133,14 @@ dtb-$(CONFIG_ARCH_RENESAS) += \
|
|||
dtb-$(CONFIG_ARCH_ROCKCHIP) += \
|
||||
rv1108-elgin-r1.dtb \
|
||||
rv1108-evb.dtb \
|
||||
rv1126-edgeble-neu2-io.dtb \
|
||||
rk3036-evb.dtb \
|
||||
rk3036-kylin.dtb \
|
||||
rk3066a-bqcurie2.dtb \
|
||||
rk3066a-marsboard.dtb \
|
||||
rk3066a-mk808.dtb \
|
||||
rk3066a-rayeager.dtb \
|
||||
rk3128-evb.dtb \
|
||||
rk3188-bqedison2qc.dtb \
|
||||
rk3188-px3-evb.dtb \
|
||||
rk3188-radxarock.dtb \
|
||||
|
@ -1177,6 +1185,7 @@ dtb-$(CONFIG_ARCH_S5PV210) += \
|
|||
dtb-$(CONFIG_ARCH_INTEL_SOCFPGA) += \
|
||||
socfpga_arria5_socdk.dtb \
|
||||
socfpga_arria10_chameleonv3.dtb \
|
||||
socfpga_arria10_mercury_pe1.dtb \
|
||||
socfpga_arria10_socdk_nand.dtb \
|
||||
socfpga_arria10_socdk_qspi.dtb \
|
||||
socfpga_arria10_socdk_sdmmc.dtb \
|
||||
|
@ -1603,6 +1612,7 @@ dtb-$(CONFIG_ARCH_ASPEED) += \
|
|||
aspeed-bmc-facebook-elbert.dtb \
|
||||
aspeed-bmc-facebook-fuji.dtb \
|
||||
aspeed-bmc-facebook-galaxy100.dtb \
|
||||
aspeed-bmc-facebook-greatlakes.dtb \
|
||||
aspeed-bmc-facebook-minipack.dtb \
|
||||
aspeed-bmc-facebook-tiogapass.dtb \
|
||||
aspeed-bmc-facebook-wedge40.dtb \
|
||||
|
@ -1639,6 +1649,7 @@ dtb-$(CONFIG_ARCH_ASPEED) += \
|
|||
aspeed-bmc-inventec-transformers.dtb \
|
||||
aspeed-bmc-tyan-s7106.dtb \
|
||||
aspeed-bmc-tyan-s8036.dtb \
|
||||
aspeed-bmc-ufispace-ncplite.dtb \
|
||||
aspeed-bmc-vegman-n110.dtb \
|
||||
aspeed-bmc-vegman-rx20.dtb \
|
||||
aspeed-bmc-vegman-sx20.dtb
|
||||
|
|
|
@ -126,7 +126,7 @@ pmu {
|
|||
<GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
|
||||
};
|
||||
|
||||
uart0: uart@fd883000 {
|
||||
uart0: serial@fd883000 {
|
||||
compatible = "ns16550a";
|
||||
reg = <0x0 0xfd883000 0x0 0x1000>;
|
||||
clock-frequency = <375000000>;
|
||||
|
@ -135,7 +135,7 @@ uart0: uart@fd883000 {
|
|||
reg-io-width = <4>;
|
||||
};
|
||||
|
||||
uart1: uart@fd884000 {
|
||||
uart1: serial@fd884000 {
|
||||
compatible = "ns16550a";
|
||||
reg = <0x0 0xfd884000 0x0 0x1000>;
|
||||
clock-frequency = <375000000>;
|
||||
|
|
|
@ -120,8 +120,8 @@ AM33XX_PADCONF(AM335X_PIN_SPI0_D0, PIN_OUTPUT, MUX_MODE1) /* spi0_d0.uart2_txd
|
|||
|
||||
uart3_pins: uart3_pins {
|
||||
pinctrl-single,pins = <
|
||||
AM33XX_PADCONF(AM335X_PIN_LCD_DATA10, PIN_INPUT_PULLUP, MUX_MODE6) /* lcd_data10.uart3_ctsn */
|
||||
AM33XX_PADCONF(AM335X_PIN_LCD_DATA11, PIN_OUTPUT, MUX_MODE6) /* lcd_data11.uart3_rtsn */
|
||||
AM33XX_PADCONF(AM335X_PIN_LCD_DATA10, PIN_INPUT_PULLUP, MUX_MODE7) /* lcd_data10.gpio2[16] */
|
||||
AM33XX_PADCONF(AM335X_PIN_LCD_DATA11, PIN_OUTPUT, MUX_MODE7) /* lcd_data11.gpio2[17] */
|
||||
AM33XX_PADCONF(AM335X_PIN_SPI0_CS1, PIN_INPUT, MUX_MODE1) /* spi0_cs1.uart3_rxd */
|
||||
AM33XX_PADCONF(AM335X_PIN_ECAP0_IN_PWM0_OUT, PIN_OUTPUT, MUX_MODE1) /* ecap0_in_pwm0_out.uart3_txd */
|
||||
>;
|
||||
|
@ -129,8 +129,8 @@ AM33XX_PADCONF(AM335X_PIN_ECAP0_IN_PWM0_OUT, PIN_OUTPUT, MUX_MODE1) /* ecap0_in
|
|||
|
||||
uart4_pins: uart4_pins {
|
||||
pinctrl-single,pins = <
|
||||
AM33XX_PADCONF(AM335X_PIN_LCD_DATA12, PIN_INPUT_PULLUP, MUX_MODE6) /* lcd_data12.uart4_ctsn */
|
||||
AM33XX_PADCONF(AM335X_PIN_LCD_DATA13, PIN_OUTPUT, MUX_MODE6) /* lcd_data13.uart4_rtsn */
|
||||
AM33XX_PADCONF(AM335X_PIN_LCD_DATA12, PIN_INPUT_PULLUP, MUX_MODE7) /* lcd_data12.gpio0[8] */
|
||||
AM33XX_PADCONF(AM335X_PIN_LCD_DATA13, PIN_OUTPUT, MUX_MODE7) /* lcd_data13.gpio0[9] */
|
||||
AM33XX_PADCONF(AM335X_PIN_UART0_CTSN, PIN_INPUT, MUX_MODE1) /* uart0_ctsn.uart4_rxd */
|
||||
AM33XX_PADCONF(AM335X_PIN_UART0_RTSN, PIN_OUTPUT, MUX_MODE1) /* uart0_rtsn.uart4_txd */
|
||||
>;
|
||||
|
@ -187,12 +187,22 @@ &uart2 {
|
|||
&uart3 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&uart3_pins>;
|
||||
rts-gpio = <&gpio2 17 GPIO_ACTIVE_HIGH>;
|
||||
rs485-rts-active-high;
|
||||
rs485-rx-during-tx;
|
||||
rs485-rts-delay = <1 1>;
|
||||
linux,rs485-enabled-at-boot-time;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&uart4 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&uart4_pins>;
|
||||
rts-gpio = <&gpio0 9 GPIO_ACTIVE_HIGH>;
|
||||
rs485-rts-active-high;
|
||||
rs485-rx-during-tx;
|
||||
rs485-rts-delay = <1 1>;
|
||||
linux,rs485-enabled-at-boot-time;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
|
@ -220,6 +230,11 @@ tps: tps@24 {
|
|||
reg = <0x24>;
|
||||
};
|
||||
|
||||
temperature-sensor@48 {
|
||||
compatible = "lm75";
|
||||
reg = <0x48>;
|
||||
};
|
||||
|
||||
eeprom@53 {
|
||||
compatible = "microchip,24c02", "atmel,24c02";
|
||||
reg = <0x53>;
|
||||
|
@ -403,8 +418,13 @@ &mmc1 {
|
|||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&mmc1_pins>;
|
||||
bus-width = <4>;
|
||||
cd-gpios = <&gpio3 8 0>;
|
||||
wp-gpios = <&gpio3 18 0>;
|
||||
cd-debounce-delay-ms = <5>;
|
||||
cd-gpios = <&gpio3 8 GPIO_ACTIVE_LOW>;
|
||||
wp-gpios = <&gpio3 18 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
&usb0 {
|
||||
dr_mode = "host";
|
||||
};
|
||||
|
||||
#include "tps65217.dtsi"
|
||||
|
|
|
@ -106,7 +106,7 @@ &i2c1 {
|
|||
* "i2c-mux-idle-disconnect" is important.
|
||||
*/
|
||||
|
||||
pca9548@70 {
|
||||
i2c-mux@70 {
|
||||
compatible = "nxp,pca9548";
|
||||
reg = <0x70>;
|
||||
#address-cells = <1>;
|
||||
|
@ -256,7 +256,7 @@ u59: pca9575@23 {
|
|||
};
|
||||
|
||||
&i2c2 {
|
||||
pca9548@71 {
|
||||
i2c-mux@71 {
|
||||
compatible = "nxp,pca9548";
|
||||
reg = <0x71>;
|
||||
#address-cells = <1>;
|
||||
|
|
|
@ -5,6 +5,7 @@
|
|||
|
||||
#include "aspeed-g5.dtsi"
|
||||
#include <dt-bindings/gpio/aspeed-gpio.h>
|
||||
#include <dt-bindings/interrupt-controller/irq.h>
|
||||
|
||||
/ {
|
||||
model = "AMD EthanolX BMC";
|
||||
|
@ -58,10 +59,22 @@ &fmc {
|
|||
flash@0 {
|
||||
status = "okay";
|
||||
m25p,fast-read;
|
||||
label = "bmc";
|
||||
#include "openbmc-flash-layout.dtsi"
|
||||
};
|
||||
};
|
||||
|
||||
&spi1 {
|
||||
status = "okay";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_spi1_default>;
|
||||
flash@0 {
|
||||
status = "okay";
|
||||
m25p,fast-read;
|
||||
label = "bios";
|
||||
spi-max-frequency = <100000000>;
|
||||
};
|
||||
};
|
||||
|
||||
&mac0 {
|
||||
status = "okay";
|
||||
|
@ -78,7 +91,9 @@ &uart1 {
|
|||
status = "okay";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_txd1_default
|
||||
&pinctrl_rxd1_default>;
|
||||
&pinctrl_rxd1_default
|
||||
&pinctrl_nrts1_default
|
||||
&pinctrl_ncts1_default>;
|
||||
};
|
||||
|
||||
&uart5 {
|
||||
|
@ -160,7 +175,7 @@ &i2c2 {
|
|||
&i2c3 {
|
||||
status = "okay";
|
||||
eeprom@50 {
|
||||
compatible = "atmel,24c256";
|
||||
compatible = "atmel,24c128";
|
||||
reg = <0x50>;
|
||||
pagesize = <64>;
|
||||
};
|
||||
|
@ -261,6 +276,12 @@ &lpc_ctrl {
|
|||
status = "okay";
|
||||
};
|
||||
|
||||
&vuart {
|
||||
status = "okay";
|
||||
aspeed,lpc-io-reg = <0x3f8>;
|
||||
aspeed,lpc-interrupts = <4 IRQ_TYPE_LEVEL_HIGH>;
|
||||
};
|
||||
|
||||
&pwm_tacho {
|
||||
status = "okay";
|
||||
pinctrl-names = "default";
|
||||
|
|
|
@ -307,7 +307,7 @@ flash@0 {
|
|||
flash@1 {
|
||||
status = "okay";
|
||||
m25p,fast-read;
|
||||
label = "flash1";
|
||||
label = "alt-bmc";
|
||||
spi-max-frequency = <50000000>;
|
||||
};
|
||||
};
|
||||
|
@ -1064,3 +1064,14 @@ pinctrl_gpiov2_unbiased_default: gpiov2 {
|
|||
bias-disable;
|
||||
};
|
||||
};
|
||||
|
||||
&wdt1 {
|
||||
status = "okay";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_wdtrst1_default>;
|
||||
aspeed,reset-type = "soc";
|
||||
aspeed,external-signal;
|
||||
aspeed,ext-push-pull;
|
||||
aspeed,ext-active-high;
|
||||
aspeed,ext-pulse-duration = <256>;
|
||||
};
|
||||
|
|
241
arch/arm/boot/dts/aspeed-bmc-facebook-greatlakes.dts
Normal file
241
arch/arm/boot/dts/aspeed-bmc-facebook-greatlakes.dts
Normal file
|
@ -0,0 +1,241 @@
|
|||
// SPDX-License-Identifier: GPL-2.0-or-later
|
||||
// Copyright 2022 Facebook Inc.
|
||||
|
||||
/dts-v1/;
|
||||
#include "aspeed-g6.dtsi"
|
||||
#include <dt-bindings/gpio/aspeed-gpio.h>
|
||||
#include <dt-bindings/leds/leds-pca955x.h>
|
||||
#include <dt-bindings/i2c/i2c.h>
|
||||
|
||||
/ {
|
||||
model = "Facebook Greatlakes BMC";
|
||||
compatible = "facebook,greatlakes-bmc", "aspeed,ast2600";
|
||||
|
||||
aliases {
|
||||
serial4 = &uart5;
|
||||
};
|
||||
|
||||
memory@80000000 {
|
||||
device_type = "memory";
|
||||
reg = <0x80000000 0x80000000>;
|
||||
};
|
||||
|
||||
iio-hwmon {
|
||||
compatible = "iio-hwmon";
|
||||
io-channels = <&adc0 0>, <&adc0 1>, <&adc0 2>, <&adc0 3>,
|
||||
<&adc0 4>, <&adc0 5>, <&adc0 6>, <&adc0 7>,
|
||||
<&adc1 0>, <&adc1 2>, <&adc1 3>, <&adc1 4>,
|
||||
<&adc1 5>, <&adc1 6>;
|
||||
};
|
||||
};
|
||||
|
||||
&uart1 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&uart2 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&uart3 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&uart4 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&uart5 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&wdt1 {
|
||||
status = "okay";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_wdtrst1_default>;
|
||||
aspeed,reset-type = "soc";
|
||||
aspeed,external-signal;
|
||||
aspeed,ext-push-pull;
|
||||
aspeed,ext-active-high;
|
||||
aspeed,ext-pulse-duration = <256>;
|
||||
};
|
||||
|
||||
&mac3 {
|
||||
status = "okay";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_rmii4_default>;
|
||||
no-hw-checksum;
|
||||
use-ncsi;
|
||||
mlx,multi-host;
|
||||
ncsi-ctrl,start-redo-probe;
|
||||
ncsi-ctrl,no-channel-monitor;
|
||||
ncsi-package = <1>;
|
||||
ncsi-channel = <1>;
|
||||
ncsi-rexmit = <1>;
|
||||
ncsi-timeout = <2>;
|
||||
};
|
||||
|
||||
&rtc {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&fmc {
|
||||
status = "okay";
|
||||
flash@0 {
|
||||
status = "okay";
|
||||
m25p,fast-read;
|
||||
label = "bmc";
|
||||
spi-rx-bus-width = <4>;
|
||||
spi-max-frequency = <50000000>;
|
||||
#include "openbmc-flash-layout-64.dtsi"
|
||||
};
|
||||
flash@1 {
|
||||
status = "okay";
|
||||
m25p,fast-read;
|
||||
label = "bmc2";
|
||||
spi-rx-bus-width = <4>;
|
||||
spi-max-frequency = <50000000>;
|
||||
};
|
||||
};
|
||||
|
||||
&i2c0 {
|
||||
status = "okay";
|
||||
multi-master;
|
||||
ipmb@10 {
|
||||
compatible = "ipmb-dev";
|
||||
reg = <(0x10 | I2C_OWN_SLAVE_ADDRESS)>;
|
||||
i2c-protocol;
|
||||
};
|
||||
};
|
||||
|
||||
&i2c1 {
|
||||
status = "okay";
|
||||
multi-master;
|
||||
ipmb@10 {
|
||||
compatible = "ipmb-dev";
|
||||
reg = <(0x10 | I2C_OWN_SLAVE_ADDRESS)>;
|
||||
i2c-protocol;
|
||||
};
|
||||
};
|
||||
|
||||
&i2c2 {
|
||||
status = "okay";
|
||||
multi-master;
|
||||
ipmb@10 {
|
||||
compatible = "ipmb-dev";
|
||||
reg = <(0x10 | I2C_OWN_SLAVE_ADDRESS)>;
|
||||
i2c-protocol;
|
||||
};
|
||||
};
|
||||
|
||||
&i2c3 {
|
||||
status = "okay";
|
||||
multi-master;
|
||||
ipmb@10 {
|
||||
compatible = "ipmb-dev";
|
||||
reg = <(0x10 | I2C_OWN_SLAVE_ADDRESS)>;
|
||||
i2c-protocol;
|
||||
};
|
||||
};
|
||||
|
||||
&i2c4 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&i2c5 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&i2c6 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&i2c7 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&i2c8 {
|
||||
status = "okay";
|
||||
temperature-sensor@1f {
|
||||
compatible = "ti,tmp421";
|
||||
reg = <0x1f>;
|
||||
};
|
||||
// NIC EEPROM
|
||||
eeprom@50 {
|
||||
compatible = "st,24c32";
|
||||
reg = <0x50>;
|
||||
};
|
||||
};
|
||||
|
||||
&i2c9 {
|
||||
status = "okay";
|
||||
multi-master;
|
||||
ipmb@10 {
|
||||
compatible = "ipmb-dev";
|
||||
reg = <(0x10 | I2C_OWN_SLAVE_ADDRESS)>;
|
||||
i2c-protocol;
|
||||
};
|
||||
};
|
||||
|
||||
&i2c10 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&i2c11 {
|
||||
status = "okay";
|
||||
eeprom@51 {
|
||||
compatible = "atmel,24c128";
|
||||
reg = <0x51>;
|
||||
};
|
||||
eeprom@54 {
|
||||
compatible = "atmel,24c128";
|
||||
reg = <0x54>;
|
||||
};
|
||||
};
|
||||
|
||||
&i2c12 {
|
||||
status = "okay";
|
||||
temperature-sensor@4f {
|
||||
compatible = "lm75";
|
||||
reg = <0x4f>;
|
||||
};
|
||||
};
|
||||
|
||||
&i2c13 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&adc0 {
|
||||
ref_voltage = <2500>;
|
||||
status = "okay";
|
||||
pinctrl-0 = <&pinctrl_adc0_default &pinctrl_adc1_default
|
||||
&pinctrl_adc2_default &pinctrl_adc3_default
|
||||
&pinctrl_adc4_default &pinctrl_adc5_default
|
||||
&pinctrl_adc6_default &pinctrl_adc7_default>;
|
||||
};
|
||||
|
||||
&adc1 {
|
||||
ref_voltage = <2500>;
|
||||
status = "okay";
|
||||
pinctrl-0 = <&pinctrl_adc8_default &pinctrl_adc10_default
|
||||
&pinctrl_adc11_default &pinctrl_adc12_default
|
||||
&pinctrl_adc13_default &pinctrl_adc14_default>;
|
||||
};
|
||||
|
||||
|
||||
&ehci0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&ehci1 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&uhci {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&gpio0 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_gpiu1_default &pinctrl_gpiu7_default>;
|
||||
};
|
|
@ -857,6 +857,10 @@ &i2c15 {
|
|||
status = "okay";
|
||||
};
|
||||
|
||||
&uart2 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&vuart1 {
|
||||
status = "okay";
|
||||
};
|
||||
|
|
|
@ -3649,6 +3649,10 @@ &ibt {
|
|||
status = "okay";
|
||||
};
|
||||
|
||||
&uart2 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&vuart1 {
|
||||
status = "okay";
|
||||
};
|
||||
|
|
|
@ -2352,6 +2352,10 @@ led@7 {
|
|||
};
|
||||
};
|
||||
|
||||
&uart2 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&vuart1 {
|
||||
status = "okay";
|
||||
};
|
||||
|
|
|
@ -364,6 +364,7 @@ &kcs1 {
|
|||
&kcs3 {
|
||||
status = "okay";
|
||||
aspeed,lpc-io-reg = <0xca2>;
|
||||
aspeed,lpc-interrupts = <1 IRQ_TYPE_LEVEL_HIGH>;
|
||||
};
|
||||
|
||||
/* Enable BMC VGA output to show an early (pre-BIOS) boot screen */
|
||||
|
|
360
arch/arm/boot/dts/aspeed-bmc-ufispace-ncplite.dts
Normal file
360
arch/arm/boot/dts/aspeed-bmc-ufispace-ncplite.dts
Normal file
|
@ -0,0 +1,360 @@
|
|||
// SPDX-License-Identifier: GPL-2.0-or-later
|
||||
// Copyright (c) 2022 Ufispace Co., Ltd.
|
||||
/dts-v1/;
|
||||
|
||||
#include "aspeed-g6.dtsi"
|
||||
#include <dt-bindings/i2c/i2c.h>
|
||||
#include <dt-bindings/gpio/aspeed-gpio.h>
|
||||
|
||||
/ {
|
||||
model = "Ufispace NCPLite BMC";
|
||||
compatible = "ufispace,ncplite-bmc", "aspeed,ast2600";
|
||||
|
||||
aliases {
|
||||
serial4 = &uart5;
|
||||
};
|
||||
|
||||
chosen {
|
||||
stdout-path = &uart5;
|
||||
bootargs = "console=ttyS4,115200n8 earlycon";
|
||||
};
|
||||
|
||||
memory@80000000 {
|
||||
device_type = "memory";
|
||||
reg = <0x80000000 0x80000000>;
|
||||
};
|
||||
|
||||
iio-hwmon {
|
||||
compatible = "iio-hwmon";
|
||||
io-channels = <&adc0 0>, <&adc0 1>, <&adc0 2>, <&adc0 3>,
|
||||
<&adc0 4>, <&adc0 5>, <&adc0 6>, <&adc0 7>,
|
||||
<&adc1 0>, <&adc1 1>, <&adc1 2>, <&adc1 3>,
|
||||
<&adc1 4>, <&adc1 5>, <&adc1 6>, <&adc1 7>;
|
||||
};
|
||||
|
||||
gpio-keys {
|
||||
compatible = "gpio-keys";
|
||||
|
||||
fan-status-int-l {
|
||||
label = "fan-status-int-l";
|
||||
gpios = <&gpio0 ASPEED_GPIO(M, 2) GPIO_ACTIVE_LOW>;
|
||||
linux,code = <ASPEED_GPIO(M, 2)>;
|
||||
};
|
||||
|
||||
allpwr-good {
|
||||
label = "allpwr-good";
|
||||
gpios = <&gpio0 ASPEED_GPIO(V, 4) GPIO_ACTIVE_HIGH>;
|
||||
linux,code = <ASPEED_GPIO(V, 4)>;
|
||||
};
|
||||
|
||||
psu0-alert-n {
|
||||
label = "psu0-alert-n";
|
||||
gpios = <&gpio0 ASPEED_GPIO(V, 1) GPIO_ACTIVE_LOW>;
|
||||
linux,code = <ASPEED_GPIO(V, 1)>;
|
||||
};
|
||||
|
||||
psu1-alert-n {
|
||||
label = "psu1-alert-n";
|
||||
gpios = <&gpio0 ASPEED_GPIO(V, 2) GPIO_ACTIVE_LOW>;
|
||||
linux,code = <ASPEED_GPIO(V, 2)>;
|
||||
};
|
||||
|
||||
int-thermal-alert {
|
||||
label = "int-thermal-alert";
|
||||
gpios = <&gpio0 ASPEED_GPIO(P, 2) GPIO_ACTIVE_LOW>;
|
||||
linux,code = <ASPEED_GPIO(P, 2)>;
|
||||
};
|
||||
|
||||
cpu-caterr-l {
|
||||
label = "cpu-caterr-l";
|
||||
gpios = <&gpio0 ASPEED_GPIO(N, 3) GPIO_ACTIVE_LOW>;
|
||||
linux,code = <ASPEED_GPIO(N, 3)>;
|
||||
};
|
||||
|
||||
cpu-thermtrip-l {
|
||||
label = "cpu-thermtrip-l";
|
||||
gpios = <&gpio0 ASPEED_GPIO(V, 5) GPIO_ACTIVE_LOW>;
|
||||
linux,code = <ASPEED_GPIO(V, 5)>;
|
||||
};
|
||||
|
||||
psu0-presence-l {
|
||||
label = "psu0-presence-l";
|
||||
gpios = <&gpio0 ASPEED_GPIO(F, 6) GPIO_ACTIVE_LOW>;
|
||||
linux,code = <ASPEED_GPIO(F, 6)>;
|
||||
};
|
||||
|
||||
psu1-presence-l {
|
||||
label = "psu1-presence-l";
|
||||
gpios = <&gpio0 ASPEED_GPIO(F, 7) GPIO_ACTIVE_LOW>;
|
||||
linux,code = <ASPEED_GPIO(F, 7)>;
|
||||
};
|
||||
|
||||
psu0-power-ok {
|
||||
label = "psu0-power-ok";
|
||||
gpios = <&gpio0 ASPEED_GPIO(M, 4) GPIO_ACTIVE_HIGH>;
|
||||
linux,code = <ASPEED_GPIO(M, 4)>;
|
||||
};
|
||||
|
||||
psu1-power-ok {
|
||||
label = "psu1-power-ok";
|
||||
gpios = <&gpio0 ASPEED_GPIO(M, 5) GPIO_ACTIVE_HIGH>;
|
||||
linux,code = <ASPEED_GPIO(M, 5)>;
|
||||
};
|
||||
};
|
||||
|
||||
gpio-keys-polled {
|
||||
compatible = "gpio-keys-polled";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
poll-interval = <1000>;
|
||||
|
||||
fan0-presence {
|
||||
label = "fan0-presence";
|
||||
gpios = <&fan_ioexp 2 GPIO_ACTIVE_LOW>;
|
||||
linux,code = <2>;
|
||||
};
|
||||
|
||||
fan1-presence {
|
||||
label = "fan1-presence";
|
||||
gpios = <&fan_ioexp 6 GPIO_ACTIVE_LOW>;
|
||||
linux,code = <6>;
|
||||
};
|
||||
|
||||
fan2-presence {
|
||||
label = "fan2-presence";
|
||||
gpios = <&fan_ioexp 10 GPIO_ACTIVE_LOW>;
|
||||
linux,code = <10>;
|
||||
};
|
||||
|
||||
fan3-presence {
|
||||
label = "fan3-presence";
|
||||
gpios = <&fan_ioexp 14 GPIO_ACTIVE_LOW>;
|
||||
linux,code = <14>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&mac2 {
|
||||
status = "okay";
|
||||
use-ncsi;
|
||||
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_rmii3_default>;
|
||||
clocks = <&syscon ASPEED_CLK_GATE_MAC3CLK>,
|
||||
<&syscon ASPEED_CLK_MAC3RCLK>;
|
||||
clock-names = "MACCLK", "RCLK";
|
||||
};
|
||||
|
||||
&fmc {
|
||||
status = "okay";
|
||||
flash@0 {
|
||||
status = "okay";
|
||||
m25p,fast-read;
|
||||
label = "bmc";
|
||||
spi-max-frequency = <50000000>;
|
||||
#include "openbmc-flash-layout-64.dtsi"
|
||||
};
|
||||
|
||||
flash@1 {
|
||||
status = "okay";
|
||||
m25p,fast-read;
|
||||
label = "alt-bmc";
|
||||
spi-max-frequency = <50000000>;
|
||||
#include "openbmc-flash-layout-64-alt.dtsi"
|
||||
};
|
||||
};
|
||||
|
||||
&uart1 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&uart4 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&uart5 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&kcs3 {
|
||||
status = "okay";
|
||||
aspeed,lpc-io-reg = <0xca2>;
|
||||
};
|
||||
|
||||
&lpc_reset {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&lpc_ctrl {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&uart_routing {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&wdt1 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&wdt2 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&peci0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&udc {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&adc0 {
|
||||
vref = <2500>;
|
||||
status = "okay";
|
||||
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_adc0_default &pinctrl_adc1_default
|
||||
&pinctrl_adc2_default &pinctrl_adc3_default
|
||||
&pinctrl_adc4_default &pinctrl_adc5_default
|
||||
&pinctrl_adc6_default &pinctrl_adc7_default>;
|
||||
};
|
||||
|
||||
&adc1 {
|
||||
vref = <2500>;
|
||||
status = "okay";
|
||||
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_adc8_default &pinctrl_adc9_default
|
||||
&pinctrl_adc10_default &pinctrl_adc11_default
|
||||
&pinctrl_adc12_default &pinctrl_adc13_default
|
||||
&pinctrl_adc14_default &pinctrl_adc15_default>;
|
||||
};
|
||||
|
||||
&i2c0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&i2c1 {
|
||||
status = "okay";
|
||||
|
||||
lm75@48 {
|
||||
compatible = "national,lm75";
|
||||
reg = <0x48>;
|
||||
};
|
||||
|
||||
lm75@49 {
|
||||
compatible = "national,lm75";
|
||||
reg = <0x49>;
|
||||
};
|
||||
|
||||
lm86@4c {
|
||||
compatible = "national,lm86";
|
||||
reg = <0x4c>;
|
||||
};
|
||||
};
|
||||
|
||||
&i2c2 {
|
||||
status = "okay";
|
||||
|
||||
lm75@4f {
|
||||
cpmpatible = "national,lm75";
|
||||
reg = <0x4f>;
|
||||
};
|
||||
|
||||
fan_ioexp: pca9535@20 {
|
||||
compatible = "nxp,pca9535";
|
||||
reg = <0x20>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
|
||||
gpio-line-names =
|
||||
"","","presence-fan0","",
|
||||
"","","presence-fan1","",
|
||||
"","","presence-fan2","",
|
||||
"","","presence-fan3","";
|
||||
};
|
||||
};
|
||||
|
||||
&i2c3 {
|
||||
status = "okay";
|
||||
|
||||
eeprom@50 {
|
||||
compatible = "atmel,24c128";
|
||||
reg = <0x50>;
|
||||
pagesize = <64>;
|
||||
};
|
||||
};
|
||||
|
||||
&i2c4 {
|
||||
status = "okay";
|
||||
|
||||
psu@58 {
|
||||
compatible = "pmbus";
|
||||
reg = <0x58>;
|
||||
};
|
||||
|
||||
eeprom@50 {
|
||||
compatible = "atmel,24c02";
|
||||
reg = <0x50>;
|
||||
pagesize = <1>;
|
||||
};
|
||||
};
|
||||
|
||||
&i2c5 {
|
||||
status = "okay";
|
||||
|
||||
psu@58 {
|
||||
compatible = "pmbus";
|
||||
reg = <0x58>;
|
||||
};
|
||||
|
||||
eeprom@50 {
|
||||
compatible = "atmel,24c02";
|
||||
reg = <0x50>;
|
||||
pagesize = <1>;
|
||||
};
|
||||
};
|
||||
|
||||
&i2c8 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&i2c10 {
|
||||
status = "okay";
|
||||
|
||||
lm75@4d {
|
||||
compatible = "national,lm75";
|
||||
reg = <0x4d>;
|
||||
};
|
||||
};
|
||||
|
||||
&gpio0 {
|
||||
status = "okay";
|
||||
|
||||
gpio-line-names =
|
||||
/*A0-A7*/ "","","","","","","","",
|
||||
/*B0-B7*/ "","","","","","","","",
|
||||
/*C0-C7*/ "","","","","","","","",
|
||||
/*D0-D7*/ "","","","","","","","",
|
||||
/*E0-E7*/ "","","","","","","","",
|
||||
/*F0-F7*/ "CPU_PWRGD","","","power-button","host0-ready","","presence-ps0","presence-ps1",
|
||||
/*G0-G7*/ "","","","","","","","",
|
||||
/*H0-H7*/ "","","","","","","","",
|
||||
/*I0-I7*/ "","","","","","reset-button","","",
|
||||
/*J0-J7*/ "","","","","","","","",
|
||||
/*K0-K7*/ "","","","","","","","",
|
||||
/*L0-L7*/ "","","","","","","","",
|
||||
/*M0-M7*/ "","","","","","","","",
|
||||
/*N0-N7*/ "power-chassis-control0","power-chassis-control1","","","","","","",
|
||||
/*O0-O7*/ "","","","","","","","",
|
||||
/*P0-P7*/ "","","","","","","","",
|
||||
/*Q0-Q7*/ "","","","","","","","",
|
||||
/*R0-R7*/ "","","","","","","","",
|
||||
/*S0-S7*/ "","","","","","","","",
|
||||
/*T0-T7*/ "","","","","","","","",
|
||||
/*U0-U7*/ "","","","","","","","",
|
||||
/*V0-V7*/ "","","","","power-chassis-good","","","";
|
||||
};
|
|
@ -31,37 +31,37 @@ reset-button {
|
|||
leds {
|
||||
compatible = "gpio-leds";
|
||||
|
||||
ethernet {
|
||||
led-ethernet {
|
||||
label = "gatwick:yellow:ethernet";
|
||||
gpios = <&pioA 10 GPIO_ACTIVE_LOW>;
|
||||
default-state = "off";
|
||||
};
|
||||
|
||||
wifi {
|
||||
led-wifi {
|
||||
label = "gatwick:green:wifi";
|
||||
gpios = <&pioA 28 GPIO_ACTIVE_LOW>;
|
||||
default-state = "off";
|
||||
};
|
||||
|
||||
ble {
|
||||
led-ble {
|
||||
label = "gatwick:blue:ble";
|
||||
gpios = <&pioA 22 GPIO_ACTIVE_LOW>;
|
||||
default-state = "off";
|
||||
};
|
||||
|
||||
lora {
|
||||
led-lora {
|
||||
label = "gatwick:orange:lora";
|
||||
gpios = <&pioA 26 GPIO_ACTIVE_LOW>;
|
||||
default-state = "off";
|
||||
};
|
||||
|
||||
blank {
|
||||
led-blank {
|
||||
label = "gatwick:green:blank";
|
||||
gpios = <&pioA 24 GPIO_ACTIVE_LOW>;
|
||||
default-state = "off";
|
||||
};
|
||||
|
||||
user {
|
||||
led-user {
|
||||
label = "gatwick:yellow:user";
|
||||
gpios = <&pioA 12 GPIO_ACTIVE_LOW>;
|
||||
default-state = "off";
|
||||
|
|
503
arch/arm/boot/dts/at91-sam9x60_curiosity.dts
Normal file
503
arch/arm/boot/dts/at91-sam9x60_curiosity.dts
Normal file
|
@ -0,0 +1,503 @@
|
|||
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
||||
/*
|
||||
* at91-sam9x60_curiosity.dts - Device Tree file for Microchip SAM9X60 Curiosity board
|
||||
*
|
||||
* Copyright (C) 2022 Microchip Technology Inc. and its subsidiaries
|
||||
*
|
||||
* Author: Durai Manickam KR <durai.manickamkr@microchip.com>
|
||||
*/
|
||||
/dts-v1/;
|
||||
#include "sam9x60.dtsi"
|
||||
#include <dt-bindings/input/input.h>
|
||||
|
||||
/ {
|
||||
model = "Microchip SAM9X60 Curiosity";
|
||||
compatible = "microchip,sam9x60-curiosity", "microchip,sam9x60", "atmel,at91sam9";
|
||||
|
||||
aliases {
|
||||
i2c0 = &i2c0;
|
||||
i2c1 = &i2c6;
|
||||
serial2 = &uart7;
|
||||
};
|
||||
|
||||
chosen {
|
||||
stdout-path = "serial0:115200n8";
|
||||
};
|
||||
|
||||
memory@20000000 {
|
||||
reg = <0x20000000 0x8000000>;
|
||||
};
|
||||
|
||||
clocks {
|
||||
slow_xtal {
|
||||
clock-frequency = <32768>;
|
||||
};
|
||||
|
||||
main_xtal {
|
||||
clock-frequency = <24000000>;
|
||||
};
|
||||
};
|
||||
|
||||
gpio-keys {
|
||||
compatible = "gpio-keys";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_key_gpio_default>;
|
||||
|
||||
button-user {
|
||||
label = "PB_USER";
|
||||
gpios = <&pioA 29 GPIO_ACTIVE_LOW>;
|
||||
linux,code = <KEY_PROG1>;
|
||||
wakeup-source;
|
||||
};
|
||||
};
|
||||
|
||||
leds {
|
||||
compatible = "gpio-leds";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_gpio_leds>;
|
||||
|
||||
led-red {
|
||||
label = "red";
|
||||
gpios = <&pioD 17 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
led-green {
|
||||
label = "green";
|
||||
gpios = <&pioD 19 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
led-blue {
|
||||
label = "blue";
|
||||
gpios = <&pioD 21 GPIO_ACTIVE_HIGH>;
|
||||
linux,default-trigger = "heartbeat";
|
||||
};
|
||||
};
|
||||
|
||||
|
||||
vdd_1v8: regulator-0 {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-always-on;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-name = "VDD_1V8";
|
||||
};
|
||||
|
||||
vdd_1v15: regulator-1 {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-always-on;
|
||||
regulator-max-microvolt = <1150000>;
|
||||
regulator-min-microvolt = <1150000>;
|
||||
regulator-name = "VDD_1V15";
|
||||
};
|
||||
|
||||
vdd1_3v3: regulator-2 {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-always-on;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-name = "VDD1_3V3";
|
||||
};
|
||||
};
|
||||
|
||||
&adc {
|
||||
vddana-supply = <&vdd1_3v3>;
|
||||
vref-supply = <&vdd1_3v3>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_adc_default &pinctrl_adtrg_default>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&can0 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_can0_rx_tx>;
|
||||
status = "disabled"; /* Conflict with dbgu. */
|
||||
};
|
||||
|
||||
&can1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_can1_rx_tx>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&dbgu {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_dbgu>;
|
||||
status = "okay"; /* Conflict with can0. */
|
||||
};
|
||||
|
||||
&ebi {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_ebi_addr_nand &pinctrl_ebi_data_lsb>;
|
||||
status = "okay";
|
||||
|
||||
nand_controller: nand-controller {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_nand_oe_we &pinctrl_nand_cs &pinctrl_nand_rb>;
|
||||
status = "okay";
|
||||
|
||||
nand@3 {
|
||||
reg = <0x3 0x0 0x800000>;
|
||||
rb-gpios = <&pioD 5 GPIO_ACTIVE_HIGH>;
|
||||
cs-gpios = <&pioD 4 GPIO_ACTIVE_HIGH>;
|
||||
nand-bus-width = <8>;
|
||||
nand-ecc-mode = "hw";
|
||||
nand-ecc-strength = <8>;
|
||||
nand-ecc-step-size = <512>;
|
||||
nand-on-flash-bbt;
|
||||
label = "atmel_nand";
|
||||
|
||||
partitions {
|
||||
compatible = "fixed-partitions";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
at91bootstrap@0 {
|
||||
label = "at91bootstrap";
|
||||
reg = <0x0 0x40000>;
|
||||
};
|
||||
|
||||
uboot@40000 {
|
||||
label = "u-boot";
|
||||
reg = <0x40000 0xc0000>;
|
||||
};
|
||||
|
||||
ubootenvred@100000 {
|
||||
label = "U-Boot Env Redundant";
|
||||
reg = <0x100000 0x40000>;
|
||||
};
|
||||
|
||||
ubootenv@140000 {
|
||||
label = "U-Boot Env";
|
||||
reg = <0x140000 0x40000>;
|
||||
};
|
||||
|
||||
dtb@180000 {
|
||||
label = "device tree";
|
||||
reg = <0x180000 0x80000>;
|
||||
};
|
||||
|
||||
kernel@200000 {
|
||||
label = "kernel";
|
||||
reg = <0x200000 0x600000>;
|
||||
};
|
||||
|
||||
rootfs@800000 {
|
||||
label = "rootfs";
|
||||
reg = <0x800000 0x1f800000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&flx0 {
|
||||
atmel,flexcom-mode = <ATMEL_FLEXCOM_MODE_TWI>;
|
||||
status = "okay";
|
||||
|
||||
i2c0: i2c@600 {
|
||||
dmas = <0>, <0>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_flx0_default>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
i2c-analog-filter;
|
||||
i2c-digital-filter;
|
||||
i2c-digital-filter-width-ns = <35>;
|
||||
status = "okay";
|
||||
|
||||
eeprom@53 {
|
||||
compatible = "atmel,24c02";
|
||||
reg = <0x53>;
|
||||
pagesize = <16>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&flx6 {
|
||||
atmel,flexcom-mode = <ATMEL_FLEXCOM_MODE_TWI>;
|
||||
status = "okay";
|
||||
|
||||
i2c6: i2c@600 {
|
||||
dmas = <0>, <0>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_flx6_default>;
|
||||
i2c-analog-filter;
|
||||
i2c-digital-filter;
|
||||
i2c-digital-filter-width-ns = <35>;
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
|
||||
&flx7 {
|
||||
atmel,flexcom-mode = <ATMEL_FLEXCOM_MODE_USART>;
|
||||
status = "okay";
|
||||
|
||||
uart7: serial@200 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_flx7_default>;
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
||||
&macb0 {
|
||||
phy-mode = "rmii";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_macb0_rmii>;
|
||||
status = "okay";
|
||||
|
||||
ethernet-phy@0 {
|
||||
reg = <0x0>;
|
||||
};
|
||||
};
|
||||
|
||||
&pinctrl {
|
||||
adc {
|
||||
pinctrl_adc_default: adc-default {
|
||||
atmel,pins = <AT91_PIOB 14 AT91_PERIPH_A AT91_PINCTRL_NONE>;
|
||||
};
|
||||
|
||||
pinctrl_adtrg_default: adtrg-default {
|
||||
atmel,pins = <AT91_PIOB 18 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>;
|
||||
};
|
||||
};
|
||||
|
||||
can0 {
|
||||
pinctrl_can0_rx_tx: can0-rx-tx {
|
||||
atmel,pins =
|
||||
<AT91_PIOA 9 AT91_PERIPH_B AT91_PINCTRL_NONE /* CANRX0 */
|
||||
AT91_PIOA 10 AT91_PERIPH_B AT91_PINCTRL_NONE /* CANTX0 */
|
||||
AT91_PIOC 9 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_DOWN>; /* Enable CAN Transceivers */
|
||||
};
|
||||
};
|
||||
|
||||
can1 {
|
||||
pinctrl_can1_rx_tx: can1-rx-tx {
|
||||
atmel,pins =
|
||||
<AT91_PIOA 6 AT91_PERIPH_B AT91_PINCTRL_NONE /* CANRX1 */
|
||||
AT91_PIOA 5 AT91_PERIPH_B AT91_PINCTRL_NONE /* CANTX1 */
|
||||
AT91_PIOB 17 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_DOWN>; /* Enable CAN Transceivers */
|
||||
};
|
||||
};
|
||||
|
||||
dbgu {
|
||||
pinctrl_dbgu: dbgu-0 {
|
||||
atmel,pins = <AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_PULL_UP
|
||||
AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_NONE>;
|
||||
};
|
||||
};
|
||||
|
||||
ebi {
|
||||
pinctrl_ebi_data_lsb: ebi-data-lsb {
|
||||
atmel,pins =
|
||||
<AT91_PIOD 6 AT91_PERIPH_A (AT91_PINCTRL_NONE | AT91_PINCTRL_SLEWRATE_DIS)
|
||||
AT91_PIOD 7 AT91_PERIPH_A (AT91_PINCTRL_NONE | AT91_PINCTRL_SLEWRATE_DIS)
|
||||
AT91_PIOD 8 AT91_PERIPH_A (AT91_PINCTRL_NONE | AT91_PINCTRL_SLEWRATE_DIS)
|
||||
AT91_PIOD 9 AT91_PERIPH_A (AT91_PINCTRL_NONE | AT91_PINCTRL_SLEWRATE_DIS)
|
||||
AT91_PIOD 10 AT91_PERIPH_A (AT91_PINCTRL_NONE | AT91_PINCTRL_SLEWRATE_DIS)
|
||||
AT91_PIOD 11 AT91_PERIPH_A (AT91_PINCTRL_NONE | AT91_PINCTRL_SLEWRATE_DIS)
|
||||
AT91_PIOD 12 AT91_PERIPH_A (AT91_PINCTRL_NONE | AT91_PINCTRL_SLEWRATE_DIS)
|
||||
AT91_PIOD 13 AT91_PERIPH_A (AT91_PINCTRL_NONE | AT91_PINCTRL_SLEWRATE_DIS)>;
|
||||
};
|
||||
|
||||
pinctrl_ebi_addr_nand: ebi-addr-nand {
|
||||
atmel,pins =
|
||||
<AT91_PIOD 2 AT91_PERIPH_A (AT91_PINCTRL_NONE | AT91_PINCTRL_SLEWRATE_DIS)
|
||||
AT91_PIOD 3 AT91_PERIPH_A (AT91_PINCTRL_NONE | AT91_PINCTRL_SLEWRATE_DIS)>;
|
||||
};
|
||||
};
|
||||
|
||||
flexcom {
|
||||
pinctrl_flx0_default: flx0-twi {
|
||||
atmel,pins =
|
||||
<AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_PULL_UP
|
||||
AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
|
||||
};
|
||||
|
||||
pinctrl_flx6_default: flx6-twi {
|
||||
atmel,pins =
|
||||
<AT91_PIOA 30 AT91_PERIPH_A AT91_PINCTRL_PULL_UP
|
||||
AT91_PIOA 31 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
|
||||
};
|
||||
|
||||
pinctrl_flx7_default: flx7-usart {
|
||||
atmel,pins =
|
||||
<AT91_PIOC 0 AT91_PERIPH_C AT91_PINCTRL_NONE
|
||||
AT91_PIOC 1 AT91_PERIPH_C AT91_PINCTRL_NONE>;
|
||||
};
|
||||
};
|
||||
|
||||
gpio-keys {
|
||||
pinctrl_key_gpio_default: pinctrl-key-gpio {
|
||||
atmel,pins = <AT91_PIOA 29 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
|
||||
};
|
||||
};
|
||||
|
||||
leds {
|
||||
pinctrl_gpio_leds: gpio-leds {
|
||||
atmel,pins = <AT91_PIOD 17 AT91_PERIPH_GPIO AT91_PINCTRL_NONE
|
||||
AT91_PIOD 19 AT91_PERIPH_GPIO AT91_PINCTRL_NONE
|
||||
AT91_PIOD 21 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
|
||||
};
|
||||
};
|
||||
|
||||
macb0 {
|
||||
pinctrl_macb0_rmii: macb0-rmii-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOB 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB0 periph A */
|
||||
AT91_PIOB 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB1 periph A */
|
||||
AT91_PIOB 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB2 periph A */
|
||||
AT91_PIOB 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB3 periph A */
|
||||
AT91_PIOB 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB4 periph A */
|
||||
AT91_PIOB 5 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB5 periph A */
|
||||
AT91_PIOB 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB6 periph A */
|
||||
AT91_PIOB 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB7 periph A */
|
||||
AT91_PIOB 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB9 periph A */
|
||||
AT91_PIOB 10 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB10 periph A */
|
||||
};
|
||||
};
|
||||
|
||||
nand {
|
||||
pinctrl_nand_oe_we: nand-oe-we-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOD 0 AT91_PERIPH_A (AT91_PINCTRL_NONE | AT91_PINCTRL_SLEWRATE_DIS)
|
||||
AT91_PIOD 1 AT91_PERIPH_A (AT91_PINCTRL_NONE | AT91_PINCTRL_SLEWRATE_DIS)>;
|
||||
};
|
||||
|
||||
pinctrl_nand_rb: nand-rb-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOD 5 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>;
|
||||
};
|
||||
|
||||
pinctrl_nand_cs: nand-cs-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOD 4 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>;
|
||||
};
|
||||
};
|
||||
|
||||
pwm0 {
|
||||
pinctrl_pwm0_0: pwm0-0 {
|
||||
atmel,pins = <AT91_PIOB 12 AT91_PERIPH_B AT91_PINCTRL_NONE>;
|
||||
};
|
||||
|
||||
pinctrl_pwm0_1: pwm0-1 {
|
||||
atmel,pins = <AT91_PIOB 13 AT91_PERIPH_B AT91_PINCTRL_NONE>;
|
||||
};
|
||||
|
||||
pinctrl_pwm0_2: pwm0-2 {
|
||||
atmel,pins = <AT91_PIOD 16 AT91_PERIPH_B AT91_PINCTRL_NONE>;
|
||||
};
|
||||
};
|
||||
|
||||
sdmmc0 {
|
||||
pinctrl_sdmmc0_default: sdmmc0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOA 17 AT91_PERIPH_A (AT91_PINCTRL_DRIVE_STRENGTH_HI) /* PA17 CK periph A with pullup */
|
||||
AT91_PIOA 16 AT91_PERIPH_A (AT91_PINCTRL_PULL_UP | AT91_PINCTRL_DRIVE_STRENGTH_HI) /* PA16 CMD periph A with pullup */
|
||||
AT91_PIOA 15 AT91_PERIPH_A (AT91_PINCTRL_PULL_UP | AT91_PINCTRL_DRIVE_STRENGTH_HI) /* PA15 DAT0 periph A */
|
||||
AT91_PIOA 18 AT91_PERIPH_A (AT91_PINCTRL_PULL_UP | AT91_PINCTRL_DRIVE_STRENGTH_HI) /* PA18 DAT1 periph A with pullup */
|
||||
AT91_PIOA 19 AT91_PERIPH_A (AT91_PINCTRL_PULL_UP | AT91_PINCTRL_DRIVE_STRENGTH_HI) /* PA19 DAT2 periph A with pullup */
|
||||
AT91_PIOA 20 AT91_PERIPH_A (AT91_PINCTRL_PULL_UP | AT91_PINCTRL_DRIVE_STRENGTH_HI)>; /* PA20 DAT3 periph A with pullup */
|
||||
};
|
||||
|
||||
pinctrl_sdmmc0_cd: sdmmc0-cd {
|
||||
atmel,pins =
|
||||
<AT91_PIOA 25 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
|
||||
};
|
||||
};
|
||||
|
||||
sdmmc1 {
|
||||
pinctrl_sdmmc1_default: sdmmc1 {
|
||||
atmel,pins =
|
||||
<AT91_PIOA 13 AT91_PERIPH_B (AT91_PINCTRL_DRIVE_STRENGTH_HI) /* PA13 CK periph B */
|
||||
AT91_PIOA 12 AT91_PERIPH_B (AT91_PINCTRL_PULL_UP | AT91_PINCTRL_DRIVE_STRENGTH_HI) /* PA12 CMD periph B with pullup */
|
||||
AT91_PIOA 11 AT91_PERIPH_B (AT91_PINCTRL_PULL_UP | AT91_PINCTRL_DRIVE_STRENGTH_HI) /* PA11 DAT0 periph B with pullup */
|
||||
AT91_PIOA 2 AT91_PERIPH_B (AT91_PINCTRL_PULL_UP | AT91_PINCTRL_DRIVE_STRENGTH_HI) /* PA2 DAT1 periph B with pullup */
|
||||
AT91_PIOA 3 AT91_PERIPH_B (AT91_PINCTRL_PULL_UP | AT91_PINCTRL_DRIVE_STRENGTH_HI) /* PA3 DAT2 periph B with pullup */
|
||||
AT91_PIOA 4 AT91_PERIPH_B (AT91_PINCTRL_PULL_UP | AT91_PINCTRL_DRIVE_STRENGTH_HI)>; /* PA4 DAT3 periph B with pullup */
|
||||
};
|
||||
};
|
||||
|
||||
usb0 {
|
||||
pinctrl_usba_vbus: usba-vbus {
|
||||
atmel,pins = <AT91_PIOA 27 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
|
||||
};
|
||||
};
|
||||
|
||||
usb1 {
|
||||
pinctrl_usb_default: usb-default {
|
||||
atmel,pins = <AT91_PIOD 18 AT91_PERIPH_GPIO AT91_PINCTRL_NONE
|
||||
AT91_PIOD 15 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
|
||||
};
|
||||
};
|
||||
}; /* pinctrl */
|
||||
|
||||
&pwm0 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_pwm0_0 &pinctrl_pwm0_1 &pinctrl_pwm0_2>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&sdmmc0 {
|
||||
bus-width = <4>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_sdmmc0_default &pinctrl_sdmmc0_cd>;
|
||||
cd-gpios = <&pioA 25 GPIO_ACTIVE_LOW>;
|
||||
disable-wp;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&sdmmc1 {
|
||||
bus-width = <4>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_sdmmc1_default>;
|
||||
disable-wp;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&shutdown_controller {
|
||||
debounce-delay-us = <976>;
|
||||
status = "okay";
|
||||
|
||||
input@0 {
|
||||
reg = <0>;
|
||||
};
|
||||
};
|
||||
|
||||
&tcb0 {
|
||||
timer0: timer@0 {
|
||||
compatible = "atmel,tcb-timer";
|
||||
reg = <0>;
|
||||
};
|
||||
|
||||
timer1: timer@1 {
|
||||
compatible = "atmel,tcb-timer";
|
||||
reg = <1>;
|
||||
};
|
||||
};
|
||||
|
||||
&usb0 {
|
||||
atmel,vbus-gpio = <&pioA 27 GPIO_ACTIVE_HIGH>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_usba_vbus>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb1 {
|
||||
num-ports = <3>;
|
||||
atmel,vbus-gpio = <0
|
||||
&pioD 18 GPIO_ACTIVE_HIGH
|
||||
&pioD 15 GPIO_ACTIVE_HIGH>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_usb_default>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb2 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&watchdog {
|
||||
status = "okay";
|
||||
};
|
|
@ -16,8 +16,8 @@ / {
|
|||
|
||||
aliases {
|
||||
i2c0 = &i2c0;
|
||||
i2c1 = &i2c1;
|
||||
serial1 = &uart1;
|
||||
i2c1 = &i2c6;
|
||||
serial1 = &uart5;
|
||||
};
|
||||
|
||||
chosen {
|
||||
|
@ -207,15 +207,11 @@ &flx0 {
|
|||
status = "okay";
|
||||
|
||||
i2c0: i2c@600 {
|
||||
compatible = "microchip,sam9x60-i2c";
|
||||
reg = <0x600 0x200>;
|
||||
interrupts = <5 IRQ_TYPE_LEVEL_HIGH 7>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
clocks = <&pmc PMC_TYPE_PERIPHERAL 5>;
|
||||
dmas = <0>, <0>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_flx0_default>;
|
||||
atmel,fifo-size = <16>;
|
||||
i2c-analog-filter;
|
||||
i2c-digital-filter;
|
||||
i2c-digital-filter-width-ns = <35>;
|
||||
|
@ -234,17 +230,10 @@ &flx4 {
|
|||
atmel,flexcom-mode = <ATMEL_FLEXCOM_MODE_SPI>;
|
||||
status = "disabled";
|
||||
|
||||
spi0: spi@400 {
|
||||
compatible = "microchip,sam9x60-spi", "atmel,at91rm9200-spi";
|
||||
reg = <0x400 0x200>;
|
||||
interrupts = <13 IRQ_TYPE_LEVEL_HIGH 7>;
|
||||
clocks = <&pmc PMC_TYPE_PERIPHERAL 13>;
|
||||
clock-names = "spi_clk";
|
||||
spi4: spi@400 {
|
||||
dmas = <0>, <0>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_flx4_default>;
|
||||
atmel,fifo-size = <16>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
|
@ -253,24 +242,9 @@ &flx5 {
|
|||
atmel,flexcom-mode = <ATMEL_FLEXCOM_MODE_USART>;
|
||||
status = "okay";
|
||||
|
||||
uart1: serial@200 {
|
||||
compatible = "microchip,sam9x60-dbgu", "microchip,sam9x60-usart", "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart";
|
||||
reg = <0x200 0x200>;
|
||||
atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
|
||||
interrupts = <14 IRQ_TYPE_LEVEL_HIGH 7>;
|
||||
dmas = <&dma0
|
||||
(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
|
||||
AT91_XDMAC_DT_PERID(10))>,
|
||||
<&dma0
|
||||
(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
|
||||
AT91_XDMAC_DT_PERID(11))>;
|
||||
dma-names = "tx", "rx";
|
||||
clocks = <&pmc PMC_TYPE_PERIPHERAL 14>;
|
||||
clock-names = "usart";
|
||||
pinctrl-0 = <&pinctrl_flx5_default>;
|
||||
uart5: serial@200 {
|
||||
pinctrl-names = "default";
|
||||
atmel,use-dma-rx;
|
||||
atmel,use-dma-tx;
|
||||
pinctrl-0 = <&pinctrl_flx5_default>;
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
@ -279,16 +253,12 @@ &flx6 {
|
|||
atmel,flexcom-mode = <ATMEL_FLEXCOM_MODE_TWI>;
|
||||
status = "okay";
|
||||
|
||||
i2c1: i2c@600 {
|
||||
compatible = "microchip,sam9x60-i2c";
|
||||
reg = <0x600 0x200>;
|
||||
interrupts = <9 IRQ_TYPE_LEVEL_HIGH 7>;
|
||||
i2c6: i2c@600 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
clocks = <&pmc PMC_TYPE_PERIPHERAL 9>;
|
||||
dmas = <0>, <0>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_flx6_default>;
|
||||
atmel,fifo-size = <16>;
|
||||
i2c-analog-filter;
|
||||
i2c-digital-filter;
|
||||
i2c-digital-filter-width-ns = <35>;
|
||||
|
@ -439,7 +409,7 @@ AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE
|
|||
AT91_PIOA 14 AT91_PERIPH_A AT91_PINCTRL_NONE>;
|
||||
};
|
||||
|
||||
pinctrl_flx5_default: flx_uart {
|
||||
pinctrl_flx5_default: flx5_uart {
|
||||
atmel,pins =
|
||||
<AT91_PIOA 7 AT91_PERIPH_C AT91_PINCTRL_NONE
|
||||
AT91_PIOA 8 AT91_PERIPH_B AT91_PINCTRL_NONE
|
||||
|
|
|
@ -498,17 +498,17 @@ leds {
|
|||
pinctrl-0 = <&pinctrl_led_gpio_default>;
|
||||
status = "okay"; /* Conflict with pwm0. */
|
||||
|
||||
red {
|
||||
led-red {
|
||||
label = "red";
|
||||
gpios = <&pioA PIN_PA10 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
green {
|
||||
led-green {
|
||||
label = "green";
|
||||
gpios = <&pioA PIN_PB1 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
blue {
|
||||
led-blue {
|
||||
label = "blue";
|
||||
gpios = <&pioA PIN_PA31 GPIO_ACTIVE_HIGH>;
|
||||
linux,default-trigger = "heartbeat";
|
||||
|
|
|
@ -46,17 +46,17 @@ leds {
|
|||
pinctrl-0 = <&pinctrl_led_gpio_default>;
|
||||
status = "okay";
|
||||
|
||||
red {
|
||||
led-red {
|
||||
label = "red";
|
||||
gpios = <&pioA PIN_PA6 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
green {
|
||||
led-green {
|
||||
label = "green";
|
||||
gpios = <&pioA PIN_PA7 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
blue {
|
||||
led-blue {
|
||||
label = "blue";
|
||||
gpios = <&pioA PIN_PA8 GPIO_ACTIVE_HIGH>;
|
||||
linux,default-trigger = "heartbeat";
|
||||
|
|
|
@ -62,17 +62,17 @@ leds {
|
|||
pinctrl-0 = <&pinctrl_led_gpio_default>;
|
||||
status = "okay"; /* conflict with pwm0 */
|
||||
|
||||
red {
|
||||
led-red {
|
||||
label = "red";
|
||||
gpios = <&pioA PIN_PB0 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
green {
|
||||
led-green {
|
||||
label = "green";
|
||||
gpios = <&pioA PIN_PB1 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
blue {
|
||||
led-blue {
|
||||
label = "blue";
|
||||
gpios = <&pioA PIN_PA31 GPIO_ACTIVE_HIGH>;
|
||||
linux,default-trigger = "heartbeat";
|
||||
|
|
|
@ -416,17 +416,17 @@ leds {
|
|||
pinctrl-0 = <&pinctrl_led_gpio_default>;
|
||||
status = "okay";
|
||||
|
||||
red {
|
||||
led-red {
|
||||
label = "red";
|
||||
gpios = <&pioA PIN_PB10 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
green {
|
||||
led-green {
|
||||
label = "green";
|
||||
gpios = <&pioA PIN_PB8 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
blue {
|
||||
led-blue {
|
||||
label = "blue";
|
||||
gpios = <&pioA PIN_PB6 GPIO_ACTIVE_HIGH>;
|
||||
linux,default-trigger = "heartbeat";
|
||||
|
|
|
@ -725,18 +725,18 @@ leds {
|
|||
pinctrl-0 = <&pinctrl_led_gpio_default>;
|
||||
status = "okay"; /* conflict with pwm0 */
|
||||
|
||||
red {
|
||||
led-red {
|
||||
label = "red";
|
||||
gpios = <&pioA PIN_PB6 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
|
||||
|
||||
green {
|
||||
led-green {
|
||||
label = "green";
|
||||
gpios = <&pioA PIN_PB5 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
|
||||
blue {
|
||||
led-blue {
|
||||
label = "blue";
|
||||
gpios = <&pioA PIN_PB0 GPIO_ACTIVE_LOW>;
|
||||
linux,default-trigger = "heartbeat";
|
||||
|
|
|
@ -392,13 +392,13 @@ leds {
|
|||
pinctrl-0 = <&pinctrl_gpio_leds>;
|
||||
status = "okay";
|
||||
|
||||
d2 {
|
||||
led-d2 {
|
||||
label = "d2";
|
||||
gpios = <&pioE 23 GPIO_ACTIVE_LOW>; /* PE23, conflicts with A23, CTS2 */
|
||||
linux,default-trigger = "heartbeat";
|
||||
};
|
||||
|
||||
d3 {
|
||||
led-d3 {
|
||||
label = "d3"; /* Conflict with EBI CS0, USART2 CTS. */
|
||||
gpios = <&pioE 24 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
|
|
@ -115,19 +115,19 @@ leds {
|
|||
compatible = "gpio-leds";
|
||||
status = "okay";
|
||||
|
||||
user1 {
|
||||
led-user1 {
|
||||
label = "user1";
|
||||
gpios = <&pioD 28 GPIO_ACTIVE_HIGH>;
|
||||
linux,default-trigger = "heartbeat";
|
||||
};
|
||||
|
||||
user2 {
|
||||
led-user2 {
|
||||
label = "user2";
|
||||
gpios = <&pioD 29 GPIO_ACTIVE_HIGH>;
|
||||
linux,default-trigger = "heartbeat";
|
||||
};
|
||||
|
||||
user3 {
|
||||
led-user3 {
|
||||
label = "user3";
|
||||
gpios = <&pioD 30 GPIO_ACTIVE_HIGH>;
|
||||
linux,default-trigger = "heartbeat";
|
||||
|
|
|
@ -262,13 +262,13 @@ leds {
|
|||
pinctrl-0 = <&pinctrl_gpio_leds>;
|
||||
status = "okay";
|
||||
|
||||
d8 {
|
||||
led-d8 {
|
||||
label = "d8";
|
||||
gpios = <&pioD 30 GPIO_ACTIVE_HIGH>;
|
||||
default-state = "on";
|
||||
};
|
||||
|
||||
d10 {
|
||||
led-d10 {
|
||||
label = "d10";
|
||||
gpios = <&pioE 15 GPIO_ACTIVE_LOW>;
|
||||
linux,default-trigger = "heartbeat";
|
||||
|
|
|
@ -287,18 +287,18 @@ leds {
|
|||
compatible = "gpio-leds";
|
||||
status = "okay";
|
||||
|
||||
d8 {
|
||||
led-d8 {
|
||||
label = "d8";
|
||||
/* PE28, conflicts with usart4 rts pin */
|
||||
gpios = <&pioE 28 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
|
||||
d9 {
|
||||
led-d9 {
|
||||
label = "d9";
|
||||
gpios = <&pioE 9 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
d10 {
|
||||
led-d10 {
|
||||
label = "d10";
|
||||
gpios = <&pioE 8 GPIO_ACTIVE_LOW>;
|
||||
linux,default-trigger = "heartbeat";
|
||||
|
|
|
@ -106,35 +106,35 @@ envelope-detector-mux {
|
|||
leds {
|
||||
compatible = "gpio-leds";
|
||||
|
||||
ch1-red {
|
||||
led-ch1-red {
|
||||
label = "ch-1:red";
|
||||
gpios = <&pioA 23 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
ch1-green {
|
||||
led-ch1-green {
|
||||
label = "ch-1:green";
|
||||
gpios = <&pioA 22 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
ch2-red {
|
||||
led-ch2-red {
|
||||
label = "ch-2:red";
|
||||
gpios = <&pioA 21 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
ch2-green {
|
||||
led-ch2-green {
|
||||
label = "ch-2:green";
|
||||
gpios = <&pioA 20 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
data-red {
|
||||
led-data-red {
|
||||
label = "data:red";
|
||||
gpios = <&pioA 19 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
data-green {
|
||||
led-data-green {
|
||||
label = "data:green";
|
||||
gpios = <&pioA 18 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
alarm-red {
|
||||
led-alarm-red {
|
||||
label = "alarm:red";
|
||||
gpios = <&pioA 17 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
alarm-green {
|
||||
led-alarm-green {
|
||||
label = "alarm:green";
|
||||
gpios = <&pioA 16 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
|
|
|
@ -108,7 +108,7 @@ amba {
|
|||
#size-cells = <2>;
|
||||
ranges;
|
||||
|
||||
serial0: uart@2010080000 {
|
||||
serial0: serial@2010080000 {
|
||||
compatible = "arm,pl011", "arm,primecell";
|
||||
reg = <0x20 0x10080000 0 0x1000>;
|
||||
interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>;
|
||||
|
@ -117,7 +117,7 @@ serial0: uart@2010080000 {
|
|||
status = "disabled";
|
||||
};
|
||||
|
||||
serial1: uart@2010081000 {
|
||||
serial1: serial@2010081000 {
|
||||
compatible = "arm,pl011", "arm,primecell";
|
||||
reg = <0x20 0x10081000 0 0x1000>;
|
||||
interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
|
||||
|
@ -126,7 +126,7 @@ serial1: uart@2010081000 {
|
|||
status = "disabled";
|
||||
};
|
||||
|
||||
serial2: uart@2010082000 {
|
||||
serial2: serial@2010082000 {
|
||||
compatible = "arm,pl011", "arm,primecell";
|
||||
reg = <0x20 0x10082000 0 0x1000>;
|
||||
interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>;
|
||||
|
@ -135,7 +135,7 @@ serial2: uart@2010082000 {
|
|||
status = "disabled";
|
||||
};
|
||||
|
||||
serial3: uart@2010083000 {
|
||||
serial3: serial@2010083000 {
|
||||
compatible = "arm,pl011", "arm,primecell";
|
||||
reg = <0x20 0x10083000 0 0x1000>;
|
||||
interrupts = <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>;
|
||||
|
|
|
@ -50,7 +50,7 @@ smc@3404c000 {
|
|||
reg = <0x3404c000 0x400>; /* 1 KiB in SRAM */
|
||||
};
|
||||
|
||||
uart@3e000000 {
|
||||
serial@3e000000 {
|
||||
compatible = "brcm,bcm11351-dw-apb-uart", "snps,dw-apb-uart";
|
||||
status = "disabled";
|
||||
reg = <0x3e000000 0x1000>;
|
||||
|
@ -60,7 +60,7 @@ uart@3e000000 {
|
|||
reg-io-width = <4>;
|
||||
};
|
||||
|
||||
uart@3e001000 {
|
||||
serial@3e001000 {
|
||||
compatible = "brcm,bcm11351-dw-apb-uart", "snps,dw-apb-uart";
|
||||
status = "disabled";
|
||||
reg = <0x3e001000 0x1000>;
|
||||
|
@ -70,7 +70,7 @@ uart@3e001000 {
|
|||
reg-io-width = <4>;
|
||||
};
|
||||
|
||||
uart@3e002000 {
|
||||
serial@3e002000 {
|
||||
compatible = "brcm,bcm11351-dw-apb-uart", "snps,dw-apb-uart";
|
||||
status = "disabled";
|
||||
reg = <0x3e002000 0x1000>;
|
||||
|
@ -80,7 +80,7 @@ uart@3e002000 {
|
|||
reg-io-width = <4>;
|
||||
};
|
||||
|
||||
uart@3e003000 {
|
||||
serial@3e003000 {
|
||||
compatible = "brcm,bcm11351-dw-apb-uart", "snps,dw-apb-uart";
|
||||
status = "disabled";
|
||||
reg = <0x3e003000 0x1000>;
|
||||
|
|
|
@ -16,7 +16,7 @@ memory@80000000 {
|
|||
reg = <0x80000000 0x40000000>; /* 1 GB */
|
||||
};
|
||||
|
||||
uart@3e000000 {
|
||||
serial@3e000000 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
|
|
|
@ -50,7 +50,7 @@ smc@3404e000 {
|
|||
reg = <0x3404e000 0x400>; /* 1 KiB in SRAM */
|
||||
};
|
||||
|
||||
uart@3e000000 {
|
||||
serial@3e000000 {
|
||||
compatible = "brcm,bcm21664-dw-apb-uart", "snps,dw-apb-uart";
|
||||
status = "disabled";
|
||||
reg = <0x3e000000 0x118>;
|
||||
|
@ -60,7 +60,7 @@ uart@3e000000 {
|
|||
reg-io-width = <4>;
|
||||
};
|
||||
|
||||
uart@3e001000 {
|
||||
serial@3e001000 {
|
||||
compatible = "brcm,bcm21664-dw-apb-uart", "snps,dw-apb-uart";
|
||||
status = "disabled";
|
||||
reg = <0x3e001000 0x118>;
|
||||
|
@ -70,7 +70,7 @@ uart@3e001000 {
|
|||
reg-io-width = <4>;
|
||||
};
|
||||
|
||||
uart@3e002000 {
|
||||
serial@3e002000 {
|
||||
compatible = "brcm,bcm21664-dw-apb-uart", "snps,dw-apb-uart";
|
||||
status = "disabled";
|
||||
reg = <0x3e002000 0x118>;
|
||||
|
|
|
@ -16,7 +16,7 @@ memory@80000000 {
|
|||
reg = <0x80000000 0x40000000>; /* 1 GB */
|
||||
};
|
||||
|
||||
uart@3e000000 {
|
||||
serial@3e000000 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
|
|
|
@ -581,7 +581,7 @@ i2c3: i2c@8000 {
|
|||
status = "disabled";
|
||||
};
|
||||
|
||||
uart0: uart@9000 {
|
||||
uart0: serial@9000 {
|
||||
compatible = "snps,dw-apb-uart";
|
||||
reg = <0x9000 0x100>;
|
||||
interrupts = <8>;
|
||||
|
@ -592,7 +592,7 @@ uart0: uart@9000 {
|
|||
status = "disabled";
|
||||
};
|
||||
|
||||
uart1: uart@a000 {
|
||||
uart1: serial@a000 {
|
||||
compatible = "snps,dw-apb-uart";
|
||||
reg = <0xa000 0x100>;
|
||||
interrupts = <9>;
|
||||
|
|
|
@ -107,7 +107,7 @@ uc_regs: syscon@f00003a0 {
|
|||
reg = <0xf00003a0 0x10>;
|
||||
};
|
||||
|
||||
uart0: uart@f0000740 {
|
||||
uart0: serial@f0000740 {
|
||||
compatible = "cnxt,cx92755-usart";
|
||||
reg = <0xf0000740 0x20>;
|
||||
clocks = <&main_clk>;
|
||||
|
@ -115,7 +115,7 @@ uart0: uart@f0000740 {
|
|||
status = "disabled";
|
||||
};
|
||||
|
||||
uart1: uart@f0000760 {
|
||||
uart1: serial@f0000760 {
|
||||
compatible = "cnxt,cx92755-usart";
|
||||
reg = <0xf0000760 0x20>;
|
||||
clocks = <&main_clk>;
|
||||
|
@ -123,7 +123,7 @@ uart1: uart@f0000760 {
|
|||
status = "disabled";
|
||||
};
|
||||
|
||||
uart2: uart@f0000780 {
|
||||
uart2: serial@f0000780 {
|
||||
compatible = "cnxt,cx92755-usart";
|
||||
reg = <0xf0000780 0x20>;
|
||||
clocks = <&main_clk>;
|
||||
|
|
|
@ -333,7 +333,7 @@ timer1: timer@0 {
|
|||
};
|
||||
};
|
||||
|
||||
uart1: uart@20000 {
|
||||
uart1: serial@20000 {
|
||||
compatible = "ti,am3352-uart", "ti,omap3-uart";
|
||||
ti,hwmods = "uart1";
|
||||
reg = <0x20000 0x2000>;
|
||||
|
@ -343,7 +343,7 @@ uart1: uart@20000 {
|
|||
dma-names = "tx", "rx";
|
||||
};
|
||||
|
||||
uart2: uart@22000 {
|
||||
uart2: serial@22000 {
|
||||
compatible = "ti,am3352-uart", "ti,omap3-uart";
|
||||
ti,hwmods = "uart2";
|
||||
reg = <0x22000 0x2000>;
|
||||
|
@ -353,7 +353,7 @@ uart2: uart@22000 {
|
|||
dma-names = "tx", "rx";
|
||||
};
|
||||
|
||||
uart3: uart@24000 {
|
||||
uart3: serial@24000 {
|
||||
compatible = "ti,am3352-uart", "ti,omap3-uart";
|
||||
ti,hwmods = "uart3";
|
||||
reg = <0x24000 0x2000>;
|
||||
|
|
|
@ -522,7 +522,7 @@ timer7: timer@4804a000 {
|
|||
ti,timer-pwm;
|
||||
};
|
||||
|
||||
uart1: uart@48020000 {
|
||||
uart1: serial@48020000 {
|
||||
compatible = "ti,am3352-uart", "ti,omap3-uart";
|
||||
ti,hwmods = "uart1";
|
||||
reg = <0x48020000 0x2000>;
|
||||
|
@ -532,7 +532,7 @@ uart1: uart@48020000 {
|
|||
dma-names = "tx", "rx";
|
||||
};
|
||||
|
||||
uart2: uart@48022000 {
|
||||
uart2: serial@48022000 {
|
||||
compatible = "ti,am3352-uart", "ti,omap3-uart";
|
||||
ti,hwmods = "uart2";
|
||||
reg = <0x48022000 0x2000>;
|
||||
|
@ -542,7 +542,7 @@ uart2: uart@48022000 {
|
|||
dma-names = "tx", "rx";
|
||||
};
|
||||
|
||||
uart3: uart@48024000 {
|
||||
uart3: serial@48024000 {
|
||||
compatible = "ti,am3352-uart", "ti,omap3-uart";
|
||||
ti,hwmods = "uart3";
|
||||
reg = <0x48024000 0x2000>;
|
||||
|
|
|
@ -101,7 +101,7 @@ leds {
|
|||
pinctrl-0 = <&pmx_nand_gpo>;
|
||||
pinctrl-names = "default";
|
||||
|
||||
system {
|
||||
led-system {
|
||||
label = "cm-a510:system:green";
|
||||
gpios = <&gpio2 1 GPIO_ACTIVE_HIGH>;
|
||||
default-state = "keep";
|
||||
|
@ -124,9 +124,17 @@ wifi_power: regulator@1 {
|
|||
};
|
||||
|
||||
/* Optional RTL8211D GbE PHY on SMI address 0x03 */
|
||||
ðphy {
|
||||
reg = <3>;
|
||||
status = "disabled";
|
||||
&mdio {
|
||||
ethphy: ethernet-phy@3 {
|
||||
reg = <3>;
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
|
||||
ð {
|
||||
ethernet-port@0 {
|
||||
phy-handle = <ðphy>;
|
||||
};
|
||||
};
|
||||
|
||||
&i2c0 {
|
||||
|
|
|
@ -21,7 +21,7 @@ leds {
|
|||
pinctrl-0 = <&pmx_gpio_18>;
|
||||
pinctrl-names = "default";
|
||||
|
||||
power {
|
||||
led-power {
|
||||
label = "Power";
|
||||
gpios = <&gpio0 18 1>;
|
||||
default-state = "keep";
|
||||
|
@ -72,11 +72,18 @@ gpu-subsystem {
|
|||
&uart0 { status = "okay"; };
|
||||
&sata0 { status = "okay"; };
|
||||
&mdio { status = "okay"; };
|
||||
ð { status = "okay"; };
|
||||
ð {
|
||||
status = "okay";
|
||||
ethernet-port@0 {
|
||||
phy-handle = <ðphy>;
|
||||
};
|
||||
};
|
||||
|
||||
ðphy {
|
||||
compatible = "marvell,88e1310";
|
||||
reg = <1>;
|
||||
&mdio {
|
||||
ethphy: ethernet-phy@1 {
|
||||
compatible = "marvell,88e1310";
|
||||
reg = <1>;
|
||||
};
|
||||
};
|
||||
|
||||
&gpu {
|
||||
|
|
|
@ -21,17 +21,17 @@ leds {
|
|||
pinctrl-0 = <&pmx_gpio_0 &pmx_gpio_1 &pmx_gpio_2>;
|
||||
pinctrl-names = "default";
|
||||
|
||||
wlan-ap {
|
||||
led-wlan-ap {
|
||||
label = "wlan-ap";
|
||||
gpios = <&gpio0 0 1>;
|
||||
};
|
||||
|
||||
wlan-act {
|
||||
led-wlan-act {
|
||||
label = "wlan-act";
|
||||
gpios = <&gpio0 1 1>;
|
||||
};
|
||||
|
||||
bluetooth-act {
|
||||
led-bluetooth-act {
|
||||
label = "bt-act";
|
||||
gpios = <&gpio0 2 1>;
|
||||
};
|
||||
|
|
|
@ -21,17 +21,17 @@ leds {
|
|||
pinctrl-0 = <&pmx_gpio_0 &pmx_gpio_1 &pmx_gpio_2>;
|
||||
pinctrl-names = "default";
|
||||
|
||||
wlan-act {
|
||||
led-wlan-act {
|
||||
label = "wlan-act";
|
||||
gpios = <&gpio0 0 1>;
|
||||
};
|
||||
|
||||
wlan-ap {
|
||||
led-wlan-ap {
|
||||
label = "wlan-ap";
|
||||
gpios = <&gpio0 1 1>;
|
||||
};
|
||||
|
||||
status {
|
||||
led-status {
|
||||
label = "status";
|
||||
gpios = <&gpio0 2 1>;
|
||||
};
|
||||
|
|
|
@ -382,7 +382,6 @@ ethernet-port@0 {
|
|||
interrupts = <29>;
|
||||
/* overwrite MAC address in bootloader */
|
||||
local-mac-address = [00 00 00 00 00 00];
|
||||
phy-handle = <ðphy>;
|
||||
};
|
||||
};
|
||||
|
||||
|
@ -394,10 +393,6 @@ mdio: mdio-bus@72004 {
|
|||
interrupts = <30>;
|
||||
clocks = <&gate_clk 2>;
|
||||
status = "disabled";
|
||||
|
||||
ethphy: ethernet-phy {
|
||||
/* set phy address in board file */
|
||||
};
|
||||
};
|
||||
|
||||
sdio0: sdio-host@92000 {
|
||||
|
|
|
@ -122,7 +122,16 @@ &i2c2 {
|
|||
clock-frequency = <100000>;
|
||||
status = "okay";
|
||||
|
||||
/* TODO: CYTTSP5 touch controller at 0x24 */
|
||||
touchscreen@24 {
|
||||
compatible = "cypress,tt21000";
|
||||
reg = <0x24>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_cyttsp5_gpio>;
|
||||
interrupt-parent = <&gpio4>;
|
||||
interrupts = <24 IRQ_TYPE_EDGE_FALLING>;
|
||||
reset-gpios = <&gpio4 18 GPIO_ACTIVE_LOW>;
|
||||
vdd-supply = <&ldo5_reg>;
|
||||
};
|
||||
|
||||
/* TODO: SY7636 PMIC for E Ink at 0x62 */
|
||||
|
||||
|
|
|
@ -7,7 +7,7 @@ &pmu_system_controller {
|
|||
poweroff: syscon-poweroff {
|
||||
compatible = "syscon-poweroff";
|
||||
regmap = <&pmu_system_controller>;
|
||||
offset = <0x330C>; /* PS_HOLD_CONTROL */
|
||||
offset = <0x330c>; /* PS_HOLD_CONTROL */
|
||||
mask = <0x5200>; /* reset value */
|
||||
};
|
||||
|
||||
|
|
|
@ -31,7 +31,7 @@ memory@40000000 {
|
|||
|
||||
firmware@205f000 {
|
||||
compatible = "samsung,secure-firmware";
|
||||
reg = <0x0205F000 0x1000>;
|
||||
reg = <0x0205f000 0x1000>;
|
||||
};
|
||||
|
||||
gpio-keys {
|
||||
|
@ -438,7 +438,6 @@ &mshc_0 {
|
|||
broken-cd;
|
||||
non-removable;
|
||||
cap-mmc-highspeed;
|
||||
desc-num = <4>;
|
||||
mmc-hs200-1_8v;
|
||||
card-detect-delay = <200>;
|
||||
vmmc-supply = <&vemmc_reg>;
|
||||
|
|
|
@ -36,7 +36,7 @@ memory@40000000 {
|
|||
|
||||
firmware@205f000 {
|
||||
compatible = "samsung,secure-firmware";
|
||||
reg = <0x0205F000 0x1000>;
|
||||
reg = <0x0205f000 0x1000>;
|
||||
};
|
||||
|
||||
gpio-keys {
|
||||
|
@ -250,7 +250,7 @@ &fimd {
|
|||
i80-if-timings {
|
||||
cs-setup = <0>;
|
||||
wr-setup = <0>;
|
||||
wr-act = <1>;
|
||||
wr-active = <1>;
|
||||
wr-hold = <0>;
|
||||
};
|
||||
};
|
||||
|
@ -619,7 +619,6 @@ &mshc_0 {
|
|||
broken-cd;
|
||||
non-removable;
|
||||
cap-mmc-highspeed;
|
||||
desc-num = <4>;
|
||||
mmc-hs200-1_8v;
|
||||
card-detect-delay = <200>;
|
||||
vmmc-supply = <&ldo12_reg>;
|
||||
|
|
|
@ -46,6 +46,157 @@ aliases {
|
|||
serial2 = &serial_2;
|
||||
};
|
||||
|
||||
bus_dmc: bus-dmc {
|
||||
compatible = "samsung,exynos-bus";
|
||||
clocks = <&cmu_dmc CLK_DIV_DMC>;
|
||||
clock-names = "bus";
|
||||
operating-points-v2 = <&bus_dmc_opp_table>;
|
||||
status = "disabled";
|
||||
|
||||
bus_dmc_opp_table: opp-table {
|
||||
compatible = "operating-points-v2";
|
||||
|
||||
opp-50000000 {
|
||||
opp-hz = /bits/ 64 <50000000>;
|
||||
opp-microvolt = <800000>;
|
||||
};
|
||||
opp-100000000 {
|
||||
opp-hz = /bits/ 64 <100000000>;
|
||||
opp-microvolt = <800000>;
|
||||
};
|
||||
opp-134000000 {
|
||||
opp-hz = /bits/ 64 <134000000>;
|
||||
opp-microvolt = <800000>;
|
||||
};
|
||||
opp-200000000 {
|
||||
opp-hz = /bits/ 64 <200000000>;
|
||||
opp-microvolt = <825000>;
|
||||
};
|
||||
opp-400000000 {
|
||||
opp-hz = /bits/ 64 <400000000>;
|
||||
opp-microvolt = <875000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
bus_fsys: bus-fsys {
|
||||
compatible = "samsung,exynos-bus";
|
||||
clocks = <&cmu CLK_DIV_ACLK_200>;
|
||||
clock-names = "bus";
|
||||
operating-points-v2 = <&bus_leftbus_opp_table>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
bus_isp: bus-isp {
|
||||
compatible = "samsung,exynos-bus";
|
||||
clocks = <&cmu CLK_DIV_ACLK_266>;
|
||||
clock-names = "bus";
|
||||
operating-points-v2 = <&bus_isp_opp_table>;
|
||||
status = "disabled";
|
||||
|
||||
bus_isp_opp_table: opp-table {
|
||||
compatible = "operating-points-v2";
|
||||
|
||||
opp-50000000 {
|
||||
opp-hz = /bits/ 64 <50000000>;
|
||||
};
|
||||
opp-80000000 {
|
||||
opp-hz = /bits/ 64 <80000000>;
|
||||
};
|
||||
opp-100000000 {
|
||||
opp-hz = /bits/ 64 <100000000>;
|
||||
};
|
||||
opp-200000000 {
|
||||
opp-hz = /bits/ 64 <200000000>;
|
||||
};
|
||||
opp-300000000 {
|
||||
opp-hz = /bits/ 64 <300000000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
bus_lcd0: bus-lcd0 {
|
||||
compatible = "samsung,exynos-bus";
|
||||
clocks = <&cmu CLK_DIV_ACLK_160>;
|
||||
clock-names = "bus";
|
||||
operating-points-v2 = <&bus_leftbus_opp_table>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
bus_leftbus: bus-leftbus {
|
||||
compatible = "samsung,exynos-bus";
|
||||
clocks = <&cmu CLK_DIV_GDL>;
|
||||
clock-names = "bus";
|
||||
operating-points-v2 = <&bus_leftbus_opp_table>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
bus_mcuisp: bus-mcuisp {
|
||||
compatible = "samsung,exynos-bus";
|
||||
clocks = <&cmu CLK_DIV_ACLK_400_MCUISP>;
|
||||
clock-names = "bus";
|
||||
operating-points-v2 = <&bus_mcuisp_opp_table>;
|
||||
status = "disabled";
|
||||
|
||||
bus_mcuisp_opp_table: opp-table {
|
||||
compatible = "operating-points-v2";
|
||||
|
||||
opp-50000000 {
|
||||
opp-hz = /bits/ 64 <50000000>;
|
||||
};
|
||||
opp-80000000 {
|
||||
opp-hz = /bits/ 64 <80000000>;
|
||||
};
|
||||
opp-100000000 {
|
||||
opp-hz = /bits/ 64 <100000000>;
|
||||
};
|
||||
opp-200000000 {
|
||||
opp-hz = /bits/ 64 <200000000>;
|
||||
};
|
||||
opp-400000000 {
|
||||
opp-hz = /bits/ 64 <400000000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
bus_mfc: bus-mfc {
|
||||
compatible = "samsung,exynos-bus";
|
||||
clocks = <&cmu CLK_SCLK_MFC>;
|
||||
clock-names = "bus";
|
||||
operating-points-v2 = <&bus_leftbus_opp_table>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
bus_peril: bus-peril {
|
||||
compatible = "samsung,exynos-bus";
|
||||
clocks = <&cmu CLK_DIV_ACLK_100>;
|
||||
clock-names = "bus";
|
||||
operating-points-v2 = <&bus_peril_opp_table>;
|
||||
status = "disabled";
|
||||
|
||||
bus_peril_opp_table: opp-table {
|
||||
compatible = "operating-points-v2";
|
||||
|
||||
opp-50000000 {
|
||||
opp-hz = /bits/ 64 <50000000>;
|
||||
};
|
||||
opp-80000000 {
|
||||
opp-hz = /bits/ 64 <80000000>;
|
||||
};
|
||||
opp-100000000 {
|
||||
opp-hz = /bits/ 64 <100000000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
bus_rightbus: bus-rightbus {
|
||||
compatible = "samsung,exynos-bus";
|
||||
clocks = <&cmu CLK_DIV_GDR>;
|
||||
clock-names = "bus";
|
||||
operating-points-v2 = <&bus_leftbus_opp_table>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
cpus {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
@ -129,6 +280,31 @@ xtcxo: clock-2 {
|
|||
clock-output-names = "xtcxo";
|
||||
};
|
||||
|
||||
bus_leftbus_opp_table: opp-table-0 {
|
||||
compatible = "operating-points-v2";
|
||||
|
||||
opp-50000000 {
|
||||
opp-hz = /bits/ 64 <50000000>;
|
||||
opp-microvolt = <900000>;
|
||||
};
|
||||
opp-80000000 {
|
||||
opp-hz = /bits/ 64 <80000000>;
|
||||
opp-microvolt = <900000>;
|
||||
};
|
||||
opp-100000000 {
|
||||
opp-hz = /bits/ 64 <100000000>;
|
||||
opp-microvolt = <1000000>;
|
||||
};
|
||||
opp-134000000 {
|
||||
opp-hz = /bits/ 64 <134000000>;
|
||||
opp-microvolt = <1000000>;
|
||||
};
|
||||
opp-200000000 {
|
||||
opp-hz = /bits/ 64 <200000000>;
|
||||
opp-microvolt = <1000000>;
|
||||
};
|
||||
};
|
||||
|
||||
pmu {
|
||||
compatible = "arm,cortex-a7-pmu";
|
||||
interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>,
|
||||
|
@ -188,35 +364,35 @@ mipi_phy: video-phy {
|
|||
|
||||
pd_cam: power-domain@10023c00 {
|
||||
compatible = "samsung,exynos4210-pd";
|
||||
reg = <0x10023C00 0x20>;
|
||||
reg = <0x10023c00 0x20>;
|
||||
#power-domain-cells = <0>;
|
||||
label = "CAM";
|
||||
};
|
||||
|
||||
pd_mfc: power-domain@10023c40 {
|
||||
compatible = "samsung,exynos4210-pd";
|
||||
reg = <0x10023C40 0x20>;
|
||||
reg = <0x10023c40 0x20>;
|
||||
#power-domain-cells = <0>;
|
||||
label = "MFC";
|
||||
};
|
||||
|
||||
pd_g3d: power-domain@10023c60 {
|
||||
compatible = "samsung,exynos4210-pd";
|
||||
reg = <0x10023C60 0x20>;
|
||||
reg = <0x10023c60 0x20>;
|
||||
#power-domain-cells = <0>;
|
||||
label = "G3D";
|
||||
};
|
||||
|
||||
pd_lcd0: power-domain@10023c80 {
|
||||
compatible = "samsung,exynos4210-pd";
|
||||
reg = <0x10023C80 0x20>;
|
||||
reg = <0x10023c80 0x20>;
|
||||
#power-domain-cells = <0>;
|
||||
label = "LCD0";
|
||||
};
|
||||
|
||||
pd_isp: power-domain@10023ca0 {
|
||||
compatible = "samsung,exynos4210-pd";
|
||||
reg = <0x10023CA0 0x20>;
|
||||
reg = <0x10023ca0 0x20>;
|
||||
#power-domain-cells = <0>;
|
||||
label = "ISP";
|
||||
};
|
||||
|
@ -233,7 +409,7 @@ cmu: clock-controller@10030000 {
|
|||
|
||||
cmu_dmc: clock-controller@105c0000 {
|
||||
compatible = "samsung,exynos3250-cmu-dmc";
|
||||
reg = <0x105C0000 0x2000>;
|
||||
reg = <0x105c0000 0x2000>;
|
||||
#clock-cells = <1>;
|
||||
};
|
||||
|
||||
|
@ -248,7 +424,7 @@ rtc: rtc@10070000 {
|
|||
|
||||
tmu: tmu@100c0000 {
|
||||
compatible = "samsung,exynos3250-tmu";
|
||||
reg = <0x100C0000 0x100>;
|
||||
reg = <0x100c0000 0x100>;
|
||||
interrupts = <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cmu CLK_TMU_APBIF>;
|
||||
clock-names = "tmu_apbif";
|
||||
|
@ -342,7 +518,7 @@ fimd: fimd@11c00000 {
|
|||
|
||||
dsi_0: dsi@11c80000 {
|
||||
compatible = "samsung,exynos3250-mipi-dsi";
|
||||
reg = <0x11C80000 0x10000>;
|
||||
reg = <0x11c80000 0x10000>;
|
||||
interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
|
||||
samsung,phy-type = <0>;
|
||||
power-domains = <&pd_lcd0>;
|
||||
|
@ -365,7 +541,7 @@ sysmmu_fimd0: sysmmu@11e20000 {
|
|||
#iommu-cells = <0>;
|
||||
};
|
||||
|
||||
hsotg: hsotg@12480000 {
|
||||
hsotg: usb@12480000 {
|
||||
compatible = "samsung,s3c6400-hsotg";
|
||||
reg = <0x12480000 0x20000>;
|
||||
interrupts = <GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH>;
|
||||
|
@ -412,9 +588,9 @@ mshc_2: mmc@12530000 {
|
|||
status = "disabled";
|
||||
};
|
||||
|
||||
exynos_usbphy: exynos-usbphy@125b0000 {
|
||||
exynos_usbphy: usb-phy@125b0000 {
|
||||
compatible = "samsung,exynos3250-usb2-phy";
|
||||
reg = <0x125B0000 0x100>;
|
||||
reg = <0x125b0000 0x100>;
|
||||
samsung,pmureg-phandle = <&pmu_system_controller>;
|
||||
clocks = <&cmu CLK_USBOTG>, <&cmu CLK_SCLK_UPLL>;
|
||||
clock-names = "phy", "ref";
|
||||
|
@ -442,7 +618,7 @@ pdma1: dma-controller@12690000 {
|
|||
|
||||
adc: adc@126c0000 {
|
||||
compatible = "samsung,exynos3250-adc";
|
||||
reg = <0x126C0000 0x100>;
|
||||
reg = <0x126c0000 0x100>;
|
||||
interrupts = <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clock-names = "adc", "sclk";
|
||||
clocks = <&cmu CLK_TSADC>, <&cmu CLK_SCLK_TSADC>;
|
||||
|
@ -593,7 +769,7 @@ i2c_4: i2c@138a0000 {
|
|||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "samsung,s3c2440-i2c";
|
||||
reg = <0x138A0000 0x100>;
|
||||
reg = <0x138a0000 0x100>;
|
||||
interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cmu CLK_I2C4>;
|
||||
clock-names = "i2c";
|
||||
|
@ -606,7 +782,7 @@ i2c_5: i2c@138b0000 {
|
|||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "samsung,s3c2440-i2c";
|
||||
reg = <0x138B0000 0x100>;
|
||||
reg = <0x138b0000 0x100>;
|
||||
interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cmu CLK_I2C5>;
|
||||
clock-names = "i2c";
|
||||
|
@ -619,7 +795,7 @@ i2c_6: i2c@138c0000 {
|
|||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "samsung,s3c2440-i2c";
|
||||
reg = <0x138C0000 0x100>;
|
||||
reg = <0x138c0000 0x100>;
|
||||
interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cmu CLK_I2C6>;
|
||||
clock-names = "i2c";
|
||||
|
@ -632,7 +808,7 @@ i2c_7: i2c@138d0000 {
|
|||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "samsung,s3c2440-i2c";
|
||||
reg = <0x138D0000 0x100>;
|
||||
reg = <0x138d0000 0x100>;
|
||||
interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cmu CLK_I2C7>;
|
||||
clock-names = "i2c";
|
||||
|
@ -688,7 +864,7 @@ i2s2: i2s@13970000 {
|
|||
|
||||
pwm: pwm@139d0000 {
|
||||
compatible = "samsung,exynos4210-pwm";
|
||||
reg = <0x139D0000 0x1000>;
|
||||
reg = <0x139d0000 0x1000>;
|
||||
interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>,
|
||||
|
@ -771,182 +947,6 @@ ppmu_mfc: ppmu@13660000 {
|
|||
clock-names = "ppmu";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
bus_dmc: bus-dmc {
|
||||
compatible = "samsung,exynos-bus";
|
||||
clocks = <&cmu_dmc CLK_DIV_DMC>;
|
||||
clock-names = "bus";
|
||||
operating-points-v2 = <&bus_dmc_opp_table>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
bus_dmc_opp_table: opp-table1 {
|
||||
compatible = "operating-points-v2";
|
||||
|
||||
opp-50000000 {
|
||||
opp-hz = /bits/ 64 <50000000>;
|
||||
opp-microvolt = <800000>;
|
||||
};
|
||||
opp-100000000 {
|
||||
opp-hz = /bits/ 64 <100000000>;
|
||||
opp-microvolt = <800000>;
|
||||
};
|
||||
opp-134000000 {
|
||||
opp-hz = /bits/ 64 <134000000>;
|
||||
opp-microvolt = <800000>;
|
||||
};
|
||||
opp-200000000 {
|
||||
opp-hz = /bits/ 64 <200000000>;
|
||||
opp-microvolt = <825000>;
|
||||
};
|
||||
opp-400000000 {
|
||||
opp-hz = /bits/ 64 <400000000>;
|
||||
opp-microvolt = <875000>;
|
||||
};
|
||||
};
|
||||
|
||||
bus_leftbus: bus-leftbus {
|
||||
compatible = "samsung,exynos-bus";
|
||||
clocks = <&cmu CLK_DIV_GDL>;
|
||||
clock-names = "bus";
|
||||
operating-points-v2 = <&bus_leftbus_opp_table>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
bus_rightbus: bus-rightbus {
|
||||
compatible = "samsung,exynos-bus";
|
||||
clocks = <&cmu CLK_DIV_GDR>;
|
||||
clock-names = "bus";
|
||||
operating-points-v2 = <&bus_leftbus_opp_table>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
bus_lcd0: bus-lcd0 {
|
||||
compatible = "samsung,exynos-bus";
|
||||
clocks = <&cmu CLK_DIV_ACLK_160>;
|
||||
clock-names = "bus";
|
||||
operating-points-v2 = <&bus_leftbus_opp_table>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
bus_fsys: bus-fsys {
|
||||
compatible = "samsung,exynos-bus";
|
||||
clocks = <&cmu CLK_DIV_ACLK_200>;
|
||||
clock-names = "bus";
|
||||
operating-points-v2 = <&bus_leftbus_opp_table>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
bus_mcuisp: bus-mcuisp {
|
||||
compatible = "samsung,exynos-bus";
|
||||
clocks = <&cmu CLK_DIV_ACLK_400_MCUISP>;
|
||||
clock-names = "bus";
|
||||
operating-points-v2 = <&bus_mcuisp_opp_table>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
bus_isp: bus-isp {
|
||||
compatible = "samsung,exynos-bus";
|
||||
clocks = <&cmu CLK_DIV_ACLK_266>;
|
||||
clock-names = "bus";
|
||||
operating-points-v2 = <&bus_isp_opp_table>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
bus_peril: bus-peril {
|
||||
compatible = "samsung,exynos-bus";
|
||||
clocks = <&cmu CLK_DIV_ACLK_100>;
|
||||
clock-names = "bus";
|
||||
operating-points-v2 = <&bus_peril_opp_table>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
bus_mfc: bus-mfc {
|
||||
compatible = "samsung,exynos-bus";
|
||||
clocks = <&cmu CLK_SCLK_MFC>;
|
||||
clock-names = "bus";
|
||||
operating-points-v2 = <&bus_leftbus_opp_table>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
bus_leftbus_opp_table: opp-table2 {
|
||||
compatible = "operating-points-v2";
|
||||
|
||||
opp-50000000 {
|
||||
opp-hz = /bits/ 64 <50000000>;
|
||||
opp-microvolt = <900000>;
|
||||
};
|
||||
opp-80000000 {
|
||||
opp-hz = /bits/ 64 <80000000>;
|
||||
opp-microvolt = <900000>;
|
||||
};
|
||||
opp-100000000 {
|
||||
opp-hz = /bits/ 64 <100000000>;
|
||||
opp-microvolt = <1000000>;
|
||||
};
|
||||
opp-134000000 {
|
||||
opp-hz = /bits/ 64 <134000000>;
|
||||
opp-microvolt = <1000000>;
|
||||
};
|
||||
opp-200000000 {
|
||||
opp-hz = /bits/ 64 <200000000>;
|
||||
opp-microvolt = <1000000>;
|
||||
};
|
||||
};
|
||||
|
||||
bus_mcuisp_opp_table: opp-table3 {
|
||||
compatible = "operating-points-v2";
|
||||
|
||||
opp-50000000 {
|
||||
opp-hz = /bits/ 64 <50000000>;
|
||||
};
|
||||
opp-80000000 {
|
||||
opp-hz = /bits/ 64 <80000000>;
|
||||
};
|
||||
opp-100000000 {
|
||||
opp-hz = /bits/ 64 <100000000>;
|
||||
};
|
||||
opp-200000000 {
|
||||
opp-hz = /bits/ 64 <200000000>;
|
||||
};
|
||||
opp-400000000 {
|
||||
opp-hz = /bits/ 64 <400000000>;
|
||||
};
|
||||
};
|
||||
|
||||
bus_isp_opp_table: opp-table4 {
|
||||
compatible = "operating-points-v2";
|
||||
|
||||
opp-50000000 {
|
||||
opp-hz = /bits/ 64 <50000000>;
|
||||
};
|
||||
opp-80000000 {
|
||||
opp-hz = /bits/ 64 <80000000>;
|
||||
};
|
||||
opp-100000000 {
|
||||
opp-hz = /bits/ 64 <100000000>;
|
||||
};
|
||||
opp-200000000 {
|
||||
opp-hz = /bits/ 64 <200000000>;
|
||||
};
|
||||
opp-300000000 {
|
||||
opp-hz = /bits/ 64 <300000000>;
|
||||
};
|
||||
};
|
||||
|
||||
bus_peril_opp_table: opp-table5 {
|
||||
compatible = "operating-points-v2";
|
||||
|
||||
opp-50000000 {
|
||||
opp-hz = /bits/ 64 <50000000>;
|
||||
};
|
||||
opp-80000000 {
|
||||
opp-hz = /bits/ 64 <80000000>;
|
||||
};
|
||||
opp-100000000 {
|
||||
opp-hz = /bits/ 64 <100000000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
|
|
|
@ -65,7 +65,7 @@ soc: soc {
|
|||
|
||||
clock_audss: clock-controller@3810000 {
|
||||
compatible = "samsung,exynos4210-audss-clock";
|
||||
reg = <0x03810000 0x0C>;
|
||||
reg = <0x03810000 0x0c>;
|
||||
#clock-cells = <1>;
|
||||
clocks = <&clock CLK_FIN_PLL>, <&clock CLK_FOUT_EPLL>,
|
||||
<&clock CLK_SCLK_AUDIO0>,
|
||||
|
@ -113,28 +113,28 @@ mipi_phy: video-phy {
|
|||
|
||||
pd_mfc: power-domain@10023c40 {
|
||||
compatible = "samsung,exynos4210-pd";
|
||||
reg = <0x10023C40 0x20>;
|
||||
reg = <0x10023c40 0x20>;
|
||||
#power-domain-cells = <0>;
|
||||
label = "MFC";
|
||||
};
|
||||
|
||||
pd_g3d: power-domain@10023c60 {
|
||||
compatible = "samsung,exynos4210-pd";
|
||||
reg = <0x10023C60 0x20>;
|
||||
reg = <0x10023c60 0x20>;
|
||||
#power-domain-cells = <0>;
|
||||
label = "G3D";
|
||||
};
|
||||
|
||||
pd_lcd0: power-domain@10023c80 {
|
||||
compatible = "samsung,exynos4210-pd";
|
||||
reg = <0x10023C80 0x20>;
|
||||
reg = <0x10023c80 0x20>;
|
||||
#power-domain-cells = <0>;
|
||||
label = "LCD0";
|
||||
};
|
||||
|
||||
pd_tv: power-domain@10023c20 {
|
||||
compatible = "samsung,exynos4210-pd";
|
||||
reg = <0x10023C20 0x20>;
|
||||
reg = <0x10023c20 0x20>;
|
||||
#power-domain-cells = <0>;
|
||||
power-domains = <&pd_lcd0>;
|
||||
label = "TV";
|
||||
|
@ -142,21 +142,21 @@ pd_tv: power-domain@10023c20 {
|
|||
|
||||
pd_cam: power-domain@10023c00 {
|
||||
compatible = "samsung,exynos4210-pd";
|
||||
reg = <0x10023C00 0x20>;
|
||||
reg = <0x10023c00 0x20>;
|
||||
#power-domain-cells = <0>;
|
||||
label = "CAM";
|
||||
};
|
||||
|
||||
pd_gps: power-domain@10023ce0 {
|
||||
compatible = "samsung,exynos4210-pd";
|
||||
reg = <0x10023CE0 0x20>;
|
||||
reg = <0x10023ce0 0x20>;
|
||||
#power-domain-cells = <0>;
|
||||
label = "GPS";
|
||||
};
|
||||
|
||||
pd_gps_alive: power-domain@10023d00 {
|
||||
compatible = "samsung,exynos4210-pd";
|
||||
reg = <0x10023D00 0x20>;
|
||||
reg = <0x10023d00 0x20>;
|
||||
#power-domain-cells = <0>;
|
||||
label = "GPS alive";
|
||||
};
|
||||
|
@ -190,7 +190,7 @@ pmu_system_controller: system-controller@10020000 {
|
|||
|
||||
dsi_0: dsi@11c80000 {
|
||||
compatible = "samsung,exynos4210-mipi-dsi";
|
||||
reg = <0x11C80000 0x10000>;
|
||||
reg = <0x11c80000 0x10000>;
|
||||
interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>;
|
||||
power-domains = <&pd_lcd0>;
|
||||
phys = <&mipi_phy 1>;
|
||||
|
@ -309,7 +309,7 @@ rtc: rtc@10070000 {
|
|||
|
||||
keypad: keypad@100a0000 {
|
||||
compatible = "samsung,s5pv210-keypad";
|
||||
reg = <0x100A0000 0x100>;
|
||||
reg = <0x100a0000 0x100>;
|
||||
interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&clock CLK_KEYIF>;
|
||||
clock-names = "keypad";
|
||||
|
@ -352,9 +352,9 @@ sdhci_3: mmc@12540000 {
|
|||
status = "disabled";
|
||||
};
|
||||
|
||||
exynos_usbphy: exynos-usbphy@125b0000 {
|
||||
exynos_usbphy: usb-phy@125b0000 {
|
||||
compatible = "samsung,exynos4210-usb2-phy";
|
||||
reg = <0x125B0000 0x100>;
|
||||
reg = <0x125b0000 0x100>;
|
||||
samsung,pmureg-phandle = <&pmu_system_controller>;
|
||||
clocks = <&clock CLK_USB_DEVICE>, <&clock CLK_XUSBXTI>;
|
||||
clock-names = "phy", "ref";
|
||||
|
@ -362,7 +362,7 @@ exynos_usbphy: exynos-usbphy@125b0000 {
|
|||
status = "disabled";
|
||||
};
|
||||
|
||||
hsotg: hsotg@12480000 {
|
||||
hsotg: usb@12480000 {
|
||||
compatible = "samsung,s3c6400-hsotg";
|
||||
reg = <0x12480000 0x20000>;
|
||||
interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
|
||||
|
@ -546,7 +546,7 @@ i2c_4: i2c@138a0000 {
|
|||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "samsung,s3c2440-i2c";
|
||||
reg = <0x138A0000 0x100>;
|
||||
reg = <0x138a0000 0x100>;
|
||||
interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&clock CLK_I2C4>;
|
||||
clock-names = "i2c";
|
||||
|
@ -559,7 +559,7 @@ i2c_5: i2c@138b0000 {
|
|||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "samsung,s3c2440-i2c";
|
||||
reg = <0x138B0000 0x100>;
|
||||
reg = <0x138b0000 0x100>;
|
||||
interrupts = <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&clock CLK_I2C5>;
|
||||
clock-names = "i2c";
|
||||
|
@ -572,7 +572,7 @@ i2c_6: i2c@138c0000 {
|
|||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "samsung,s3c2440-i2c";
|
||||
reg = <0x138C0000 0x100>;
|
||||
reg = <0x138c0000 0x100>;
|
||||
interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&clock CLK_I2C6>;
|
||||
clock-names = "i2c";
|
||||
|
@ -585,7 +585,7 @@ i2c_7: i2c@138d0000 {
|
|||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "samsung,s3c2440-i2c";
|
||||
reg = <0x138D0000 0x100>;
|
||||
reg = <0x138d0000 0x100>;
|
||||
interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&clock CLK_I2C7>;
|
||||
clock-names = "i2c";
|
||||
|
@ -598,14 +598,14 @@ i2c_8: i2c@138e0000 {
|
|||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "samsung,s3c2440-hdmiphy-i2c";
|
||||
reg = <0x138E0000 0x100>;
|
||||
reg = <0x138e0000 0x100>;
|
||||
interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&clock CLK_I2C_HDMI>;
|
||||
clock-names = "i2c";
|
||||
status = "disabled";
|
||||
|
||||
hdmi_i2c_phy: hdmiphy@38 {
|
||||
compatible = "exynos4210-hdmiphy";
|
||||
hdmi_i2c_phy: hdmi-phy@38 {
|
||||
compatible = "samsung,exynos4210-hdmiphy";
|
||||
reg = <0x38>;
|
||||
};
|
||||
};
|
||||
|
@ -657,7 +657,7 @@ spi_2: spi@13940000 {
|
|||
|
||||
pwm: pwm@139d0000 {
|
||||
compatible = "samsung,exynos4210-pwm";
|
||||
reg = <0x139D0000 0x1000>;
|
||||
reg = <0x139d0000 0x1000>;
|
||||
interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
|
||||
|
@ -712,7 +712,7 @@ fimd: fimd@11c00000 {
|
|||
|
||||
tmu: tmu@100c0000 {
|
||||
interrupt-parent = <&combiner>;
|
||||
reg = <0x100C0000 0x100>;
|
||||
reg = <0x100c0000 0x100>;
|
||||
interrupts = <2 4>;
|
||||
status = "disabled";
|
||||
#thermal-sensor-cells = <0>;
|
||||
|
@ -739,7 +739,7 @@ rotator: rotator@12810000 {
|
|||
|
||||
hdmi: hdmi@12d00000 {
|
||||
compatible = "samsung,exynos4210-hdmi";
|
||||
reg = <0x12D00000 0x70000>;
|
||||
reg = <0x12d00000 0x70000>;
|
||||
interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clock-names = "hdmi", "sclk_hdmi", "sclk_pixel",
|
||||
"sclk_hdmiphy", "mout_hdmi";
|
||||
|
@ -756,7 +756,7 @@ hdmi: hdmi@12d00000 {
|
|||
|
||||
hdmicec: cec@100b0000 {
|
||||
compatible = "samsung,s5p-cec";
|
||||
reg = <0x100B0000 0x200>;
|
||||
reg = <0x100b0000 0x200>;
|
||||
interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&clock CLK_HDMI_CEC>;
|
||||
clock-names = "hdmicec";
|
||||
|
@ -770,7 +770,7 @@ hdmicec: cec@100b0000 {
|
|||
mixer: mixer@12c10000 {
|
||||
compatible = "samsung,exynos4210-mixer";
|
||||
interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>;
|
||||
reg = <0x12C10000 0x2100>, <0x12c00000 0x300>;
|
||||
reg = <0x12c10000 0x2100>, <0x12c00000 0x300>;
|
||||
power-domains = <&pd_tv>;
|
||||
iommus = <&sysmmu_tv>;
|
||||
status = "disabled";
|
||||
|
@ -902,7 +902,7 @@ sysmmu_mfc_r: sysmmu@13630000 {
|
|||
|
||||
sysmmu_tv: sysmmu@12e20000 {
|
||||
compatible = "samsung,exynos-sysmmu";
|
||||
reg = <0x12E20000 0x1000>;
|
||||
reg = <0x12e20000 0x1000>;
|
||||
interrupt-parent = <&combiner>;
|
||||
interrupts = <5 4>;
|
||||
clock-names = "sysmmu", "master";
|
||||
|
@ -913,7 +913,7 @@ sysmmu_tv: sysmmu@12e20000 {
|
|||
|
||||
sysmmu_fimc0: sysmmu@11a20000 {
|
||||
compatible = "samsung,exynos-sysmmu";
|
||||
reg = <0x11A20000 0x1000>;
|
||||
reg = <0x11a20000 0x1000>;
|
||||
interrupt-parent = <&combiner>;
|
||||
interrupts = <4 2>;
|
||||
clock-names = "sysmmu", "master";
|
||||
|
@ -924,7 +924,7 @@ sysmmu_fimc0: sysmmu@11a20000 {
|
|||
|
||||
sysmmu_fimc1: sysmmu@11a30000 {
|
||||
compatible = "samsung,exynos-sysmmu";
|
||||
reg = <0x11A30000 0x1000>;
|
||||
reg = <0x11a30000 0x1000>;
|
||||
interrupt-parent = <&combiner>;
|
||||
interrupts = <4 3>;
|
||||
clock-names = "sysmmu", "master";
|
||||
|
@ -935,7 +935,7 @@ sysmmu_fimc1: sysmmu@11a30000 {
|
|||
|
||||
sysmmu_fimc2: sysmmu@11a40000 {
|
||||
compatible = "samsung,exynos-sysmmu";
|
||||
reg = <0x11A40000 0x1000>;
|
||||
reg = <0x11a40000 0x1000>;
|
||||
interrupt-parent = <&combiner>;
|
||||
interrupts = <4 4>;
|
||||
clock-names = "sysmmu", "master";
|
||||
|
@ -946,7 +946,7 @@ sysmmu_fimc2: sysmmu@11a40000 {
|
|||
|
||||
sysmmu_fimc3: sysmmu@11a50000 {
|
||||
compatible = "samsung,exynos-sysmmu";
|
||||
reg = <0x11A50000 0x1000>;
|
||||
reg = <0x11a50000 0x1000>;
|
||||
interrupt-parent = <&combiner>;
|
||||
interrupts = <4 5>;
|
||||
clock-names = "sysmmu", "master";
|
||||
|
@ -957,7 +957,7 @@ sysmmu_fimc3: sysmmu@11a50000 {
|
|||
|
||||
sysmmu_jpeg: sysmmu@11a60000 {
|
||||
compatible = "samsung,exynos-sysmmu";
|
||||
reg = <0x11A60000 0x1000>;
|
||||
reg = <0x11a60000 0x1000>;
|
||||
interrupt-parent = <&combiner>;
|
||||
interrupts = <4 6>;
|
||||
clock-names = "sysmmu", "master";
|
||||
|
@ -968,7 +968,7 @@ sysmmu_jpeg: sysmmu@11a60000 {
|
|||
|
||||
sysmmu_rotator: sysmmu@12a30000 {
|
||||
compatible = "samsung,exynos-sysmmu";
|
||||
reg = <0x12A30000 0x1000>;
|
||||
reg = <0x12a30000 0x1000>;
|
||||
interrupt-parent = <&combiner>;
|
||||
interrupts = <5 0>;
|
||||
clock-names = "sysmmu", "master";
|
||||
|
@ -979,7 +979,7 @@ sysmmu_rotator: sysmmu@12a30000 {
|
|||
|
||||
sysmmu_fimd0: sysmmu@11e20000 {
|
||||
compatible = "samsung,exynos-sysmmu";
|
||||
reg = <0x11E20000 0x1000>;
|
||||
reg = <0x11e20000 0x1000>;
|
||||
interrupt-parent = <&combiner>;
|
||||
interrupts = <5 2>;
|
||||
clock-names = "sysmmu", "master";
|
||||
|
|
|
@ -85,7 +85,7 @@ key-menu {
|
|||
|
||||
leds {
|
||||
compatible = "gpio-leds";
|
||||
status {
|
||||
led-status {
|
||||
gpios = <&gpx1 3 GPIO_ACTIVE_LOW>;
|
||||
function = LED_FUNCTION_HEARTBEAT;
|
||||
linux,default-trigger = "heartbeat";
|
||||
|
|
|
@ -203,7 +203,7 @@ &spi_2 {
|
|||
flash@0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "w25x80";
|
||||
compatible = "winbond,w25x80", "jedec,spi-nor";
|
||||
reg = <0>;
|
||||
spi-max-frequency = <1000000>;
|
||||
|
||||
|
|
|
@ -28,6 +28,151 @@ aliases {
|
|||
pinctrl2 = &pinctrl_2;
|
||||
};
|
||||
|
||||
bus_acp: bus-acp {
|
||||
compatible = "samsung,exynos-bus";
|
||||
clocks = <&clock CLK_DIV_ACP>;
|
||||
clock-names = "bus";
|
||||
operating-points-v2 = <&bus_acp_opp_table>;
|
||||
status = "disabled";
|
||||
|
||||
bus_acp_opp_table: opp-table {
|
||||
compatible = "operating-points-v2";
|
||||
opp-shared;
|
||||
|
||||
opp-134000000 {
|
||||
opp-hz = /bits/ 64 <134000000>;
|
||||
};
|
||||
opp-160000000 {
|
||||
opp-hz = /bits/ 64 <160000000>;
|
||||
};
|
||||
opp-200000000 {
|
||||
opp-hz = /bits/ 64 <200000000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
bus_display: bus-display {
|
||||
compatible = "samsung,exynos-bus";
|
||||
clocks = <&clock CLK_ACLK160>;
|
||||
clock-names = "bus";
|
||||
operating-points-v2 = <&bus_display_opp_table>;
|
||||
status = "disabled";
|
||||
|
||||
bus_display_opp_table: opp-table {
|
||||
compatible = "operating-points-v2";
|
||||
opp-shared;
|
||||
|
||||
opp-100000000 {
|
||||
opp-hz = /bits/ 64 <100000000>;
|
||||
};
|
||||
opp-134000000 {
|
||||
opp-hz = /bits/ 64 <134000000>;
|
||||
};
|
||||
opp-160000000 {
|
||||
opp-hz = /bits/ 64 <160000000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
bus_dmc: bus-dmc {
|
||||
compatible = "samsung,exynos-bus";
|
||||
clocks = <&clock CLK_DIV_DMC>;
|
||||
clock-names = "bus";
|
||||
operating-points-v2 = <&bus_dmc_opp_table>;
|
||||
status = "disabled";
|
||||
|
||||
bus_dmc_opp_table: opp-table {
|
||||
compatible = "operating-points-v2";
|
||||
opp-shared;
|
||||
|
||||
opp-134000000 {
|
||||
opp-hz = /bits/ 64 <134000000>;
|
||||
opp-microvolt = <1025000>;
|
||||
};
|
||||
opp-267000000 {
|
||||
opp-hz = /bits/ 64 <267000000>;
|
||||
opp-microvolt = <1050000>;
|
||||
};
|
||||
opp-400000000 {
|
||||
opp-hz = /bits/ 64 <400000000>;
|
||||
opp-microvolt = <1150000>;
|
||||
opp-suspend;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
bus_fsys: bus-fsys {
|
||||
compatible = "samsung,exynos-bus";
|
||||
clocks = <&clock CLK_ACLK133>;
|
||||
clock-names = "bus";
|
||||
operating-points-v2 = <&bus_fsys_opp_table>;
|
||||
status = "disabled";
|
||||
|
||||
bus_fsys_opp_table: opp-table {
|
||||
compatible = "operating-points-v2";
|
||||
opp-shared;
|
||||
|
||||
opp-10000000 {
|
||||
opp-hz = /bits/ 64 <10000000>;
|
||||
};
|
||||
opp-134000000 {
|
||||
opp-hz = /bits/ 64 <134000000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
bus_lcd0: bus-lcd0 {
|
||||
compatible = "samsung,exynos-bus";
|
||||
clocks = <&clock CLK_ACLK200>;
|
||||
clock-names = "bus";
|
||||
operating-points-v2 = <&bus_leftbus_opp_table>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
bus_leftbus: bus-leftbus {
|
||||
compatible = "samsung,exynos-bus";
|
||||
clocks = <&clock CLK_DIV_GDL>;
|
||||
clock-names = "bus";
|
||||
operating-points-v2 = <&bus_leftbus_opp_table>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
bus_mfc: bus-mfc {
|
||||
compatible = "samsung,exynos-bus";
|
||||
clocks = <&clock CLK_SCLK_MFC>;
|
||||
clock-names = "bus";
|
||||
operating-points-v2 = <&bus_leftbus_opp_table>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
bus_peri: bus-peri {
|
||||
compatible = "samsung,exynos-bus";
|
||||
clocks = <&clock CLK_ACLK100>;
|
||||
clock-names = "bus";
|
||||
operating-points-v2 = <&bus_peri_opp_table>;
|
||||
status = "disabled";
|
||||
|
||||
bus_peri_opp_table: opp-table {
|
||||
compatible = "operating-points-v2";
|
||||
opp-shared;
|
||||
|
||||
opp-5000000 {
|
||||
opp-hz = /bits/ 64 <5000000>;
|
||||
};
|
||||
opp-100000000 {
|
||||
opp-hz = /bits/ 64 <100000000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
bus_rightbus: bus-rightbus {
|
||||
compatible = "samsung,exynos-bus";
|
||||
clocks = <&clock CLK_DIV_GDR>;
|
||||
clock-names = "bus";
|
||||
operating-points-v2 = <&bus_leftbus_opp_table>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
cpus {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
@ -82,6 +227,22 @@ cpu1: cpu@901 {
|
|||
};
|
||||
};
|
||||
|
||||
bus_leftbus_opp_table: opp-table-0 {
|
||||
compatible = "operating-points-v2";
|
||||
opp-shared;
|
||||
|
||||
opp-100000000 {
|
||||
opp-hz = /bits/ 64 <100000000>;
|
||||
};
|
||||
opp-160000000 {
|
||||
opp-hz = /bits/ 64 <160000000>;
|
||||
};
|
||||
opp-200000000 {
|
||||
opp-hz = /bits/ 64 <200000000>;
|
||||
opp-suspend;
|
||||
};
|
||||
};
|
||||
|
||||
soc: soc {
|
||||
sysram: sram@2020000 {
|
||||
compatible = "mmio-sram";
|
||||
|
@ -103,7 +264,7 @@ smp-sram@1f000 {
|
|||
|
||||
pd_lcd1: power-domain@10023ca0 {
|
||||
compatible = "samsung,exynos4210-pd";
|
||||
reg = <0x10023CA0 0x20>;
|
||||
reg = <0x10023ca0 0x20>;
|
||||
#power-domain-cells = <0>;
|
||||
label = "LCD1";
|
||||
};
|
||||
|
@ -195,7 +356,7 @@ ppmu_lcd1: ppmu@12240000 {
|
|||
|
||||
sysmmu_g2d: sysmmu@12a20000 {
|
||||
compatible = "samsung,exynos-sysmmu";
|
||||
reg = <0x12A20000 0x1000>;
|
||||
reg = <0x12a20000 0x1000>;
|
||||
interrupt-parent = <&combiner>;
|
||||
interrupts = <4 7>;
|
||||
clock-names = "sysmmu", "master";
|
||||
|
@ -214,167 +375,6 @@ sysmmu_fimd1: sysmmu@12220000 {
|
|||
power-domains = <&pd_lcd1>;
|
||||
#iommu-cells = <0>;
|
||||
};
|
||||
|
||||
bus_dmc: bus-dmc {
|
||||
compatible = "samsung,exynos-bus";
|
||||
clocks = <&clock CLK_DIV_DMC>;
|
||||
clock-names = "bus";
|
||||
operating-points-v2 = <&bus_dmc_opp_table>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
bus_acp: bus-acp {
|
||||
compatible = "samsung,exynos-bus";
|
||||
clocks = <&clock CLK_DIV_ACP>;
|
||||
clock-names = "bus";
|
||||
operating-points-v2 = <&bus_acp_opp_table>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
bus_peri: bus-peri {
|
||||
compatible = "samsung,exynos-bus";
|
||||
clocks = <&clock CLK_ACLK100>;
|
||||
clock-names = "bus";
|
||||
operating-points-v2 = <&bus_peri_opp_table>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
bus_fsys: bus-fsys {
|
||||
compatible = "samsung,exynos-bus";
|
||||
clocks = <&clock CLK_ACLK133>;
|
||||
clock-names = "bus";
|
||||
operating-points-v2 = <&bus_fsys_opp_table>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
bus_display: bus-display {
|
||||
compatible = "samsung,exynos-bus";
|
||||
clocks = <&clock CLK_ACLK160>;
|
||||
clock-names = "bus";
|
||||
operating-points-v2 = <&bus_display_opp_table>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
bus_lcd0: bus-lcd0 {
|
||||
compatible = "samsung,exynos-bus";
|
||||
clocks = <&clock CLK_ACLK200>;
|
||||
clock-names = "bus";
|
||||
operating-points-v2 = <&bus_leftbus_opp_table>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
bus_leftbus: bus-leftbus {
|
||||
compatible = "samsung,exynos-bus";
|
||||
clocks = <&clock CLK_DIV_GDL>;
|
||||
clock-names = "bus";
|
||||
operating-points-v2 = <&bus_leftbus_opp_table>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
bus_rightbus: bus-rightbus {
|
||||
compatible = "samsung,exynos-bus";
|
||||
clocks = <&clock CLK_DIV_GDR>;
|
||||
clock-names = "bus";
|
||||
operating-points-v2 = <&bus_leftbus_opp_table>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
bus_mfc: bus-mfc {
|
||||
compatible = "samsung,exynos-bus";
|
||||
clocks = <&clock CLK_SCLK_MFC>;
|
||||
clock-names = "bus";
|
||||
operating-points-v2 = <&bus_leftbus_opp_table>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
bus_dmc_opp_table: opp-table1 {
|
||||
compatible = "operating-points-v2";
|
||||
opp-shared;
|
||||
|
||||
opp-134000000 {
|
||||
opp-hz = /bits/ 64 <134000000>;
|
||||
opp-microvolt = <1025000>;
|
||||
};
|
||||
opp-267000000 {
|
||||
opp-hz = /bits/ 64 <267000000>;
|
||||
opp-microvolt = <1050000>;
|
||||
};
|
||||
opp-400000000 {
|
||||
opp-hz = /bits/ 64 <400000000>;
|
||||
opp-microvolt = <1150000>;
|
||||
opp-suspend;
|
||||
};
|
||||
};
|
||||
|
||||
bus_acp_opp_table: opp-table2 {
|
||||
compatible = "operating-points-v2";
|
||||
opp-shared;
|
||||
|
||||
opp-134000000 {
|
||||
opp-hz = /bits/ 64 <134000000>;
|
||||
};
|
||||
opp-160000000 {
|
||||
opp-hz = /bits/ 64 <160000000>;
|
||||
};
|
||||
opp-200000000 {
|
||||
opp-hz = /bits/ 64 <200000000>;
|
||||
};
|
||||
};
|
||||
|
||||
bus_peri_opp_table: opp-table3 {
|
||||
compatible = "operating-points-v2";
|
||||
opp-shared;
|
||||
|
||||
opp-5000000 {
|
||||
opp-hz = /bits/ 64 <5000000>;
|
||||
};
|
||||
opp-100000000 {
|
||||
opp-hz = /bits/ 64 <100000000>;
|
||||
};
|
||||
};
|
||||
|
||||
bus_fsys_opp_table: opp-table4 {
|
||||
compatible = "operating-points-v2";
|
||||
opp-shared;
|
||||
|
||||
opp-10000000 {
|
||||
opp-hz = /bits/ 64 <10000000>;
|
||||
};
|
||||
opp-134000000 {
|
||||
opp-hz = /bits/ 64 <134000000>;
|
||||
};
|
||||
};
|
||||
|
||||
bus_display_opp_table: opp-table5 {
|
||||
compatible = "operating-points-v2";
|
||||
opp-shared;
|
||||
|
||||
opp-100000000 {
|
||||
opp-hz = /bits/ 64 <100000000>;
|
||||
};
|
||||
opp-134000000 {
|
||||
opp-hz = /bits/ 64 <134000000>;
|
||||
};
|
||||
opp-160000000 {
|
||||
opp-hz = /bits/ 64 <160000000>;
|
||||
};
|
||||
};
|
||||
|
||||
bus_leftbus_opp_table: opp-table6 {
|
||||
compatible = "operating-points-v2";
|
||||
opp-shared;
|
||||
|
||||
opp-100000000 {
|
||||
opp-hz = /bits/ 64 <100000000>;
|
||||
};
|
||||
opp-160000000 {
|
||||
opp-hz = /bits/ 64 <160000000>;
|
||||
};
|
||||
opp-200000000 {
|
||||
opp-hz = /bits/ 64 <200000000>;
|
||||
opp-suspend;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
|
|
|
@ -214,7 +214,7 @@ &sdhci_2 {
|
|||
bus-width = <4>;
|
||||
pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_bus4>;
|
||||
pinctrl-names = "default";
|
||||
cd-gpio = <&gpx0 7 GPIO_ACTIVE_LOW>;
|
||||
cd-gpios = <&gpx0 7 GPIO_ACTIVE_LOW>;
|
||||
cap-sd-highspeed;
|
||||
vmmc-supply = <&ldo23_reg>;
|
||||
vqmmc-supply = <&ldo17_reg>;
|
||||
|
|
|
@ -25,7 +25,7 @@ memory@40000000 {
|
|||
|
||||
firmware@203f000 {
|
||||
compatible = "samsung,secure-firmware";
|
||||
reg = <0x0203F000 0x1000>;
|
||||
reg = <0x0203f000 0x1000>;
|
||||
};
|
||||
|
||||
fixed-rate-clocks {
|
||||
|
|
|
@ -33,7 +33,7 @@ chosen {
|
|||
|
||||
firmware@204f000 {
|
||||
compatible = "samsung,secure-firmware";
|
||||
reg = <0x0204F000 0x1000>;
|
||||
reg = <0x0204f000 0x1000>;
|
||||
};
|
||||
|
||||
fixed-rate-clocks {
|
||||
|
@ -273,9 +273,16 @@ sii9234: hdmi-bridge@39 {
|
|||
interrupts = <5 IRQ_TYPE_LEVEL_HIGH>;
|
||||
reg = <0x39>;
|
||||
|
||||
port {
|
||||
mhl_to_hdmi: endpoint {
|
||||
remote-endpoint = <&hdmi_to_mhl>;
|
||||
ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
port@0 {
|
||||
reg = <0>;
|
||||
|
||||
mhl_to_hdmi: endpoint {
|
||||
remote-endpoint = <&hdmi_to_mhl>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
@ -646,8 +653,8 @@ wm1811: audio-codec@1a {
|
|||
CPVDD-supply = <&vbatt_reg>;
|
||||
SPKVDD1-supply = <&vbatt_reg>;
|
||||
SPKVDD2-supply = <&vbatt_reg>;
|
||||
wlf,ldo1ena = <&gpj0 4 0>;
|
||||
wlf,ldo2ena = <&gpj0 4 0>;
|
||||
wlf,ldo1ena-gpios = <&gpj0 4 GPIO_ACTIVE_HIGH>;
|
||||
wlf,ldo2ena-gpios = <&gpj0 4 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
};
|
||||
|
||||
|
|
|
@ -19,7 +19,7 @@ chosen {
|
|||
|
||||
firmware@204f000 {
|
||||
compatible = "samsung,secure-firmware";
|
||||
reg = <0x0204F000 0x1000>;
|
||||
reg = <0x0204f000 0x1000>;
|
||||
};
|
||||
|
||||
gpio_keys: gpio-keys {
|
||||
|
|
|
@ -23,7 +23,7 @@ aliases {
|
|||
|
||||
memory@40000000 {
|
||||
device_type = "memory";
|
||||
reg = <0x40000000 0x7FF00000>;
|
||||
reg = <0x40000000 0x7ff00000>;
|
||||
};
|
||||
|
||||
vbus_otg_reg: regulator-1 {
|
||||
|
|
|
@ -22,7 +22,7 @@ aliases {
|
|||
|
||||
memory@40000000 {
|
||||
device_type = "memory";
|
||||
reg = <0x40000000 0x3FF00000>;
|
||||
reg = <0x40000000 0x3ff00000>;
|
||||
};
|
||||
|
||||
leds {
|
||||
|
|
|
@ -17,6 +17,6 @@ / {
|
|||
|
||||
memory@40000000 {
|
||||
device_type = "memory";
|
||||
reg = <0x40000000 0x7FF00000>;
|
||||
reg = <0x40000000 0x7ff00000>;
|
||||
};
|
||||
};
|
||||
|
|
|
@ -31,7 +31,7 @@ chosen {
|
|||
|
||||
firmware@203f000 {
|
||||
compatible = "samsung,secure-firmware";
|
||||
reg = <0x0203F000 0x1000>;
|
||||
reg = <0x0203f000 0x1000>;
|
||||
};
|
||||
|
||||
mmc_reg: regulator-0 {
|
||||
|
|
|
@ -32,7 +32,7 @@ chosen {
|
|||
|
||||
firmware@204f000 {
|
||||
compatible = "samsung,secure-firmware";
|
||||
reg = <0x0204F000 0x1000>;
|
||||
reg = <0x0204f000 0x1000>;
|
||||
};
|
||||
|
||||
fixed-rate-clocks {
|
||||
|
@ -132,8 +132,6 @@ battery_cell: battery-cell {
|
|||
precharge-current-microamp = <250000>;
|
||||
charge-term-current-microamp = <250000>;
|
||||
constant-charge-voltage-max-microvolt = <4200000>;
|
||||
|
||||
power-supplies = <&power_supply>;
|
||||
};
|
||||
|
||||
i2c-gpio-1 {
|
||||
|
@ -200,7 +198,7 @@ adc@41 {
|
|||
stmpe_adc {
|
||||
compatible = "st,stmpe-adc";
|
||||
#io-channel-cells = <1>;
|
||||
st,norequest-mask = <0x2F>;
|
||||
st,norequest-mask = <0x2f>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
@ -247,6 +245,7 @@ backlight: backlight {
|
|||
pinctrl-0 = <&led_bl_reset>;
|
||||
pinctrl-names = "default";
|
||||
enable-gpios = <&gpm0 1 GPIO_ACTIVE_HIGH>;
|
||||
power-supply = <&panel_vdd>;
|
||||
pwms = <&pwm 1 78770 0>;
|
||||
brightness-levels = <0 48 128 255>;
|
||||
num-interpolated-steps = <8>;
|
||||
|
|
|
@ -12,7 +12,7 @@
|
|||
#include "exynos-pinctrl.h"
|
||||
|
||||
#define PIN_SLP(_pin, _mode, _pull) \
|
||||
_pin { \
|
||||
pin- ## _pin { \
|
||||
samsung,pins = #_pin; \
|
||||
samsung,pin-con-pdn = <EXYNOS_PIN_PDN_ ##_mode>; \
|
||||
samsung,pin-pud-pdn = <EXYNOS_PIN_PULL_ ##_pull>; \
|
||||
|
|
|
@ -79,6 +79,7 @@ pmic_ap_clk: pmic-ap-clk {
|
|||
|
||||
panel {
|
||||
compatible = "innolux,at070tn92";
|
||||
power-supply = <&vddq_lcd>;
|
||||
|
||||
port {
|
||||
panel_input: endpoint {
|
||||
|
@ -86,6 +87,13 @@ panel_input: endpoint {
|
|||
};
|
||||
};
|
||||
};
|
||||
|
||||
vddq_lcd: regulator-vddq-lcd {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vddq-lcd";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
};
|
||||
};
|
||||
|
||||
&cpu_thermal {
|
||||
|
|
|
@ -31,6 +31,134 @@ aliases {
|
|||
mshc0 = &mshc_0;
|
||||
};
|
||||
|
||||
bus_acp: bus-acp {
|
||||
compatible = "samsung,exynos-bus";
|
||||
clocks = <&clock CLK_DIV_ACP>;
|
||||
clock-names = "bus";
|
||||
operating-points-v2 = <&bus_acp_opp_table>;
|
||||
status = "disabled";
|
||||
|
||||
bus_acp_opp_table: opp-table {
|
||||
compatible = "operating-points-v2";
|
||||
|
||||
opp-100000000 {
|
||||
opp-hz = /bits/ 64 <100000000>;
|
||||
};
|
||||
opp-134000000 {
|
||||
opp-hz = /bits/ 64 <134000000>;
|
||||
};
|
||||
opp-160000000 {
|
||||
opp-hz = /bits/ 64 <160000000>;
|
||||
};
|
||||
opp-267000000 {
|
||||
opp-hz = /bits/ 64 <267000000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
bus_c2c: bus-c2c {
|
||||
compatible = "samsung,exynos-bus";
|
||||
clocks = <&clock CLK_DIV_C2C>;
|
||||
clock-names = "bus";
|
||||
operating-points-v2 = <&bus_dmc_opp_table>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
bus_dmc: bus-dmc {
|
||||
compatible = "samsung,exynos-bus";
|
||||
clocks = <&clock CLK_DIV_DMC>;
|
||||
clock-names = "bus";
|
||||
operating-points-v2 = <&bus_dmc_opp_table>;
|
||||
samsung,data-clock-ratio = <4>;
|
||||
#interconnect-cells = <0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
bus_display: bus-display {
|
||||
compatible = "samsung,exynos-bus";
|
||||
clocks = <&clock CLK_ACLK160>;
|
||||
clock-names = "bus";
|
||||
operating-points-v2 = <&bus_display_opp_table>;
|
||||
interconnects = <&bus_leftbus &bus_dmc>;
|
||||
#interconnect-cells = <0>;
|
||||
status = "disabled";
|
||||
|
||||
bus_display_opp_table: opp-table {
|
||||
compatible = "operating-points-v2";
|
||||
|
||||
opp-160000000 {
|
||||
opp-hz = /bits/ 64 <160000000>;
|
||||
};
|
||||
opp-200000000 {
|
||||
opp-hz = /bits/ 64 <200000000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
bus_fsys: bus-fsys {
|
||||
compatible = "samsung,exynos-bus";
|
||||
clocks = <&clock CLK_ACLK133>;
|
||||
clock-names = "bus";
|
||||
operating-points-v2 = <&bus_fsys_opp_table>;
|
||||
status = "disabled";
|
||||
|
||||
bus_fsys_opp_table: opp-table {
|
||||
compatible = "operating-points-v2";
|
||||
|
||||
opp-100000000 {
|
||||
opp-hz = /bits/ 64 <100000000>;
|
||||
};
|
||||
opp-134000000 {
|
||||
opp-hz = /bits/ 64 <134000000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
bus_leftbus: bus-leftbus {
|
||||
compatible = "samsung,exynos-bus";
|
||||
clocks = <&clock CLK_DIV_GDL>;
|
||||
clock-names = "bus";
|
||||
operating-points-v2 = <&bus_leftbus_opp_table>;
|
||||
interconnects = <&bus_dmc>;
|
||||
#interconnect-cells = <0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
bus_mfc: bus-mfc {
|
||||
compatible = "samsung,exynos-bus";
|
||||
clocks = <&clock CLK_SCLK_MFC>;
|
||||
clock-names = "bus";
|
||||
operating-points-v2 = <&bus_leftbus_opp_table>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
bus_peri: bus-peri {
|
||||
compatible = "samsung,exynos-bus";
|
||||
clocks = <&clock CLK_ACLK100>;
|
||||
clock-names = "bus";
|
||||
operating-points-v2 = <&bus_peri_opp_table>;
|
||||
status = "disabled";
|
||||
|
||||
bus_peri_opp_table: opp-table {
|
||||
compatible = "operating-points-v2";
|
||||
|
||||
opp-50000000 {
|
||||
opp-hz = /bits/ 64 <50000000>;
|
||||
};
|
||||
opp-100000000 {
|
||||
opp-hz = /bits/ 64 <100000000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
bus_rightbus: bus-rightbus {
|
||||
compatible = "samsung,exynos-bus";
|
||||
clocks = <&clock CLK_DIV_GDR>;
|
||||
clock-names = "bus";
|
||||
operating-points-v2 = <&bus_leftbus_opp_table>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
cpus {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
@ -55,7 +183,7 @@ core3 {
|
|||
cpu0: cpu@a00 {
|
||||
device_type = "cpu";
|
||||
compatible = "arm,cortex-a9";
|
||||
reg = <0xA00>;
|
||||
reg = <0xa00>;
|
||||
clocks = <&clock CLK_ARM_CLK>;
|
||||
clock-names = "cpu";
|
||||
operating-points-v2 = <&cpu0_opp_table>;
|
||||
|
@ -65,7 +193,7 @@ cpu0: cpu@a00 {
|
|||
cpu1: cpu@a01 {
|
||||
device_type = "cpu";
|
||||
compatible = "arm,cortex-a9";
|
||||
reg = <0xA01>;
|
||||
reg = <0xa01>;
|
||||
clocks = <&clock CLK_ARM_CLK>;
|
||||
clock-names = "cpu";
|
||||
operating-points-v2 = <&cpu0_opp_table>;
|
||||
|
@ -75,7 +203,7 @@ cpu1: cpu@a01 {
|
|||
cpu2: cpu@a02 {
|
||||
device_type = "cpu";
|
||||
compatible = "arm,cortex-a9";
|
||||
reg = <0xA02>;
|
||||
reg = <0xa02>;
|
||||
clocks = <&clock CLK_ARM_CLK>;
|
||||
clock-names = "cpu";
|
||||
operating-points-v2 = <&cpu0_opp_table>;
|
||||
|
@ -85,7 +213,7 @@ cpu2: cpu@a02 {
|
|||
cpu3: cpu@a03 {
|
||||
device_type = "cpu";
|
||||
compatible = "arm,cortex-a9";
|
||||
reg = <0xA03>;
|
||||
reg = <0xa03>;
|
||||
clocks = <&clock CLK_ARM_CLK>;
|
||||
clock-names = "cpu";
|
||||
operating-points-v2 = <&cpu0_opp_table>;
|
||||
|
@ -93,7 +221,7 @@ cpu3: cpu@a03 {
|
|||
};
|
||||
};
|
||||
|
||||
cpu0_opp_table: opp-table0 {
|
||||
cpu0_opp_table: opp-table-0 {
|
||||
compatible = "operating-points-v2";
|
||||
opp-shared;
|
||||
|
||||
|
@ -171,6 +299,53 @@ cpu0_opp_1500: opp-1500000000 {
|
|||
};
|
||||
};
|
||||
|
||||
bus_dmc_opp_table: opp-table-1 {
|
||||
compatible = "operating-points-v2";
|
||||
|
||||
opp-100000000 {
|
||||
opp-hz = /bits/ 64 <100000000>;
|
||||
opp-microvolt = <900000>;
|
||||
};
|
||||
opp-134000000 {
|
||||
opp-hz = /bits/ 64 <134000000>;
|
||||
opp-microvolt = <900000>;
|
||||
};
|
||||
opp-160000000 {
|
||||
opp-hz = /bits/ 64 <160000000>;
|
||||
opp-microvolt = <900000>;
|
||||
};
|
||||
opp-267000000 {
|
||||
opp-hz = /bits/ 64 <267000000>;
|
||||
opp-microvolt = <950000>;
|
||||
};
|
||||
opp-400000000 {
|
||||
opp-hz = /bits/ 64 <400000000>;
|
||||
opp-microvolt = <1050000>;
|
||||
opp-suspend;
|
||||
};
|
||||
};
|
||||
|
||||
bus_leftbus_opp_table: opp-table-2 {
|
||||
compatible = "operating-points-v2";
|
||||
|
||||
opp-100000000 {
|
||||
opp-hz = /bits/ 64 <100000000>;
|
||||
opp-microvolt = <900000>;
|
||||
};
|
||||
opp-134000000 {
|
||||
opp-hz = /bits/ 64 <134000000>;
|
||||
opp-microvolt = <925000>;
|
||||
};
|
||||
opp-160000000 {
|
||||
opp-hz = /bits/ 64 <160000000>;
|
||||
opp-microvolt = <950000>;
|
||||
};
|
||||
opp-200000000 {
|
||||
opp-hz = /bits/ 64 <200000000>;
|
||||
opp-microvolt = <1000000>;
|
||||
opp-suspend;
|
||||
};
|
||||
};
|
||||
|
||||
soc: soc {
|
||||
|
||||
|
@ -201,7 +376,7 @@ pinctrl_2: pinctrl@3860000 {
|
|||
|
||||
pinctrl_3: pinctrl@106e0000 {
|
||||
compatible = "samsung,exynos4x12-pinctrl";
|
||||
reg = <0x106E0000 0x1000>;
|
||||
reg = <0x106e0000 0x1000>;
|
||||
interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
|
||||
};
|
||||
|
||||
|
@ -225,7 +400,7 @@ smp-sram@2f000 {
|
|||
|
||||
pd_isp: power-domain@10023ca0 {
|
||||
compatible = "samsung,exynos4210-pd";
|
||||
reg = <0x10023CA0 0x20>;
|
||||
reg = <0x10023ca0 0x20>;
|
||||
#power-domain-cells = <0>;
|
||||
label = "ISP";
|
||||
};
|
||||
|
@ -285,7 +460,7 @@ watchdog: watchdog@10060000 {
|
|||
|
||||
adc: adc@126c0000 {
|
||||
compatible = "samsung,exynos4212-adc";
|
||||
reg = <0x126C0000 0x100>;
|
||||
reg = <0x126c0000 0x100>;
|
||||
interrupt-parent = <&combiner>;
|
||||
interrupts = <10 3>;
|
||||
clocks = <&clock CLK_TSADC>;
|
||||
|
@ -318,7 +493,7 @@ mshc_0: mmc@12550000 {
|
|||
|
||||
sysmmu_g2d: sysmmu@10a40000 {
|
||||
compatible = "samsung,exynos-sysmmu";
|
||||
reg = <0x10A40000 0x1000>;
|
||||
reg = <0x10a40000 0x1000>;
|
||||
interrupt-parent = <&combiner>;
|
||||
interrupts = <4 7>;
|
||||
clock-names = "sysmmu", "master";
|
||||
|
@ -350,7 +525,7 @@ sysmmu_fimc_drc: sysmmu@12270000 {
|
|||
|
||||
sysmmu_fimc_fd: sysmmu@122a0000 {
|
||||
compatible = "samsung,exynos-sysmmu";
|
||||
reg = <0x122A0000 0x1000>;
|
||||
reg = <0x122a0000 0x1000>;
|
||||
interrupt-parent = <&combiner>;
|
||||
interrupts = <16 4>;
|
||||
power-domains = <&pd_isp>;
|
||||
|
@ -361,7 +536,7 @@ sysmmu_fimc_fd: sysmmu@122a0000 {
|
|||
|
||||
sysmmu_fimc_mcuctl: sysmmu@122b0000 {
|
||||
compatible = "samsung,exynos-sysmmu";
|
||||
reg = <0x122B0000 0x1000>;
|
||||
reg = <0x122b0000 0x1000>;
|
||||
interrupt-parent = <&combiner>;
|
||||
interrupts = <16 5>;
|
||||
power-domains = <&pd_isp>;
|
||||
|
@ -372,7 +547,7 @@ sysmmu_fimc_mcuctl: sysmmu@122b0000 {
|
|||
|
||||
sysmmu_fimc_lite0: sysmmu@123b0000 {
|
||||
compatible = "samsung,exynos-sysmmu";
|
||||
reg = <0x123B0000 0x1000>;
|
||||
reg = <0x123b0000 0x1000>;
|
||||
interrupt-parent = <&combiner>;
|
||||
interrupts = <16 0>;
|
||||
power-domains = <&pd_isp>;
|
||||
|
@ -384,7 +559,7 @@ sysmmu_fimc_lite0: sysmmu@123b0000 {
|
|||
|
||||
sysmmu_fimc_lite1: sysmmu@123c0000 {
|
||||
compatible = "samsung,exynos-sysmmu";
|
||||
reg = <0x123C0000 0x1000>;
|
||||
reg = <0x123c0000 0x1000>;
|
||||
interrupt-parent = <&combiner>;
|
||||
interrupts = <16 1>;
|
||||
power-domains = <&pd_isp>;
|
||||
|
@ -393,182 +568,6 @@ sysmmu_fimc_lite1: sysmmu@123c0000 {
|
|||
<&isp_clock CLK_ISP_FIMC_LITE1>;
|
||||
#iommu-cells = <0>;
|
||||
};
|
||||
|
||||
bus_dmc: bus-dmc {
|
||||
compatible = "samsung,exynos-bus";
|
||||
clocks = <&clock CLK_DIV_DMC>;
|
||||
clock-names = "bus";
|
||||
operating-points-v2 = <&bus_dmc_opp_table>;
|
||||
samsung,data-clock-ratio = <4>;
|
||||
#interconnect-cells = <0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
bus_acp: bus-acp {
|
||||
compatible = "samsung,exynos-bus";
|
||||
clocks = <&clock CLK_DIV_ACP>;
|
||||
clock-names = "bus";
|
||||
operating-points-v2 = <&bus_acp_opp_table>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
bus_c2c: bus-c2c {
|
||||
compatible = "samsung,exynos-bus";
|
||||
clocks = <&clock CLK_DIV_C2C>;
|
||||
clock-names = "bus";
|
||||
operating-points-v2 = <&bus_dmc_opp_table>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
bus_dmc_opp_table: opp-table1 {
|
||||
compatible = "operating-points-v2";
|
||||
|
||||
opp-100000000 {
|
||||
opp-hz = /bits/ 64 <100000000>;
|
||||
opp-microvolt = <900000>;
|
||||
};
|
||||
opp-134000000 {
|
||||
opp-hz = /bits/ 64 <134000000>;
|
||||
opp-microvolt = <900000>;
|
||||
};
|
||||
opp-160000000 {
|
||||
opp-hz = /bits/ 64 <160000000>;
|
||||
opp-microvolt = <900000>;
|
||||
};
|
||||
opp-267000000 {
|
||||
opp-hz = /bits/ 64 <267000000>;
|
||||
opp-microvolt = <950000>;
|
||||
};
|
||||
opp-400000000 {
|
||||
opp-hz = /bits/ 64 <400000000>;
|
||||
opp-microvolt = <1050000>;
|
||||
opp-suspend;
|
||||
};
|
||||
};
|
||||
|
||||
bus_acp_opp_table: opp-table2 {
|
||||
compatible = "operating-points-v2";
|
||||
|
||||
opp-100000000 {
|
||||
opp-hz = /bits/ 64 <100000000>;
|
||||
};
|
||||
opp-134000000 {
|
||||
opp-hz = /bits/ 64 <134000000>;
|
||||
};
|
||||
opp-160000000 {
|
||||
opp-hz = /bits/ 64 <160000000>;
|
||||
};
|
||||
opp-267000000 {
|
||||
opp-hz = /bits/ 64 <267000000>;
|
||||
};
|
||||
};
|
||||
|
||||
bus_leftbus: bus-leftbus {
|
||||
compatible = "samsung,exynos-bus";
|
||||
clocks = <&clock CLK_DIV_GDL>;
|
||||
clock-names = "bus";
|
||||
operating-points-v2 = <&bus_leftbus_opp_table>;
|
||||
interconnects = <&bus_dmc>;
|
||||
#interconnect-cells = <0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
bus_rightbus: bus-rightbus {
|
||||
compatible = "samsung,exynos-bus";
|
||||
clocks = <&clock CLK_DIV_GDR>;
|
||||
clock-names = "bus";
|
||||
operating-points-v2 = <&bus_leftbus_opp_table>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
bus_display: bus-display {
|
||||
compatible = "samsung,exynos-bus";
|
||||
clocks = <&clock CLK_ACLK160>;
|
||||
clock-names = "bus";
|
||||
operating-points-v2 = <&bus_display_opp_table>;
|
||||
interconnects = <&bus_leftbus &bus_dmc>;
|
||||
#interconnect-cells = <0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
bus_fsys: bus-fsys {
|
||||
compatible = "samsung,exynos-bus";
|
||||
clocks = <&clock CLK_ACLK133>;
|
||||
clock-names = "bus";
|
||||
operating-points-v2 = <&bus_fsys_opp_table>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
bus_peri: bus-peri {
|
||||
compatible = "samsung,exynos-bus";
|
||||
clocks = <&clock CLK_ACLK100>;
|
||||
clock-names = "bus";
|
||||
operating-points-v2 = <&bus_peri_opp_table>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
bus_mfc: bus-mfc {
|
||||
compatible = "samsung,exynos-bus";
|
||||
clocks = <&clock CLK_SCLK_MFC>;
|
||||
clock-names = "bus";
|
||||
operating-points-v2 = <&bus_leftbus_opp_table>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
bus_leftbus_opp_table: opp-table3 {
|
||||
compatible = "operating-points-v2";
|
||||
|
||||
opp-100000000 {
|
||||
opp-hz = /bits/ 64 <100000000>;
|
||||
opp-microvolt = <900000>;
|
||||
};
|
||||
opp-134000000 {
|
||||
opp-hz = /bits/ 64 <134000000>;
|
||||
opp-microvolt = <925000>;
|
||||
};
|
||||
opp-160000000 {
|
||||
opp-hz = /bits/ 64 <160000000>;
|
||||
opp-microvolt = <950000>;
|
||||
};
|
||||
opp-200000000 {
|
||||
opp-hz = /bits/ 64 <200000000>;
|
||||
opp-microvolt = <1000000>;
|
||||
opp-suspend;
|
||||
};
|
||||
};
|
||||
|
||||
bus_display_opp_table: opp-table4 {
|
||||
compatible = "operating-points-v2";
|
||||
|
||||
opp-160000000 {
|
||||
opp-hz = /bits/ 64 <160000000>;
|
||||
};
|
||||
opp-200000000 {
|
||||
opp-hz = /bits/ 64 <200000000>;
|
||||
};
|
||||
};
|
||||
|
||||
bus_fsys_opp_table: opp-table5 {
|
||||
compatible = "operating-points-v2";
|
||||
|
||||
opp-100000000 {
|
||||
opp-hz = /bits/ 64 <100000000>;
|
||||
};
|
||||
opp-134000000 {
|
||||
opp-hz = /bits/ 64 <134000000>;
|
||||
};
|
||||
};
|
||||
|
||||
bus_peri_opp_table: opp-table6 {
|
||||
compatible = "operating-points-v2";
|
||||
|
||||
opp-50000000 {
|
||||
opp-hz = /bits/ 64 <50000000>;
|
||||
};
|
||||
opp-100000000 {
|
||||
opp-hz = /bits/ 64 <100000000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
|
@ -615,7 +614,7 @@ fimc_lite_0: fimc-lite@12390000 {
|
|||
|
||||
fimc_lite_1: fimc-lite@123a0000 {
|
||||
compatible = "samsung,exynos4212-fimc-lite";
|
||||
reg = <0x123A0000 0x1000>;
|
||||
reg = <0x123a0000 0x1000>;
|
||||
interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
|
||||
power-domains = <&pd_isp>;
|
||||
clocks = <&isp_clock CLK_ISP_FIMC_LITE1>;
|
||||
|
@ -812,7 +811,7 @@ &tmu {
|
|||
compatible = "samsung,exynos4412-tmu";
|
||||
interrupt-parent = <&combiner>;
|
||||
interrupts = <2 4>;
|
||||
reg = <0x100C0000 0x100>;
|
||||
reg = <0x100c0000 0x100>;
|
||||
clocks = <&clock CLK_TMU_APBIF>;
|
||||
clock-names = "tmu_apbif";
|
||||
status = "disabled";
|
||||
|
|
|
@ -104,31 +104,31 @@ sysreg_system_controller: syscon@10050000 {
|
|||
|
||||
serial_0: serial@12c00000 {
|
||||
compatible = "samsung,exynos4210-uart";
|
||||
reg = <0x12C00000 0x100>;
|
||||
reg = <0x12c00000 0x100>;
|
||||
interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>;
|
||||
};
|
||||
|
||||
serial_1: serial@12c10000 {
|
||||
compatible = "samsung,exynos4210-uart";
|
||||
reg = <0x12C10000 0x100>;
|
||||
reg = <0x12c10000 0x100>;
|
||||
interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
|
||||
};
|
||||
|
||||
serial_2: serial@12c20000 {
|
||||
compatible = "samsung,exynos4210-uart";
|
||||
reg = <0x12C20000 0x100>;
|
||||
reg = <0x12c20000 0x100>;
|
||||
interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>;
|
||||
};
|
||||
|
||||
serial_3: serial@12c30000 {
|
||||
compatible = "samsung,exynos4210-uart";
|
||||
reg = <0x12C30000 0x100>;
|
||||
reg = <0x12c30000 0x100>;
|
||||
interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>;
|
||||
};
|
||||
|
||||
i2c_0: i2c@12c60000 {
|
||||
compatible = "samsung,s3c2440-i2c";
|
||||
reg = <0x12C60000 0x100>;
|
||||
reg = <0x12c60000 0x100>;
|
||||
interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
@ -138,7 +138,7 @@ i2c_0: i2c@12c60000 {
|
|||
|
||||
i2c_1: i2c@12c70000 {
|
||||
compatible = "samsung,s3c2440-i2c";
|
||||
reg = <0x12C70000 0x100>;
|
||||
reg = <0x12c70000 0x100>;
|
||||
interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
@ -148,7 +148,7 @@ i2c_1: i2c@12c70000 {
|
|||
|
||||
i2c_2: i2c@12c80000 {
|
||||
compatible = "samsung,s3c2440-i2c";
|
||||
reg = <0x12C80000 0x100>;
|
||||
reg = <0x12c80000 0x100>;
|
||||
interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
@ -158,7 +158,7 @@ i2c_2: i2c@12c80000 {
|
|||
|
||||
i2c_3: i2c@12c90000 {
|
||||
compatible = "samsung,s3c2440-i2c";
|
||||
reg = <0x12C90000 0x100>;
|
||||
reg = <0x12c90000 0x100>;
|
||||
interrupts = <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
@ -168,7 +168,7 @@ i2c_3: i2c@12c90000 {
|
|||
|
||||
pwm: pwm@12dd0000 {
|
||||
compatible = "samsung,exynos4210-pwm";
|
||||
reg = <0x12DD0000 0x100>;
|
||||
reg = <0x12dd0000 0x100>;
|
||||
interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>,
|
||||
|
@ -180,7 +180,7 @@ pwm: pwm@12dd0000 {
|
|||
|
||||
rtc: rtc@101e0000 {
|
||||
compatible = "samsung,s3c6410-rtc";
|
||||
reg = <0x101E0000 0x100>;
|
||||
reg = <0x101e0000 0x100>;
|
||||
interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
|
||||
status = "disabled";
|
||||
|
@ -198,7 +198,7 @@ fimd: fimd@14400000 {
|
|||
|
||||
dp: dp-controller@145b0000 {
|
||||
compatible = "samsung,exynos5-dp";
|
||||
reg = <0x145B0000 0x1000>;
|
||||
reg = <0x145b0000 0x1000>;
|
||||
interrupts = <10 3>;
|
||||
interrupt-parent = <&combiner>;
|
||||
status = "disabled";
|
||||
|
|
|
@ -73,6 +73,19 @@ key-wakeup {
|
|||
};
|
||||
};
|
||||
|
||||
/*
|
||||
* For unknown reasons HDMI-DDC does not work with Exynos I2C
|
||||
* controllers. Lets use software I2C over GPIO pins as a workaround.
|
||||
*/
|
||||
i2c_ddc: i2c-10 {
|
||||
compatible = "i2c-gpio";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&i2c2_gpio_bus>;
|
||||
sda-gpios = <&gpa0 6 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
|
||||
scl-gpios = <&gpa0 7 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
|
||||
i2c-gpio,delay-us = <2>;
|
||||
};
|
||||
|
||||
panel: panel {
|
||||
compatible = "boe,hv070wsa-100";
|
||||
power-supply = <&vcc_3v3_reg>;
|
||||
|
@ -524,8 +537,8 @@ wm1811: audio-codec@1a {
|
|||
SPKVDD1-supply = <&main_dc_reg>;
|
||||
SPKVDD2-supply = <&main_dc_reg>;
|
||||
|
||||
wlf,ldo1ena = <&gpb0 0 GPIO_ACTIVE_HIGH>;
|
||||
wlf,ldo2ena = <&gpb0 1 GPIO_ACTIVE_HIGH>;
|
||||
wlf,ldo1ena-gpios = <&gpb0 0 GPIO_ACTIVE_HIGH>;
|
||||
wlf,ldo2ena-gpios = <&gpb0 1 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
};
|
||||
|
||||
|
@ -615,24 +628,6 @@ &sata_phy_i2c {
|
|||
status = "okay";
|
||||
};
|
||||
|
||||
&soc {
|
||||
/*
|
||||
* For unknown reasons HDMI-DDC does not work with Exynos I2C
|
||||
* controllers. Lets use software I2C over GPIO pins as a workaround.
|
||||
*/
|
||||
i2c_ddc: i2c-10 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&i2c2_gpio_bus>;
|
||||
status = "okay";
|
||||
compatible = "i2c-gpio";
|
||||
sda-gpios = <&gpa0 6 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
|
||||
scl-gpios = <&gpa0 7 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
|
||||
i2c-gpio,delay-us = <2>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
};
|
||||
};
|
||||
|
||||
&usbdrd {
|
||||
vdd10-supply = <&ldo15_reg>;
|
||||
vdd33-supply = <&ldo12_reg>;
|
||||
|
|
|
@ -391,7 +391,7 @@ &spi_1 {
|
|||
flash@0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "w25x80";
|
||||
compatible = "winbond,w25x80", "jedec,spi-nor";
|
||||
reg = <0>;
|
||||
spi-max-frequency = <1000000>;
|
||||
|
||||
|
|
|
@ -27,7 +27,7 @@ cpu {
|
|||
};
|
||||
|
||||
codec {
|
||||
sound-dai = <&max98090 0>, <&hdmi>;
|
||||
sound-dai = <&max98090>, <&hdmi>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
@ -42,7 +42,7 @@ max98090: audio-codec@10 {
|
|||
pinctrl-0 = <&max98090_irq>;
|
||||
clocks = <&pmu_system_controller 0>;
|
||||
clock-names = "mclk";
|
||||
#sound-dai-cells = <1>;
|
||||
#sound-dai-cells = <0>;
|
||||
};
|
||||
};
|
||||
|
||||
|
|
Some files were not shown because too many files have changed in this diff Show more
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Reference in a new issue