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PCI: aardvark: Read all 16-bits from PCIE_MSI_PAYLOAD_REG
The PCIE_MSI_PAYLOAD_REG contains 16-bit MSI number, not only lower
8 bits. Fix reading content of this register and add a comment
describing the access to this register.
Link: https://lore.kernel.org/r/20211028185659.20329-4-kabel@kernel.org
Fixes: 8c39d71036
("PCI: aardvark: Add Aardvark PCI host controller driver")
Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Marek Behún <kabel@kernel.org>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: stable@vger.kernel.org
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parent
e4313be159
commit
95997723b6
1 changed files with 6 additions and 1 deletions
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@ -119,6 +119,7 @@
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#define PCIE_MSI_STATUS_REG (CONTROL_BASE_ADDR + 0x58)
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#define PCIE_MSI_MASK_REG (CONTROL_BASE_ADDR + 0x5C)
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#define PCIE_MSI_PAYLOAD_REG (CONTROL_BASE_ADDR + 0x9C)
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#define PCIE_MSI_DATA_MASK GENMASK(15, 0)
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/* PCIe window configuration */
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#define OB_WIN_BASE_ADDR 0x4c00
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@ -1319,8 +1320,12 @@ static void advk_pcie_handle_msi(struct advk_pcie *pcie)
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if (!(BIT(msi_idx) & msi_status))
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continue;
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/*
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* msi_idx contains bits [4:0] of the msi_data and msi_data
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* contains 16bit MSI interrupt number
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*/
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advk_writel(pcie, BIT(msi_idx), PCIE_MSI_STATUS_REG);
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msi_data = advk_readl(pcie, PCIE_MSI_PAYLOAD_REG) & 0xFF;
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msi_data = advk_readl(pcie, PCIE_MSI_PAYLOAD_REG) & PCIE_MSI_DATA_MASK;
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generic_handle_irq(msi_data);
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}
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