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iommu/arm-smmu: Add pm_runtime/sleep ops
The smmu needs to be functional only when the respective master's using it are active. The device_link feature helps to track such functional dependencies, so that the iommu gets powered when the master device enables itself using pm_runtime. So by adapting the smmu driver for runtime pm, above said dependency can be addressed. This patch adds the pm runtime/sleep callbacks to the driver and the corresponding bulk clock handling for all the clocks needed by smmu. Also, while we enable the runtime pm, add a pm sleep suspend callback that pushes devices to low power state by turning the clocks off in a system sleep. Add corresponding clock enable path in resume callback as well. Signed-off-by: Sricharan R <sricharan@codeaurora.org> Signed-off-by: Archit Taneja <architt@codeaurora.org> [Thor: Rework to get clocks from device tree] Signed-off-by: Thor Thayer <thor.thayer@linux.intel.com> [vivek: rework for clock and pm ops] Signed-off-by: Vivek Gautam <vivek.gautam@codeaurora.org> Reviewed-by: Tomasz Figa <tfiga@chromium.org> Tested-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Reviewed-by: Robin Murphy <robin.murphy@arm.com> Tested-by: Thor Thayer <thor.thayer@linux.intel.com> Signed-off-by: Will Deacon <will.deacon@arm.com>
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a868e85304
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1 changed files with 55 additions and 3 deletions
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@ -48,6 +48,7 @@
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#include <linux/of_iommu.h>
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#include <linux/pci.h>
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#include <linux/platform_device.h>
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#include <linux/pm_runtime.h>
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#include <linux/slab.h>
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#include <linux/spinlock.h>
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@ -206,6 +207,8 @@ struct arm_smmu_device {
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u32 num_global_irqs;
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u32 num_context_irqs;
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unsigned int *irqs;
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struct clk_bulk_data *clks;
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int num_clks;
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u32 cavium_id_base; /* Specific to Cavium */
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@ -1947,7 +1950,7 @@ struct arm_smmu_match_data {
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};
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#define ARM_SMMU_MATCH_DATA(name, ver, imp) \
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static struct arm_smmu_match_data name = { .version = ver, .model = imp }
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static const struct arm_smmu_match_data name = { .version = ver, .model = imp }
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ARM_SMMU_MATCH_DATA(smmu_generic_v1, ARM_SMMU_V1, GENERIC_SMMU);
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ARM_SMMU_MATCH_DATA(smmu_generic_v2, ARM_SMMU_V2, GENERIC_SMMU);
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@ -2150,6 +2153,17 @@ static int arm_smmu_device_probe(struct platform_device *pdev)
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smmu->irqs[i] = irq;
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}
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err = devm_clk_bulk_get_all(dev, &smmu->clks);
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if (err < 0) {
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dev_err(dev, "failed to get clocks %d\n", err);
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return err;
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}
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smmu->num_clks = err;
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err = clk_bulk_prepare_enable(smmu->num_clks, smmu->clks);
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if (err)
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return err;
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err = arm_smmu_device_cfg_probe(smmu);
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if (err)
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return err;
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@ -2236,6 +2250,9 @@ static int arm_smmu_device_remove(struct platform_device *pdev)
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/* Turn the thing off */
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writel(sCR0_CLIENTPD, ARM_SMMU_GR0_NS(smmu) + ARM_SMMU_GR0_sCR0);
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clk_bulk_disable_unprepare(smmu->num_clks, smmu->clks);
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return 0;
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}
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@ -2244,15 +2261,50 @@ static void arm_smmu_device_shutdown(struct platform_device *pdev)
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arm_smmu_device_remove(pdev);
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}
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static int __maybe_unused arm_smmu_pm_resume(struct device *dev)
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static int __maybe_unused arm_smmu_runtime_resume(struct device *dev)
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{
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struct arm_smmu_device *smmu = dev_get_drvdata(dev);
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int ret;
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ret = clk_bulk_enable(smmu->num_clks, smmu->clks);
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if (ret)
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return ret;
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arm_smmu_device_reset(smmu);
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return 0;
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}
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static SIMPLE_DEV_PM_OPS(arm_smmu_pm_ops, NULL, arm_smmu_pm_resume);
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static int __maybe_unused arm_smmu_runtime_suspend(struct device *dev)
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{
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struct arm_smmu_device *smmu = dev_get_drvdata(dev);
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clk_bulk_disable(smmu->num_clks, smmu->clks);
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return 0;
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}
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static int __maybe_unused arm_smmu_pm_resume(struct device *dev)
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{
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if (pm_runtime_suspended(dev))
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return 0;
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return arm_smmu_runtime_resume(dev);
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}
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static int __maybe_unused arm_smmu_pm_suspend(struct device *dev)
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{
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if (pm_runtime_suspended(dev))
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return 0;
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return arm_smmu_runtime_suspend(dev);
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}
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static const struct dev_pm_ops arm_smmu_pm_ops = {
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SET_SYSTEM_SLEEP_PM_OPS(arm_smmu_pm_suspend, arm_smmu_pm_resume)
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SET_RUNTIME_PM_OPS(arm_smmu_runtime_suspend,
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arm_smmu_runtime_resume, NULL)
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};
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static struct platform_driver arm_smmu_driver = {
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.driver = {
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