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drm/amdgpu: Set/clear CPU_ACCESS flag on page fault and move to VRAM
When a BO is moved to VRAM, clear AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED. This allows it to potentially later move to invisible VRAM if the CPU does not access it again. Setting the CPU_ACCESS flag in amdgpu_bo_fault_reserve_notify() also means that we can remove the loop to restrict lpfn to the end of visible VRAM, because amdgpu_ttm_placement_init() will do it for us. v3 [Michel Dänzer] * Use AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED instead of a new flag (Christian König) * Clear flag in amdgpu_bo_move instead of amdgpu_move_ram_vram (Christian) * Explicitly mention amdgpu_bo_fault_reserve_notify in amdgpu_bo_move * Also clear flag in amdgpu_bo_create_restricted Suggested-by: Michel Dänzer <michel.daenzer@amd.com> Signed-off-by: John Brooks <john@fastquake.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Michel Dänzer <michel.daenzer@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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parent
00f06b246a
commit
96cf8271df
2 changed files with 19 additions and 10 deletions
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@ -432,6 +432,10 @@ int amdgpu_bo_create_restricted(struct amdgpu_device *adev,
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trace_amdgpu_bo_create(bo);
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/* Treat CPU_ACCESS_REQUIRED only as a hint if given by UMD */
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if (type == ttm_bo_type_device)
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bo->flags &= ~AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED;
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return 0;
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fail_unreserve:
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@ -945,13 +949,17 @@ int amdgpu_bo_fault_reserve_notify(struct ttm_buffer_object *bo)
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{
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struct amdgpu_device *adev = amdgpu_ttm_adev(bo->bdev);
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struct amdgpu_bo *abo;
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unsigned long offset, size, lpfn;
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int i, r;
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unsigned long offset, size;
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int r;
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if (!amdgpu_ttm_bo_is_amdgpu_bo(bo))
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return 0;
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abo = container_of(bo, struct amdgpu_bo, tbo);
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/* Remember that this BO was accessed by the CPU */
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abo->flags |= AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED;
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if (bo->mem.mem_type != TTM_PL_VRAM)
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return 0;
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@ -967,14 +975,6 @@ int amdgpu_bo_fault_reserve_notify(struct ttm_buffer_object *bo)
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/* hurrah the memory is not visible ! */
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atomic64_inc(&adev->num_vram_cpu_page_faults);
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amdgpu_ttm_placement_from_domain(abo, AMDGPU_GEM_DOMAIN_VRAM);
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lpfn = adev->mc.visible_vram_size >> PAGE_SHIFT;
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for (i = 0; i < abo->placement.num_placement; i++) {
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/* Force into visible VRAM */
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if ((abo->placements[i].flags & TTM_PL_FLAG_VRAM) &&
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(!abo->placements[i].lpfn ||
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abo->placements[i].lpfn > lpfn))
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abo->placements[i].lpfn = lpfn;
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}
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r = ttm_bo_validate(bo, &abo->placement, false, false);
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if (unlikely(r == -ENOMEM)) {
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amdgpu_ttm_placement_from_domain(abo, AMDGPU_GEM_DOMAIN_GTT);
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@ -499,6 +499,15 @@ static int amdgpu_bo_move(struct ttm_buffer_object *bo,
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}
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}
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if (bo->type == ttm_bo_type_device &&
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new_mem->mem_type == TTM_PL_VRAM &&
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old_mem->mem_type != TTM_PL_VRAM) {
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/* amdgpu_bo_fault_reserve_notify will re-set this if the CPU
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* accesses the BO after it's moved.
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*/
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abo->flags &= ~AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED;
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}
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/* update statistics */
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atomic64_add((u64)bo->num_pages << PAGE_SHIFT, &adev->num_bytes_moved);
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return 0;
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