Revert "Staging: sm750fb: Fix C99 Comments"

This reverts commit 6ad6b5ed3e.

It added a file that should not be in the kernel source tree.

Cc: Amitoj Kaur Chawla <amitoj1606@gmail.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
Greg Kroah-Hartman 2015-04-04 12:00:25 +02:00
parent c4151700bb
commit 97498bb576
2 changed files with 8 additions and 2 deletions

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@ -17,7 +17,7 @@ logical_chip_type_t getChipType(void)
char physicalRev;
logical_chip_type_t chip;
physicalID = devId750; /* either 0x718 or 0x750 */
physicalID = devId750;//either 0x718 or 0x750
physicalRev = revId750;
if (physicalID == 0x718)
@ -257,7 +257,7 @@ int ddk750_initHw(initchip_param_t *pInitParam)
unsigned int ulReg;
#if 0
/* move the code to map regiter function. */
//move the code to map regiter function.
if (getChipType() == SM718) {
/* turn on big endian bit*/
ulReg = PEEK32(0x74);
@ -488,6 +488,7 @@ unsigned int calcPllValue(unsigned int request_orig, pll_value_t *pll)
}
}
//printk("Finally: pll->n[%lu],m[%lu],od[%lu],pod[%lu]\n",pll->N,pll->M,pll->OD,pll->POD);
return ret;
}
@ -579,9 +580,14 @@ pll_value_t *pPLL /* Structure to hold the value to be set in PLL */
}
/* Restore input frequency from Khz to hz unit */
// pPLL->inputFreq *= 1000;
ulRequestClk *= 1000;
pPLL->inputFreq = DEFAULT_INPUT_CLOCK; /* Default reference clock */
/* Output debug information */
//DDKDEBUGPRINT((DISPLAY_LEVEL, "calcPllValue: Requested Frequency = %d\n", ulRequestClk));
//DDKDEBUGPRINT((DISPLAY_LEVEL, "calcPllValue: Input CLK = %dHz, M=%d, N=%d, OD=%d, POD=%d\n", pPLL->inputFreq, pPLL->M, pPLL->N, pPLL->OD, pPLL->POD));
/* Return actual frequency that the PLL can set */
ret = calcPLL(pPLL);
return ret;

0
ret.ou
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