Merge branch 'libcxgb'

Varun Prakash says:

====================
common library for Chelsio drivers.

 This patch series adds common library module(libcxgb.ko)
 for Chelsio drivers to remove duplicate code.

 This series moves common iSCSI DDP Page Pod manager
 code from cxgb4.ko to libcxgb.ko, earlier this code
 was used by only cxgbit.ko now it is used by
 three Chelsio iSCSI drivers cxgb3i, cxgb4i, cxgbit.

 In future this module will have common connection
 management and hardware specific code that can
 be shared by multiple Chelsio drivers(cxgb4,
 csiostor, iw_cxgb4, cxgb4i, cxgbit).

 Please review.

 Thanks

-v3
- removed unused module init and exit functions.

-v2
- updated CONFIG_CHELSIO_LIB to an invisible option
- changed libcxgb.ko module license from GPL to Dual BSD/GPL
====================

Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
David S. Miller 2016-07-25 10:31:09 -07:00
commit 974b996345
19 changed files with 574 additions and 900 deletions

View File

@ -96,17 +96,6 @@ config CHELSIO_T4_DCB
If unsure, say N.
config CHELSIO_T4_UWIRE
bool "Unified Wire Support for Chelsio T5 cards"
default n
depends on CHELSIO_T4
---help---
Enable unified-wire offload features.
Say Y here if you want to enable unified-wire over Ethernet
in the driver.
If unsure, say N.
config CHELSIO_T4_FCOE
bool "Fibre Channel over Ethernet (FCoE) Support for Chelsio T5 cards"
default n
@ -137,4 +126,9 @@ config CHELSIO_T4VF
To compile this driver as a module choose M here; the module
will be called cxgb4vf.
config CHELSIO_LIB
tristate
---help---
Common library for Chelsio drivers.
endif # NET_VENDOR_CHELSIO

View File

@ -6,3 +6,4 @@ obj-$(CONFIG_CHELSIO_T1) += cxgb/
obj-$(CONFIG_CHELSIO_T3) += cxgb3/
obj-$(CONFIG_CHELSIO_T4) += cxgb4/
obj-$(CONFIG_CHELSIO_T4VF) += cxgb4vf/
obj-$(CONFIG_CHELSIO_LIB) += libcxgb/

View File

@ -7,5 +7,4 @@ obj-$(CONFIG_CHELSIO_T4) += cxgb4.o
cxgb4-objs := cxgb4_main.o l2t.o t4_hw.o sge.o clip_tbl.o cxgb4_ethtool.o
cxgb4-$(CONFIG_CHELSIO_T4_DCB) += cxgb4_dcb.o
cxgb4-$(CONFIG_CHELSIO_T4_FCOE) += cxgb4_fcoe.o
cxgb4-$(CONFIG_CHELSIO_T4_UWIRE) += cxgb4_ppm.o
cxgb4-$(CONFIG_DEBUG_FS) += cxgb4_debugfs.o

View File

@ -0,0 +1,3 @@
obj-$(CONFIG_CHELSIO_LIB) += libcxgb.o
libcxgb-y := libcxgb_ppm.o

View File

@ -1,15 +1,43 @@
/*
* cxgb4_ppm.c: Chelsio common library for T4/T5 iSCSI PagePod Manager
* libcxgb_ppm.c: Chelsio common library for T3/T4/T5 iSCSI PagePod Manager
*
* Copyright (c) 2016 Chelsio Communications, Inc. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
* This software is available to you under a choice of one of two
* licenses. You may choose to be licensed under the terms of the GNU
* General Public License (GPL) Version 2, available from the file
* COPYING in the main directory of this source tree, or the
* OpenIB.org BSD license below:
*
* Redistribution and use in source and binary forms, with or
* without modification, are permitted provided that the following
* conditions are met:
*
* - Redistributions of source code must retain the above
* copyright notice, this list of conditions and the following
* disclaimer.
*
* - Redistributions in binary form must reproduce the above
* copyright notice, this list of conditions and the following
* disclaimer in the documentation and/or other materials
* provided with the distribution.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
* SOFTWARE.
*
* Written by: Karen Xie (kxie@chelsio.com)
*/
#define DRV_NAME "libcxgb"
#define DRV_VERSION "1.0.0-ko"
#define pr_fmt(fmt) DRV_NAME ": " fmt
#include <linux/kernel.h>
#include <linux/version.h>
#include <linux/module.h>
@ -22,7 +50,7 @@
#include <linux/pci.h>
#include <linux/scatterlist.h>
#include "cxgb4_ppm.h"
#include "libcxgb_ppm.h"
/* Direct Data Placement -
* Directly place the iSCSI Data-In or Data-Out PDU's payload into
@ -309,6 +337,7 @@ int cxgbi_ppm_release(struct cxgbi_ppm *ppm)
}
return 1;
}
EXPORT_SYMBOL(cxgbi_ppm_release);
static struct cxgbi_ppm_pool *ppm_alloc_cpu_pool(unsigned int *total,
unsigned int *pcpu_ppmax)
@ -462,3 +491,9 @@ unsigned int cxgbi_tagmask_set(unsigned int ppmax)
return 1 << (bits + PPOD_IDX_SHIFT);
}
EXPORT_SYMBOL(cxgbi_tagmask_set);
MODULE_AUTHOR("Chelsio Communications");
MODULE_DESCRIPTION("Chelsio common library");
MODULE_VERSION(DRV_VERSION);
MODULE_LICENSE("Dual BSD/GPL");

View File

@ -1,17 +1,41 @@
/*
* cxgb4_ppm.h: Chelsio common library for T4/T5 iSCSI ddp operation
* libcxgb_ppm.h: Chelsio common library for T3/T4/T5 iSCSI ddp operation
*
* Copyright (c) 2016 Chelsio Communications, Inc. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
* This software is available to you under a choice of one of two
* licenses. You may choose to be licensed under the terms of the GNU
* General Public License (GPL) Version 2, available from the file
* COPYING in the main directory of this source tree, or the
* OpenIB.org BSD license below:
*
* Redistribution and use in source and binary forms, with or
* without modification, are permitted provided that the following
* conditions are met:
*
* - Redistributions of source code must retain the above
* copyright notice, this list of conditions and the following
* disclaimer.
*
* - Redistributions in binary form must reproduce the above
* copyright notice, this list of conditions and the following
* disclaimer in the documentation and/or other materials
* provided with the distribution.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
* SOFTWARE.
*
* Written by: Karen Xie (kxie@chelsio.com)
*/
#ifndef __CXGB4PPM_H__
#define __CXGB4PPM_H__
#ifndef __LIBCXGB_PPM_H__
#define __LIBCXGB_PPM_H__
#include <linux/kernel.h>
#include <linux/errno.h>
@ -307,4 +331,4 @@ int cxgbi_ppm_release(struct cxgbi_ppm *ppm);
void cxgbi_tagmask_check(unsigned int tagmask, struct cxgbi_tag_format *);
unsigned int cxgbi_tagmask_set(unsigned int ppmax);
#endif /*__CXGB4PPM_H__*/
#endif /*__LIBCXGB_PPM_H__*/

View File

@ -1,2 +1,4 @@
ccflags-y += -Idrivers/net/ethernet/chelsio/libcxgb
obj-$(CONFIG_SCSI_CXGB3_ISCSI) += libcxgbi.o cxgb3i/
obj-$(CONFIG_SCSI_CXGB4_ISCSI) += libcxgbi.o cxgb4i/

View File

@ -1,3 +1,4 @@
ccflags-y += -I$(srctree)/drivers/net/ethernet/chelsio/cxgb3
ccflags-y += -I$(srctree)/drivers/net/ethernet/chelsio/libcxgb
obj-$(CONFIG_SCSI_CXGB3_ISCSI) += cxgb3i.o

View File

@ -5,6 +5,7 @@ config SCSI_CXGB3_ISCSI
select ETHERNET
select NET_VENDOR_CHELSIO
select CHELSIO_T3
select CHELSIO_LIB
select SCSI_ISCSI_ATTRS
---help---
This driver supports iSCSI offload for the Chelsio T3 devices.

View File

@ -1028,7 +1028,7 @@ cxgb3_cpl_handler_func cxgb3i_cpl_handlers[NUM_CPL_CMDS] = {
* cxgb3i_ofld_init - allocate and initialize resources for each adapter found
* @cdev: cxgbi adapter
*/
int cxgb3i_ofld_init(struct cxgbi_device *cdev)
static int cxgb3i_ofld_init(struct cxgbi_device *cdev)
{
struct t3cdev *t3dev = (struct t3cdev *)cdev->lldev;
struct adap_ports port;
@ -1076,64 +1076,69 @@ static inline void ulp_mem_io_set_hdr(struct sk_buff *skb, unsigned int addr)
req->wr.wr_hi = htonl(V_WR_OP(FW_WROPCODE_BYPASS));
req->cmd_lock_addr = htonl(V_ULP_MEMIO_ADDR(addr >> 5) |
V_ULPTX_CMD(ULP_MEM_WRITE));
req->len = htonl(V_ULP_MEMIO_DATA_LEN(PPOD_SIZE >> 5) |
V_ULPTX_NFLITS((PPOD_SIZE >> 3) + 1));
req->len = htonl(V_ULP_MEMIO_DATA_LEN(IPPOD_SIZE >> 5) |
V_ULPTX_NFLITS((IPPOD_SIZE >> 3) + 1));
}
static int ddp_set_map(struct cxgbi_sock *csk, struct cxgbi_pagepod_hdr *hdr,
unsigned int idx, unsigned int npods,
struct cxgbi_gather_list *gl)
static struct cxgbi_ppm *cdev2ppm(struct cxgbi_device *cdev)
{
struct cxgbi_device *cdev = csk->cdev;
struct cxgbi_ddp_info *ddp = cdev->ddp;
unsigned int pm_addr = (idx << PPOD_SIZE_SHIFT) + ddp->llimit;
return ((struct t3cdev *)cdev->lldev)->ulp_iscsi;
}
static int ddp_set_map(struct cxgbi_ppm *ppm, struct cxgbi_sock *csk,
struct cxgbi_task_tag_info *ttinfo)
{
unsigned int idx = ttinfo->idx;
unsigned int npods = ttinfo->npods;
struct scatterlist *sg = ttinfo->sgl;
struct cxgbi_pagepod *ppod;
struct ulp_mem_io *req;
unsigned int sg_off;
unsigned int pm_addr = (idx << PPOD_SIZE_SHIFT) + ppm->llimit;
int i;
log_debug(1 << CXGBI_DBG_DDP,
"csk 0x%p, idx %u, npods %u, gl 0x%p.\n",
csk, idx, npods, gl);
for (i = 0; i < npods; i++, idx++, pm_addr += PPOD_SIZE) {
for (i = 0; i < npods; i++, idx++, pm_addr += IPPOD_SIZE) {
struct sk_buff *skb = alloc_wr(sizeof(struct ulp_mem_io) +
PPOD_SIZE, 0, GFP_ATOMIC);
IPPOD_SIZE, 0, GFP_ATOMIC);
if (!skb)
return -ENOMEM;
ulp_mem_io_set_hdr(skb, pm_addr);
cxgbi_ddp_ppod_set((struct cxgbi_pagepod *)(skb->head +
sizeof(struct ulp_mem_io)),
hdr, gl, i * PPOD_PAGES_MAX);
req = (struct ulp_mem_io *)skb->head;
ppod = (struct cxgbi_pagepod *)(req + 1);
sg_off = i * PPOD_PAGES_MAX;
cxgbi_ddp_set_one_ppod(ppod, ttinfo, &sg,
&sg_off);
skb->priority = CPL_PRIORITY_CONTROL;
cxgb3_ofld_send(cdev->lldev, skb);
cxgb3_ofld_send(ppm->lldev, skb);
}
return 0;
}
static void ddp_clear_map(struct cxgbi_hba *chba, unsigned int tag,
unsigned int idx, unsigned int npods)
static void ddp_clear_map(struct cxgbi_device *cdev, struct cxgbi_ppm *ppm,
struct cxgbi_task_tag_info *ttinfo)
{
struct cxgbi_device *cdev = chba->cdev;
struct cxgbi_ddp_info *ddp = cdev->ddp;
unsigned int pm_addr = (idx << PPOD_SIZE_SHIFT) + ddp->llimit;
unsigned int idx = ttinfo->idx;
unsigned int pm_addr = (idx << PPOD_SIZE_SHIFT) + ppm->llimit;
unsigned int npods = ttinfo->npods;
int i;
log_debug(1 << CXGBI_DBG_DDP,
"cdev 0x%p, idx %u, npods %u, tag 0x%x.\n",
cdev, idx, npods, tag);
"cdev 0x%p, clear idx %u, npods %u.\n",
cdev, idx, npods);
for (i = 0; i < npods; i++, idx++, pm_addr += PPOD_SIZE) {
for (i = 0; i < npods; i++, idx++, pm_addr += IPPOD_SIZE) {
struct sk_buff *skb = alloc_wr(sizeof(struct ulp_mem_io) +
PPOD_SIZE, 0, GFP_ATOMIC);
IPPOD_SIZE, 0, GFP_ATOMIC);
if (!skb) {
pr_err("tag 0x%x, 0x%x, %d/%u, skb OOM.\n",
tag, idx, i, npods);
pr_err("cdev 0x%p, clear ddp, %u,%d/%u, skb OOM.\n",
cdev, idx, i, npods);
continue;
}
ulp_mem_io_set_hdr(skb, pm_addr);
skb->priority = CPL_PRIORITY_CONTROL;
cxgb3_ofld_send(cdev->lldev, skb);
cxgb3_ofld_send(ppm->lldev, skb);
}
}
@ -1203,82 +1208,68 @@ static int ddp_setup_conn_digest(struct cxgbi_sock *csk, unsigned int tid,
}
/**
* t3_ddp_cleanup - release the cxgb3 adapter's ddp resource
* @cdev: cxgb3i adapter
* release all the resource held by the ddp pagepod manager for a given
* adapter if needed
*/
static void t3_ddp_cleanup(struct cxgbi_device *cdev)
{
struct t3cdev *tdev = (struct t3cdev *)cdev->lldev;
if (cxgbi_ddp_cleanup(cdev)) {
pr_info("t3dev 0x%p, ulp_iscsi no more user.\n", tdev);
tdev->ulp_iscsi = NULL;
}
}
/**
* ddp_init - initialize the cxgb3 adapter's ddp resource
* cxgb3i_ddp_init - initialize the cxgb3 adapter's ddp resource
* @cdev: cxgb3i adapter
* initialize the ddp pagepod manager for a given adapter
*/
static int cxgb3i_ddp_init(struct cxgbi_device *cdev)
{
struct t3cdev *tdev = (struct t3cdev *)cdev->lldev;
struct cxgbi_ddp_info *ddp = tdev->ulp_iscsi;
struct net_device *ndev = cdev->ports[0];
struct cxgbi_tag_format tformat;
unsigned int ppmax, tagmask = 0;
struct ulp_iscsi_info uinfo;
unsigned int pgsz_factor[4];
int i, err;
if (ddp) {
kref_get(&ddp->refcnt);
pr_warn("t3dev 0x%p, ddp 0x%p already set up.\n",
tdev, tdev->ulp_iscsi);
cdev->ddp = ddp;
return -EALREADY;
}
err = tdev->ctl(tdev, ULP_ISCSI_GET_PARAMS, &uinfo);
if (err < 0) {
pr_err("%s, failed to get iscsi param err=%d.\n",
tdev->name, err);
pr_err("%s, failed to get iscsi param %d.\n",
ndev->name, err);
return err;
}
if (uinfo.llimit >= uinfo.ulimit) {
pr_warn("T3 %s, iscsi NOT enabled %u ~ %u!\n",
ndev->name, uinfo.llimit, uinfo.ulimit);
return -EACCES;
}
err = cxgbi_ddp_init(cdev, uinfo.llimit, uinfo.ulimit,
uinfo.max_txsz, uinfo.max_rxsz);
if (err < 0)
return err;
ppmax = (uinfo.ulimit - uinfo.llimit + 1) >> PPOD_SIZE_SHIFT;
tagmask = cxgbi_tagmask_set(ppmax);
ddp = cdev->ddp;
pr_info("T3 %s: 0x%x~0x%x, 0x%x, tagmask 0x%x -> 0x%x.\n",
ndev->name, uinfo.llimit, uinfo.ulimit, ppmax, uinfo.tagmask,
tagmask);
uinfo.tagmask = ddp->idx_mask << PPOD_IDX_SHIFT;
cxgbi_ddp_page_size_factor(pgsz_factor);
memset(&tformat, 0, sizeof(struct cxgbi_tag_format));
for (i = 0; i < 4; i++)
uinfo.pgsz_factor[i] = pgsz_factor[i];
uinfo.ulimit = uinfo.llimit + (ddp->nppods << PPOD_SIZE_SHIFT);
tformat.pgsz_order[i] = uinfo.pgsz_factor[i];
cxgbi_tagmask_check(tagmask, &tformat);
err = tdev->ctl(tdev, ULP_ISCSI_SET_PARAMS, &uinfo);
if (err < 0) {
pr_warn("%s unable to set iscsi param err=%d, ddp disabled.\n",
tdev->name, err);
cxgbi_ddp_cleanup(cdev);
return err;
cxgbi_ddp_ppm_setup(&tdev->ulp_iscsi, cdev, &tformat, ppmax,
uinfo.llimit, uinfo.llimit, 0);
if (!(cdev->flags & CXGBI_FLAG_DDP_OFF)) {
uinfo.tagmask = tagmask;
uinfo.ulimit = uinfo.llimit + (ppmax << PPOD_SIZE_SHIFT);
err = tdev->ctl(tdev, ULP_ISCSI_SET_PARAMS, &uinfo);
if (err < 0) {
pr_err("T3 %s fail to set iscsi param %d.\n",
ndev->name, err);
cdev->flags |= CXGBI_FLAG_DDP_OFF;
}
err = 0;
}
tdev->ulp_iscsi = ddp;
cdev->csk_ddp_setup_digest = ddp_setup_conn_digest;
cdev->csk_ddp_setup_pgidx = ddp_setup_conn_pgidx;
cdev->csk_ddp_set = ddp_set_map;
cdev->csk_ddp_clear = ddp_clear_map;
cdev->csk_ddp_set_map = ddp_set_map;
cdev->csk_ddp_clear_map = ddp_clear_map;
cdev->cdev2ppm = cdev2ppm;
cdev->tx_max_size = min_t(unsigned int, ULP2_MAX_PDU_PAYLOAD,
uinfo.max_txsz - ISCSI_PDU_NONPAYLOAD_LEN);
cdev->rx_max_size = min_t(unsigned int, ULP2_MAX_PDU_PAYLOAD,
uinfo.max_rxsz - ISCSI_PDU_NONPAYLOAD_LEN);
pr_info("tdev 0x%p, nppods %u, bits %u, mask 0x%x,0x%x pkt %u/%u, "
"%u/%u.\n",
tdev, ddp->nppods, ddp->idx_bits, ddp->idx_mask,
ddp->rsvd_tag_mask, ddp->max_txsz, uinfo.max_txsz,
ddp->max_rxsz, uinfo.max_rxsz);
return 0;
}
@ -1325,7 +1316,6 @@ static void cxgb3i_dev_open(struct t3cdev *t3dev)
cdev->rx_credit_thres = cxgb3i_rx_credit_thres;
cdev->skb_tx_rsvd = CXGB3I_TX_HEADER_LEN;
cdev->skb_rx_extra = sizeof(struct cpl_iscsi_hdr_norss);
cdev->dev_ddp_cleanup = t3_ddp_cleanup;
cdev->itp = &cxgb3i_iscsi_transport;
err = cxgb3i_ddp_init(cdev);

View File

@ -1,3 +1,4 @@
ccflags-y += -I$(srctree)/drivers/net/ethernet/chelsio/cxgb4
ccflags-y += -I$(srctree)/drivers/net/ethernet/chelsio/libcxgb
obj-$(CONFIG_SCSI_CXGB4_ISCSI) += cxgb4i.o

View File

@ -5,6 +5,7 @@ config SCSI_CXGB4_ISCSI
select ETHERNET
select NET_VENDOR_CHELSIO
select CHELSIO_T4
select CHELSIO_LIB
select SCSI_ISCSI_ATTRS
---help---
This driver supports iSCSI offload for the Chelsio T4 devices.

View File

@ -1503,7 +1503,7 @@ rel_resource_without_clip:
return -EINVAL;
}
cxgb4i_cplhandler_func cxgb4i_cplhandlers[NUM_CPL_CMDS] = {
static cxgb4i_cplhandler_func cxgb4i_cplhandlers[NUM_CPL_CMDS] = {
[CPL_ACT_ESTABLISH] = do_act_establish,
[CPL_ACT_OPEN_RPL] = do_act_open_rpl,
[CPL_PEER_CLOSE] = do_peer_close,
@ -1519,7 +1519,7 @@ cxgb4i_cplhandler_func cxgb4i_cplhandlers[NUM_CPL_CMDS] = {
[CPL_RX_DATA] = do_rx_data,
};
int cxgb4i_ofld_init(struct cxgbi_device *cdev)
static int cxgb4i_ofld_init(struct cxgbi_device *cdev)
{
int rc;
@ -1543,24 +1543,22 @@ int cxgb4i_ofld_init(struct cxgbi_device *cdev)
return 0;
}
/*
* functions to program the pagepod in h/w
*/
#define ULPMEM_IDATA_MAX_NPPODS 4 /* 256/PPOD_SIZE */
static inline void ulp_mem_io_set_hdr(struct cxgb4_lld_info *lldi,
struct ulp_mem_io *req,
unsigned int wr_len, unsigned int dlen,
unsigned int pm_addr)
static inline void
ulp_mem_io_set_hdr(struct cxgbi_device *cdev,
struct ulp_mem_io *req,
unsigned int wr_len, unsigned int dlen,
unsigned int pm_addr,
int tid)
{
struct cxgb4_lld_info *lldi = cxgbi_cdev_priv(cdev);
struct ulptx_idata *idata = (struct ulptx_idata *)(req + 1);
INIT_ULPTX_WR(req, wr_len, 0, 0);
if (is_t4(lldi->adapter_type))
req->cmd = htonl(ULPTX_CMD_V(ULP_TX_MEM_WRITE) |
(ULP_MEMIO_ORDER_F));
else
req->cmd = htonl(ULPTX_CMD_V(ULP_TX_MEM_WRITE) |
(T5_ULP_MEMIO_IMM_F));
INIT_ULPTX_WR(req, wr_len, 0, tid);
req->wr.wr_hi = htonl(FW_WR_OP_V(FW_ULPTX_WR) |
FW_WR_ATOMIC_V(0));
req->cmd = htonl(ULPTX_CMD_V(ULP_TX_MEM_WRITE) |
ULP_MEMIO_ORDER_V(is_t4(lldi->adapter_type)) |
T5_ULP_MEMIO_IMM_V(!is_t4(lldi->adapter_type)));
req->dlen = htonl(ULP_MEMIO_DATA_LEN_V(dlen >> 5));
req->lock_addr = htonl(ULP_MEMIO_ADDR_V(pm_addr >> 5));
req->len16 = htonl(DIV_ROUND_UP(wr_len - sizeof(req->wr), 16));
@ -1569,84 +1567,91 @@ static inline void ulp_mem_io_set_hdr(struct cxgb4_lld_info *lldi,
idata->len = htonl(dlen);
}
static int ddp_ppod_write_idata(struct cxgbi_device *cdev, unsigned int port_id,
struct cxgbi_pagepod_hdr *hdr, unsigned int idx,
unsigned int npods,
struct cxgbi_gather_list *gl,
unsigned int gl_pidx)
static struct sk_buff *
ddp_ppod_init_idata(struct cxgbi_device *cdev,
struct cxgbi_ppm *ppm,
unsigned int idx, unsigned int npods,
unsigned int tid)
{
struct cxgbi_ddp_info *ddp = cdev->ddp;
struct cxgb4_lld_info *lldi = cxgbi_cdev_priv(cdev);
struct sk_buff *skb;
unsigned int pm_addr = (idx << PPOD_SIZE_SHIFT) + ppm->llimit;
unsigned int dlen = npods << PPOD_SIZE_SHIFT;
unsigned int wr_len = roundup(sizeof(struct ulp_mem_io) +
sizeof(struct ulptx_idata) + dlen, 16);
struct sk_buff *skb = alloc_wr(wr_len, 0, GFP_ATOMIC);
if (!skb) {
pr_err("%s: %s idx %u, npods %u, OOM.\n",
__func__, ppm->ndev->name, idx, npods);
return NULL;
}
ulp_mem_io_set_hdr(cdev, (struct ulp_mem_io *)skb->head, wr_len, dlen,
pm_addr, tid);
return skb;
}
static int ddp_ppod_write_idata(struct cxgbi_ppm *ppm, struct cxgbi_sock *csk,
struct cxgbi_task_tag_info *ttinfo,
unsigned int idx, unsigned int npods,
struct scatterlist **sg_pp,
unsigned int *sg_off)
{
struct cxgbi_device *cdev = csk->cdev;
struct sk_buff *skb = ddp_ppod_init_idata(cdev, ppm, idx, npods,
csk->tid);
struct ulp_mem_io *req;
struct ulptx_idata *idata;
struct cxgbi_pagepod *ppod;
unsigned int pm_addr = idx * PPOD_SIZE + ddp->llimit;
unsigned int dlen = PPOD_SIZE * npods;
unsigned int wr_len = roundup(sizeof(struct ulp_mem_io) +
sizeof(struct ulptx_idata) + dlen, 16);
unsigned int i;
int i;
skb = alloc_wr(wr_len, 0, GFP_ATOMIC);
if (!skb) {
pr_err("cdev 0x%p, idx %u, npods %u, OOM.\n",
cdev, idx, npods);
if (!skb)
return -ENOMEM;
}
req = (struct ulp_mem_io *)skb->head;
set_wr_txq(skb, CPL_PRIORITY_CONTROL, 0);
ulp_mem_io_set_hdr(lldi, req, wr_len, dlen, pm_addr);
req = (struct ulp_mem_io *)skb->head;
idata = (struct ulptx_idata *)(req + 1);
ppod = (struct cxgbi_pagepod *)(idata + 1);
for (i = 0; i < npods; i++, ppod++, gl_pidx += PPOD_PAGES_MAX) {
if (!hdr && !gl)
cxgbi_ddp_ppod_clear(ppod);
else
cxgbi_ddp_ppod_set(ppod, hdr, gl, gl_pidx);
}
for (i = 0; i < npods; i++, ppod++)
cxgbi_ddp_set_one_ppod(ppod, ttinfo, sg_pp, sg_off);
cxgbi_skcb_set_flag(skb, SKCBF_TX_MEM_WRITE);
cxgbi_skcb_set_flag(skb, SKCBF_TX_FLAG_COMPL);
set_wr_txq(skb, CPL_PRIORITY_DATA, csk->port_id);
spin_lock_bh(&csk->lock);
cxgbi_sock_skb_entail(csk, skb);
spin_unlock_bh(&csk->lock);
cxgb4_ofld_send(cdev->ports[port_id], skb);
return 0;
}
static int ddp_set_map(struct cxgbi_sock *csk, struct cxgbi_pagepod_hdr *hdr,
unsigned int idx, unsigned int npods,
struct cxgbi_gather_list *gl)
static int ddp_set_map(struct cxgbi_ppm *ppm, struct cxgbi_sock *csk,
struct cxgbi_task_tag_info *ttinfo)
{
unsigned int pidx = ttinfo->idx;
unsigned int npods = ttinfo->npods;
unsigned int i, cnt;
int err = 0;
struct scatterlist *sg = ttinfo->sgl;
unsigned int offset = 0;
for (i = 0; i < npods; i += cnt, idx += cnt) {
ttinfo->cid = csk->port_id;
for (i = 0; i < npods; i += cnt, pidx += cnt) {
cnt = npods - i;
if (cnt > ULPMEM_IDATA_MAX_NPPODS)
cnt = ULPMEM_IDATA_MAX_NPPODS;
err = ddp_ppod_write_idata(csk->cdev, csk->port_id, hdr,
idx, cnt, gl, 4 * i);
err = ddp_ppod_write_idata(ppm, csk, ttinfo, pidx, cnt,
&sg, &offset);
if (err < 0)
break;
}
return err;
}
static void ddp_clear_map(struct cxgbi_hba *chba, unsigned int tag,
unsigned int idx, unsigned int npods)
{
unsigned int i, cnt;
int err;
for (i = 0; i < npods; i += cnt, idx += cnt) {
cnt = npods - i;
if (cnt > ULPMEM_IDATA_MAX_NPPODS)
cnt = ULPMEM_IDATA_MAX_NPPODS;
err = ddp_ppod_write_idata(chba->cdev, chba->port_id, NULL,
idx, cnt, NULL, 0);
if (err < 0)
break;
}
}
static int ddp_setup_conn_pgidx(struct cxgbi_sock *csk, unsigned int tid,
int pg_idx, bool reply)
{
@ -1710,48 +1715,46 @@ static int ddp_setup_conn_digest(struct cxgbi_sock *csk, unsigned int tid,
return 0;
}
static struct cxgbi_ppm *cdev2ppm(struct cxgbi_device *cdev)
{
return (struct cxgbi_ppm *)(*((struct cxgb4_lld_info *)
(cxgbi_cdev_priv(cdev)))->iscsi_ppm);
}
static int cxgb4i_ddp_init(struct cxgbi_device *cdev)
{
struct cxgb4_lld_info *lldi = cxgbi_cdev_priv(cdev);
struct cxgbi_ddp_info *ddp = cdev->ddp;
unsigned int tagmask, pgsz_factor[4];
int err;
struct net_device *ndev = cdev->ports[0];
struct cxgbi_tag_format tformat;
unsigned int ppmax;
int i;
if (ddp) {
kref_get(&ddp->refcnt);
pr_warn("cdev 0x%p, ddp 0x%p already set up.\n",
cdev, cdev->ddp);
return -EALREADY;
if (!lldi->vr->iscsi.size) {
pr_warn("%s, iscsi NOT enabled, check config!\n", ndev->name);
return -EACCES;
}
err = cxgbi_ddp_init(cdev, lldi->vr->iscsi.start,
lldi->vr->iscsi.start + lldi->vr->iscsi.size - 1,
lldi->iscsi_iolen, lldi->iscsi_iolen);
if (err < 0)
return err;
cdev->flags |= CXGBI_FLAG_USE_PPOD_OFLDQ;
ppmax = lldi->vr->iscsi.size >> PPOD_SIZE_SHIFT;
ddp = cdev->ddp;
memset(&tformat, 0, sizeof(struct cxgbi_tag_format));
for (i = 0; i < 4; i++)
tformat.pgsz_order[i] = (lldi->iscsi_pgsz_order >> (i << 3))
& 0xF;
cxgbi_tagmask_check(lldi->iscsi_tagmask, &tformat);
tagmask = ddp->idx_mask << PPOD_IDX_SHIFT;
cxgbi_ddp_page_size_factor(pgsz_factor);
cxgb4_iscsi_init(lldi->ports[0], tagmask, pgsz_factor);
cxgbi_ddp_ppm_setup(lldi->iscsi_ppm, cdev, &tformat, ppmax,
lldi->iscsi_llimit, lldi->vr->iscsi.start, 2);
cdev->csk_ddp_setup_digest = ddp_setup_conn_digest;
cdev->csk_ddp_setup_pgidx = ddp_setup_conn_pgidx;
cdev->csk_ddp_set = ddp_set_map;
cdev->csk_ddp_clear = ddp_clear_map;
cdev->csk_ddp_set_map = ddp_set_map;
cdev->tx_max_size = min_t(unsigned int, ULP2_MAX_PDU_PAYLOAD,
lldi->iscsi_iolen - ISCSI_PDU_NONPAYLOAD_LEN);
cdev->rx_max_size = min_t(unsigned int, ULP2_MAX_PDU_PAYLOAD,
lldi->iscsi_iolen - ISCSI_PDU_NONPAYLOAD_LEN);
cdev->cdev2ppm = cdev2ppm;
pr_info("cxgb4i 0x%p tag: sw %u, rsvd %u,%u, mask 0x%x.\n",
cdev, cdev->tag_format.sw_bits, cdev->tag_format.rsvd_bits,
cdev->tag_format.rsvd_shift, cdev->tag_format.rsvd_mask);
pr_info("cxgb4i 0x%p, nppods %u, bits %u, mask 0x%x,0x%x pkt %u/%u, "
" %u/%u.\n",
cdev, ddp->nppods, ddp->idx_bits, ddp->idx_mask,
ddp->rsvd_tag_mask, ddp->max_txsz, lldi->iscsi_iolen,
ddp->max_rxsz, lldi->iscsi_iolen);
pr_info("cxgb4i 0x%p max payload size: %u/%u, %u/%u.\n",
cdev, cdev->tx_max_size, ddp->max_txsz, cdev->rx_max_size,
ddp->max_rxsz);
return 0;
}

View File

@ -64,6 +64,14 @@ static DEFINE_MUTEX(cdev_mutex);
static LIST_HEAD(cdev_rcu_list);
static DEFINE_SPINLOCK(cdev_rcu_lock);
static inline void cxgbi_decode_sw_tag(u32 sw_tag, int *idx, int *age)
{
if (age)
*age = sw_tag & 0x7FFF;
if (idx)
*idx = (sw_tag >> 16) & 0x7FFF;
}
int cxgbi_device_portmap_create(struct cxgbi_device *cdev, unsigned int base,
unsigned int max_conn)
{
@ -113,12 +121,7 @@ static inline void cxgbi_device_destroy(struct cxgbi_device *cdev)
"cdev 0x%p, p# %u.\n", cdev, cdev->nports);
cxgbi_hbas_remove(cdev);
cxgbi_device_portmap_cleanup(cdev);
if (cdev->dev_ddp_cleanup)
cdev->dev_ddp_cleanup(cdev);
else
cxgbi_ddp_cleanup(cdev);
if (cdev->ddp)
cxgbi_ddp_cleanup(cdev);
cxgbi_ppm_release(cdev->cdev2ppm(cdev));
if (cdev->pmap.max_connect)
cxgbi_free_big_mem(cdev->pmap.port_csk);
kfree(cdev);
@ -1182,503 +1185,73 @@ out_err:
goto done;
}
/*
* Direct Data Placement -
* Directly place the iSCSI Data-In or Data-Out PDU's payload into pre-posted
* final destination host-memory buffers based on the Initiator Task Tag (ITT)
* in Data-In or Target Task Tag (TTT) in Data-Out PDUs.
* The host memory address is programmed into h/w in the format of pagepod
* entries.
* The location of the pagepod entry is encoded into ddp tag which is used as
* the base for ITT/TTT.
*/
static unsigned char ddp_page_order[DDP_PGIDX_MAX] = {0, 1, 2, 4};
static unsigned char ddp_page_shift[DDP_PGIDX_MAX] = {12, 13, 14, 16};
static unsigned char page_idx = DDP_PGIDX_MAX;
static unsigned char sw_tag_idx_bits;
static unsigned char sw_tag_age_bits;
/*
* Direct-Data Placement page size adjustment
*/
static int ddp_adjust_page_table(void)
static inline void
scmd_get_params(struct scsi_cmnd *sc, struct scatterlist **sgl,
unsigned int *sgcnt, unsigned int *dlen,
unsigned int prot)
{
int i;
unsigned int base_order, order;
struct scsi_data_buffer *sdb = prot ? scsi_prot(sc) : scsi_out(sc);
if (PAGE_SIZE < (1UL << ddp_page_shift[0])) {
pr_info("PAGE_SIZE 0x%lx too small, min 0x%lx\n",
PAGE_SIZE, 1UL << ddp_page_shift[0]);
return -EINVAL;
}
base_order = get_order(1UL << ddp_page_shift[0]);
order = get_order(1UL << PAGE_SHIFT);
for (i = 0; i < DDP_PGIDX_MAX; i++) {
/* first is the kernel page size, then just doubling */
ddp_page_order[i] = order - base_order + i;
ddp_page_shift[i] = PAGE_SHIFT + i;
}
return 0;
*sgl = sdb->table.sgl;
*sgcnt = sdb->table.nents;
*dlen = sdb->length;
/* Caution: for protection sdb, sdb->length is invalid */
}
static int ddp_find_page_index(unsigned long pgsz)
void cxgbi_ddp_set_one_ppod(struct cxgbi_pagepod *ppod,
struct cxgbi_task_tag_info *ttinfo,
struct scatterlist **sg_pp, unsigned int *sg_off)
{
struct scatterlist *sg = sg_pp ? *sg_pp : NULL;
unsigned int offset = sg_off ? *sg_off : 0;
dma_addr_t addr = 0UL;
unsigned int len = 0;
int i;
for (i = 0; i < DDP_PGIDX_MAX; i++) {
if (pgsz == (1UL << ddp_page_shift[i]))
return i;
memcpy(ppod, &ttinfo->hdr, sizeof(struct cxgbi_pagepod_hdr));
if (sg) {
addr = sg_dma_address(sg);
len = sg_dma_len(sg);
}
pr_info("ddp page size %lu not supported.\n", pgsz);
return DDP_PGIDX_MAX;
}
static void ddp_setup_host_page_size(void)
{
if (page_idx == DDP_PGIDX_MAX) {
page_idx = ddp_find_page_index(PAGE_SIZE);
if (page_idx == DDP_PGIDX_MAX) {
pr_info("system PAGE %lu, update hw.\n", PAGE_SIZE);
if (ddp_adjust_page_table() < 0) {
pr_info("PAGE %lu, disable ddp.\n", PAGE_SIZE);
return;
for (i = 0; i < PPOD_PAGES_MAX; i++) {
if (sg) {
ppod->addr[i] = cpu_to_be64(addr + offset);
offset += PAGE_SIZE;
if (offset == (len + sg->offset)) {
offset = 0;
sg = sg_next(sg);
if (sg) {
addr = sg_dma_address(sg);
len = sg_dma_len(sg);
}
}
page_idx = ddp_find_page_index(PAGE_SIZE);
}
pr_info("system PAGE %lu, ddp idx %u.\n", PAGE_SIZE, page_idx);
}
}
void cxgbi_ddp_page_size_factor(int *pgsz_factor)
{
int i;
for (i = 0; i < DDP_PGIDX_MAX; i++)
pgsz_factor[i] = ddp_page_order[i];
}
EXPORT_SYMBOL_GPL(cxgbi_ddp_page_size_factor);
/*
* DDP setup & teardown
*/
void cxgbi_ddp_ppod_set(struct cxgbi_pagepod *ppod,
struct cxgbi_pagepod_hdr *hdr,
struct cxgbi_gather_list *gl, unsigned int gidx)
{
int i;
memcpy(ppod, hdr, sizeof(*hdr));
for (i = 0; i < (PPOD_PAGES_MAX + 1); i++, gidx++) {
ppod->addr[i] = gidx < gl->nelem ?
cpu_to_be64(gl->phys_addr[gidx]) : 0ULL;
}
}
EXPORT_SYMBOL_GPL(cxgbi_ddp_ppod_set);
void cxgbi_ddp_ppod_clear(struct cxgbi_pagepod *ppod)
{
memset(ppod, 0, sizeof(*ppod));
}
EXPORT_SYMBOL_GPL(cxgbi_ddp_ppod_clear);
static inline int ddp_find_unused_entries(struct cxgbi_ddp_info *ddp,
unsigned int start, unsigned int max,
unsigned int count,
struct cxgbi_gather_list *gl)
{
unsigned int i, j, k;
/* not enough entries */
if ((max - start) < count) {
log_debug(1 << CXGBI_DBG_DDP,
"NOT enough entries %u+%u < %u.\n", start, count, max);
return -EBUSY;
}
max -= count;
spin_lock(&ddp->map_lock);
for (i = start; i < max;) {
for (j = 0, k = i; j < count; j++, k++) {
if (ddp->gl_map[k])
break;
}
if (j == count) {
for (j = 0, k = i; j < count; j++, k++)
ddp->gl_map[k] = gl;
spin_unlock(&ddp->map_lock);
return i;
}
i += j + 1;
}
spin_unlock(&ddp->map_lock);
log_debug(1 << CXGBI_DBG_DDP,
"NO suitable entries %u available.\n", count);
return -EBUSY;
}
static inline void ddp_unmark_entries(struct cxgbi_ddp_info *ddp,
int start, int count)
{
spin_lock(&ddp->map_lock);
memset(&ddp->gl_map[start], 0,
count * sizeof(struct cxgbi_gather_list *));
spin_unlock(&ddp->map_lock);
}
static inline void ddp_gl_unmap(struct pci_dev *pdev,
struct cxgbi_gather_list *gl)
{
int i;
for (i = 0; i < gl->nelem; i++)
dma_unmap_page(&pdev->dev, gl->phys_addr[i], PAGE_SIZE,
PCI_DMA_FROMDEVICE);
}
static inline int ddp_gl_map(struct pci_dev *pdev,
struct cxgbi_gather_list *gl)
{
int i;
for (i = 0; i < gl->nelem; i++) {
gl->phys_addr[i] = dma_map_page(&pdev->dev, gl->pages[i], 0,
PAGE_SIZE,
PCI_DMA_FROMDEVICE);
if (unlikely(dma_mapping_error(&pdev->dev, gl->phys_addr[i]))) {
log_debug(1 << CXGBI_DBG_DDP,
"page %d 0x%p, 0x%p dma mapping err.\n",
i, gl->pages[i], pdev);
goto unmap;
} else {
ppod->addr[i] = 0ULL;
}
}
return i;
unmap:
if (i) {
unsigned int nelem = gl->nelem;
gl->nelem = i;
ddp_gl_unmap(pdev, gl);
gl->nelem = nelem;
}
return -EINVAL;
}
static void ddp_release_gl(struct cxgbi_gather_list *gl,
struct pci_dev *pdev)
{
ddp_gl_unmap(pdev, gl);
kfree(gl);
}
static struct cxgbi_gather_list *ddp_make_gl(unsigned int xferlen,
struct scatterlist *sgl,
unsigned int sgcnt,
struct pci_dev *pdev,
gfp_t gfp)
{
struct cxgbi_gather_list *gl;
struct scatterlist *sg = sgl;
struct page *sgpage = sg_page(sg);
unsigned int sglen = sg->length;
unsigned int sgoffset = sg->offset;
unsigned int npages = (xferlen + sgoffset + PAGE_SIZE - 1) >>
PAGE_SHIFT;
int i = 1, j = 0;
if (xferlen < DDP_THRESHOLD) {
log_debug(1 << CXGBI_DBG_DDP,
"xfer %u < threshold %u, no ddp.\n",
xferlen, DDP_THRESHOLD);
return NULL;
/*
* the fifth address needs to be repeated in the next ppod, so do
* not move sg
*/
if (sg_pp) {
*sg_pp = sg;
*sg_off = offset;
}
gl = kzalloc(sizeof(struct cxgbi_gather_list) +
npages * (sizeof(dma_addr_t) +
sizeof(struct page *)), gfp);
if (!gl) {
log_debug(1 << CXGBI_DBG_DDP,
"xfer %u, %u pages, OOM.\n", xferlen, npages);
return NULL;
}
log_debug(1 << CXGBI_DBG_DDP,
"xfer %u, sgl %u, gl max %u.\n", xferlen, sgcnt, npages);
gl->pages = (struct page **)&gl->phys_addr[npages];
gl->nelem = npages;
gl->length = xferlen;
gl->offset = sgoffset;
gl->pages[0] = sgpage;
for (i = 1, sg = sg_next(sgl), j = 0; i < sgcnt;
i++, sg = sg_next(sg)) {
struct page *page = sg_page(sg);
if (sgpage == page && sg->offset == sgoffset + sglen)
sglen += sg->length;
else {
/* make sure the sgl is fit for ddp:
* each has the same page size, and
* all of the middle pages are used completely
*/
if ((j && sgoffset) || ((i != sgcnt - 1) &&
((sglen + sgoffset) & ~PAGE_MASK))) {
log_debug(1 << CXGBI_DBG_DDP,
"page %d/%u, %u + %u.\n",
i, sgcnt, sgoffset, sglen);
goto error_out;
}
j++;
if (j == gl->nelem || sg->offset) {
log_debug(1 << CXGBI_DBG_DDP,
"page %d/%u, offset %u.\n",
j, gl->nelem, sg->offset);
goto error_out;
}
gl->pages[j] = page;
sglen = sg->length;
sgoffset = sg->offset;
sgpage = page;
if (offset == len) {
offset = 0;
sg = sg_next(sg);
if (sg) {
addr = sg_dma_address(sg);
len = sg_dma_len(sg);
}
}
gl->nelem = ++j;
if (ddp_gl_map(pdev, gl) < 0)
goto error_out;
return gl;
error_out:
kfree(gl);
return NULL;
ppod->addr[i] = sg ? cpu_to_be64(addr + offset) : 0ULL;
}
static void ddp_tag_release(struct cxgbi_hba *chba, u32 tag)
{
struct cxgbi_device *cdev = chba->cdev;
struct cxgbi_ddp_info *ddp = cdev->ddp;
u32 idx;
idx = (tag >> PPOD_IDX_SHIFT) & ddp->idx_mask;
if (idx < ddp->nppods) {
struct cxgbi_gather_list *gl = ddp->gl_map[idx];
unsigned int npods;
if (!gl || !gl->nelem) {
pr_warn("tag 0x%x, idx %u, gl 0x%p, %u.\n",
tag, idx, gl, gl ? gl->nelem : 0);
return;
}
npods = (gl->nelem + PPOD_PAGES_MAX - 1) >> PPOD_PAGES_SHIFT;
log_debug(1 << CXGBI_DBG_DDP,
"tag 0x%x, release idx %u, npods %u.\n",
tag, idx, npods);
cdev->csk_ddp_clear(chba, tag, idx, npods);
ddp_unmark_entries(ddp, idx, npods);
ddp_release_gl(gl, ddp->pdev);
} else
pr_warn("tag 0x%x, idx %u > max %u.\n", tag, idx, ddp->nppods);
}
static int ddp_tag_reserve(struct cxgbi_sock *csk, unsigned int tid,
u32 sw_tag, u32 *tagp, struct cxgbi_gather_list *gl,
gfp_t gfp)
{
struct cxgbi_device *cdev = csk->cdev;
struct cxgbi_ddp_info *ddp = cdev->ddp;
struct cxgbi_tag_format *tformat = &cdev->tag_format;
struct cxgbi_pagepod_hdr hdr;
unsigned int npods;
int idx = -1;
int err = -ENOMEM;
u32 tag;
npods = (gl->nelem + PPOD_PAGES_MAX - 1) >> PPOD_PAGES_SHIFT;
if (ddp->idx_last == ddp->nppods)
idx = ddp_find_unused_entries(ddp, 0, ddp->nppods,
npods, gl);
else {
idx = ddp_find_unused_entries(ddp, ddp->idx_last + 1,
ddp->nppods, npods,
gl);
if (idx < 0 && ddp->idx_last >= npods) {
idx = ddp_find_unused_entries(ddp, 0,
min(ddp->idx_last + npods, ddp->nppods),
npods, gl);
}
}
if (idx < 0) {
log_debug(1 << CXGBI_DBG_DDP,
"xferlen %u, gl %u, npods %u NO DDP.\n",
gl->length, gl->nelem, npods);
return idx;
}
tag = cxgbi_ddp_tag_base(tformat, sw_tag);
tag |= idx << PPOD_IDX_SHIFT;
hdr.rsvd = 0;
hdr.vld_tid = htonl(PPOD_VALID_FLAG | PPOD_TID(tid));
hdr.pgsz_tag_clr = htonl(tag & ddp->rsvd_tag_mask);
hdr.max_offset = htonl(gl->length);
hdr.page_offset = htonl(gl->offset);
err = cdev->csk_ddp_set(csk, &hdr, idx, npods, gl);
if (err < 0)
goto unmark_entries;
ddp->idx_last = idx;
log_debug(1 << CXGBI_DBG_DDP,
"xfer %u, gl %u,%u, tid 0x%x, tag 0x%x->0x%x(%u,%u).\n",
gl->length, gl->nelem, gl->offset, tid, sw_tag, tag, idx,
npods);
*tagp = tag;
return 0;
unmark_entries:
ddp_unmark_entries(ddp, idx, npods);
return err;
}
int cxgbi_ddp_reserve(struct cxgbi_sock *csk, unsigned int *tagp,
unsigned int sw_tag, unsigned int xferlen,
struct scatterlist *sgl, unsigned int sgcnt, gfp_t gfp)
{
struct cxgbi_device *cdev = csk->cdev;
struct cxgbi_tag_format *tformat = &cdev->tag_format;
struct cxgbi_gather_list *gl;
int err;
if (page_idx >= DDP_PGIDX_MAX || !cdev->ddp ||
xferlen < DDP_THRESHOLD) {
log_debug(1 << CXGBI_DBG_DDP,
"pgidx %u, xfer %u, NO ddp.\n", page_idx, xferlen);
return -EINVAL;
}
if (!cxgbi_sw_tag_usable(tformat, sw_tag)) {
log_debug(1 << CXGBI_DBG_DDP,
"sw_tag 0x%x NOT usable.\n", sw_tag);
return -EINVAL;
}
gl = ddp_make_gl(xferlen, sgl, sgcnt, cdev->pdev, gfp);
if (!gl)
return -ENOMEM;
err = ddp_tag_reserve(csk, csk->tid, sw_tag, tagp, gl, gfp);
if (err < 0)
ddp_release_gl(gl, cdev->pdev);
return err;
}
static void ddp_destroy(struct kref *kref)
{
struct cxgbi_ddp_info *ddp = container_of(kref,
struct cxgbi_ddp_info,
refcnt);
struct cxgbi_device *cdev = ddp->cdev;
int i = 0;
pr_info("kref 0, destroy ddp 0x%p, cdev 0x%p.\n", ddp, cdev);
while (i < ddp->nppods) {
struct cxgbi_gather_list *gl = ddp->gl_map[i];
if (gl) {
int npods = (gl->nelem + PPOD_PAGES_MAX - 1)
>> PPOD_PAGES_SHIFT;
pr_info("cdev 0x%p, ddp %d + %d.\n", cdev, i, npods);
kfree(gl);
i += npods;
} else
i++;
}
cxgbi_free_big_mem(ddp);
}
int cxgbi_ddp_cleanup(struct cxgbi_device *cdev)
{
struct cxgbi_ddp_info *ddp = cdev->ddp;
log_debug(1 << CXGBI_DBG_DDP,
"cdev 0x%p, release ddp 0x%p.\n", cdev, ddp);
cdev->ddp = NULL;
if (ddp)
return kref_put(&ddp->refcnt, ddp_destroy);
return 0;
}
EXPORT_SYMBOL_GPL(cxgbi_ddp_cleanup);
int cxgbi_ddp_init(struct cxgbi_device *cdev,
unsigned int llimit, unsigned int ulimit,
unsigned int max_txsz, unsigned int max_rxsz)
{
struct cxgbi_ddp_info *ddp;
unsigned int ppmax, bits;
ppmax = (ulimit - llimit + 1) >> PPOD_SIZE_SHIFT;
bits = __ilog2_u32(ppmax) + 1;
if (bits > PPOD_IDX_MAX_SIZE)
bits = PPOD_IDX_MAX_SIZE;
ppmax = (1 << (bits - 1)) - 1;
ddp = cxgbi_alloc_big_mem(sizeof(struct cxgbi_ddp_info) +
ppmax * (sizeof(struct cxgbi_gather_list *) +
sizeof(struct sk_buff *)),
GFP_KERNEL);
if (!ddp) {
pr_warn("cdev 0x%p, ddp ppmax %u OOM.\n", cdev, ppmax);
return -ENOMEM;
}
ddp->gl_map = (struct cxgbi_gather_list **)(ddp + 1);
cdev->ddp = ddp;
spin_lock_init(&ddp->map_lock);
kref_init(&ddp->refcnt);
ddp->cdev = cdev;
ddp->pdev = cdev->pdev;
ddp->llimit = llimit;
ddp->ulimit = ulimit;
ddp->max_txsz = min_t(unsigned int, max_txsz, ULP2_MAX_PKT_SIZE);
ddp->max_rxsz = min_t(unsigned int, max_rxsz, ULP2_MAX_PKT_SIZE);
ddp->nppods = ppmax;
ddp->idx_last = ppmax;
ddp->idx_bits = bits;
ddp->idx_mask = (1 << bits) - 1;
ddp->rsvd_tag_mask = (1 << (bits + PPOD_IDX_SHIFT)) - 1;
cdev->tag_format.sw_bits = sw_tag_idx_bits + sw_tag_age_bits;
cdev->tag_format.rsvd_bits = ddp->idx_bits;
cdev->tag_format.rsvd_shift = PPOD_IDX_SHIFT;
cdev->tag_format.rsvd_mask = (1 << cdev->tag_format.rsvd_bits) - 1;
pr_info("%s tag format, sw %u, rsvd %u,%u, mask 0x%x.\n",
cdev->ports[0]->name, cdev->tag_format.sw_bits,
cdev->tag_format.rsvd_bits, cdev->tag_format.rsvd_shift,
cdev->tag_format.rsvd_mask);
cdev->tx_max_size = min_t(unsigned int, ULP2_MAX_PDU_PAYLOAD,
ddp->max_txsz - ISCSI_PDU_NONPAYLOAD_LEN);
cdev->rx_max_size = min_t(unsigned int, ULP2_MAX_PDU_PAYLOAD,
ddp->max_rxsz - ISCSI_PDU_NONPAYLOAD_LEN);
log_debug(1 << CXGBI_DBG_DDP,
"%s max payload size: %u/%u, %u/%u.\n",
cdev->ports[0]->name, cdev->tx_max_size, ddp->max_txsz,
cdev->rx_max_size, ddp->max_rxsz);
return 0;
}
EXPORT_SYMBOL_GPL(cxgbi_ddp_init);
EXPORT_SYMBOL_GPL(cxgbi_ddp_set_one_ppod);
/*
* APIs interacting with open-iscsi libraries
@ -1686,21 +1259,171 @@ EXPORT_SYMBOL_GPL(cxgbi_ddp_init);
static unsigned char padding[4];
void cxgbi_ddp_ppm_setup(void **ppm_pp, struct cxgbi_device *cdev,
struct cxgbi_tag_format *tformat, unsigned int ppmax,
unsigned int llimit, unsigned int start,
unsigned int rsvd_factor)
{
int err = cxgbi_ppm_init(ppm_pp, cdev->ports[0], cdev->pdev,
cdev->lldev, tformat, ppmax, llimit, start,
rsvd_factor);
if (err >= 0) {
struct cxgbi_ppm *ppm = (struct cxgbi_ppm *)(*ppm_pp);
if (ppm->ppmax < 1024 ||
ppm->tformat.pgsz_idx_dflt >= DDP_PGIDX_MAX)
cdev->flags |= CXGBI_FLAG_DDP_OFF;
err = 0;
} else {
cdev->flags |= CXGBI_FLAG_DDP_OFF;
}
}
EXPORT_SYMBOL_GPL(cxgbi_ddp_ppm_setup);
static int cxgbi_ddp_sgl_check(struct scatterlist *sgl, int nents)
{
int i;
int last_sgidx = nents - 1;
struct scatterlist *sg = sgl;
for (i = 0; i < nents; i++, sg = sg_next(sg)) {
unsigned int len = sg->length + sg->offset;
if ((sg->offset & 0x3) || (i && sg->offset) ||
((i != last_sgidx) && len != PAGE_SIZE)) {
log_debug(1 << CXGBI_DBG_DDP,
"sg %u/%u, %u,%u, not aligned.\n",
i, nents, sg->offset, sg->length);
goto err_out;
}
}
return 0;
err_out:
return -EINVAL;
}
static int cxgbi_ddp_reserve(struct cxgbi_conn *cconn,
struct cxgbi_task_data *tdata, u32 sw_tag,
unsigned int xferlen)
{
struct cxgbi_sock *csk = cconn->cep->csk;
struct cxgbi_device *cdev = csk->cdev;
struct cxgbi_ppm *ppm = cdev->cdev2ppm(cdev);
struct cxgbi_task_tag_info *ttinfo = &tdata->ttinfo;
struct scatterlist *sgl = ttinfo->sgl;
unsigned int sgcnt = ttinfo->nents;
unsigned int sg_offset = sgl->offset;
int err;
if (cdev->flags & CXGBI_FLAG_DDP_OFF) {
log_debug(1 << CXGBI_DBG_DDP,
"cdev 0x%p DDP off.\n", cdev);
return -EINVAL;
}
if (!ppm || xferlen < DDP_THRESHOLD || !sgcnt ||
ppm->tformat.pgsz_idx_dflt >= DDP_PGIDX_MAX) {
log_debug(1 << CXGBI_DBG_DDP,
"ppm 0x%p, pgidx %u, xfer %u, sgcnt %u, NO ddp.\n",
ppm, ppm ? ppm->tformat.pgsz_idx_dflt : DDP_PGIDX_MAX,
xferlen, ttinfo->nents);
return -EINVAL;
}
/* make sure the buffer is suitable for ddp */
if (cxgbi_ddp_sgl_check(sgl, sgcnt) < 0)
return -EINVAL;
ttinfo->nr_pages = (xferlen + sgl->offset + (1 << PAGE_SHIFT) - 1) >>
PAGE_SHIFT;
/*
* the ddp tag will be used for the itt in the outgoing pdu,
* the itt genrated by libiscsi is saved in the ppm and can be
* retrieved via the ddp tag
*/
err = cxgbi_ppm_ppods_reserve(ppm, ttinfo->nr_pages, 0, &ttinfo->idx,
&ttinfo->tag, (unsigned long)sw_tag);
if (err < 0) {
cconn->ddp_full++;
return err;
}
ttinfo->npods = err;
/* setup dma from scsi command sgl */
sgl->offset = 0;
err = dma_map_sg(&ppm->pdev->dev, sgl, sgcnt, DMA_FROM_DEVICE);
sgl->offset = sg_offset;
if (err == 0) {
pr_info("%s: 0x%x, xfer %u, sgl %u dma mapping err.\n",
__func__, sw_tag, xferlen, sgcnt);
goto rel_ppods;
}
if (err != ttinfo->nr_pages) {
log_debug(1 << CXGBI_DBG_DDP,
"%s: sw tag 0x%x, xfer %u, sgl %u, dma count %d.\n",
__func__, sw_tag, xferlen, sgcnt, err);
}
ttinfo->flags |= CXGBI_PPOD_INFO_FLAG_MAPPED;
ttinfo->cid = csk->port_id;
cxgbi_ppm_make_ppod_hdr(ppm, ttinfo->tag, csk->tid, sgl->offset,
xferlen, &ttinfo->hdr);
if (cdev->flags & CXGBI_FLAG_USE_PPOD_OFLDQ) {
/* write ppod from xmit_pdu (of iscsi_scsi_command pdu) */
ttinfo->flags |= CXGBI_PPOD_INFO_FLAG_VALID;
} else {
/* write ppod from control queue now */
err = cdev->csk_ddp_set_map(ppm, csk, ttinfo);
if (err < 0)
goto rel_ppods;
}
return 0;
rel_ppods:
cxgbi_ppm_ppod_release(ppm, ttinfo->idx);
if (ttinfo->flags & CXGBI_PPOD_INFO_FLAG_MAPPED) {
ttinfo->flags &= ~CXGBI_PPOD_INFO_FLAG_MAPPED;
dma_unmap_sg(&ppm->pdev->dev, sgl, sgcnt, DMA_FROM_DEVICE);
}
return -EINVAL;
}
static void task_release_itt(struct iscsi_task *task, itt_t hdr_itt)
{
struct scsi_cmnd *sc = task->sc;
struct iscsi_tcp_conn *tcp_conn = task->conn->dd_data;
struct cxgbi_conn *cconn = tcp_conn->dd_data;
struct cxgbi_hba *chba = cconn->chba;
struct cxgbi_tag_format *tformat = &chba->cdev->tag_format;
struct cxgbi_device *cdev = cconn->chba->cdev;
struct cxgbi_ppm *ppm = cdev->cdev2ppm(cdev);
u32 tag = ntohl((__force u32)hdr_itt);
log_debug(1 << CXGBI_DBG_DDP,
"cdev 0x%p, release tag 0x%x.\n", chba->cdev, tag);
"cdev 0x%p, task 0x%p, release tag 0x%x.\n",
cdev, task, tag);
if (sc &&
(scsi_bidi_cmnd(sc) || sc->sc_data_direction == DMA_FROM_DEVICE) &&
cxgbi_is_ddp_tag(tformat, tag))
ddp_tag_release(chba, tag);
cxgbi_ppm_is_ddp_tag(ppm, tag)) {
struct cxgbi_task_data *tdata = iscsi_task_cxgbi_data(task);
struct cxgbi_task_tag_info *ttinfo = &tdata->ttinfo;
if (!(cdev->flags & CXGBI_FLAG_USE_PPOD_OFLDQ))
cdev->csk_ddp_clear_map(cdev, ppm, ttinfo);
cxgbi_ppm_ppod_release(ppm, ttinfo->idx);
dma_unmap_sg(&ppm->pdev->dev, ttinfo->sgl, ttinfo->nents,
DMA_FROM_DEVICE);
}
}
static inline u32 cxgbi_build_sw_tag(u32 idx, u32 age)
{
/* assume idx and age both are < 0x7FFF (32767) */
return (idx << 16) | age;
}
static int task_reserve_itt(struct iscsi_task *task, itt_t *hdr_itt)
@ -1710,34 +1433,41 @@ static int task_reserve_itt(struct iscsi_task *task, itt_t *hdr_itt)
struct iscsi_session *sess = conn->session;
struct iscsi_tcp_conn *tcp_conn = conn->dd_data;
struct cxgbi_conn *cconn = tcp_conn->dd_data;
struct cxgbi_hba *chba = cconn->chba;
struct cxgbi_tag_format *tformat = &chba->cdev->tag_format;
u32 sw_tag = (sess->age << cconn->task_idx_bits) | task->itt;
struct cxgbi_device *cdev = cconn->chba->cdev;
struct cxgbi_ppm *ppm = cdev->cdev2ppm(cdev);
u32 sw_tag = cxgbi_build_sw_tag(task->itt, sess->age);
u32 tag = 0;
int err = -EINVAL;
if (sc &&
(scsi_bidi_cmnd(sc) || sc->sc_data_direction == DMA_FROM_DEVICE)) {
err = cxgbi_ddp_reserve(cconn->cep->csk, &tag, sw_tag,
scsi_in(sc)->length,
scsi_in(sc)->table.sgl,
scsi_in(sc)->table.nents,
GFP_ATOMIC);
if (err < 0)
log_debug(1 << CXGBI_DBG_DDP,
"csk 0x%p, R task 0x%p, %u,%u, no ddp.\n",
cconn->cep->csk, task, scsi_in(sc)->length,
scsi_in(sc)->table.nents);
(scsi_bidi_cmnd(sc) || sc->sc_data_direction == DMA_FROM_DEVICE)
) {
struct cxgbi_task_data *tdata = iscsi_task_cxgbi_data(task);
struct cxgbi_task_tag_info *ttinfo = &tdata->ttinfo;
scmd_get_params(sc, &ttinfo->sgl, &ttinfo->nents,
&tdata->dlen, 0);
err = cxgbi_ddp_reserve(cconn, tdata, sw_tag, tdata->dlen);
if (!err)
tag = ttinfo->tag;
else
log_debug(1 << CXGBI_DBG_DDP,
"csk 0x%p, R task 0x%p, %u,%u, no ddp.\n",
cconn->cep->csk, task, tdata->dlen,
ttinfo->nents);
}
if (err < 0)
tag = cxgbi_set_non_ddp_tag(tformat, sw_tag);
if (err < 0) {
err = cxgbi_ppm_make_non_ddp_tag(ppm, sw_tag, &tag);
if (err < 0)
return err;
}
/* the itt need to sent in big-endian order */
*hdr_itt = (__force itt_t)htonl(tag);
log_debug(1 << CXGBI_DBG_DDP,
"cdev 0x%p, task 0x%p, 0x%x(0x%x,0x%x)->0x%x/0x%x.\n",
chba->cdev, task, sw_tag, task->itt, sess->age, tag, *hdr_itt);
"cdev 0x%p, task 0x%p, 0x%x(0x%x,0x%x)->0x%x/0x%x.\n",
cdev, task, sw_tag, task->itt, sess->age, tag, *hdr_itt);
return 0;
}
@ -1746,19 +1476,24 @@ void cxgbi_parse_pdu_itt(struct iscsi_conn *conn, itt_t itt, int *idx, int *age)
struct iscsi_tcp_conn *tcp_conn = conn->dd_data;
struct cxgbi_conn *cconn = tcp_conn->dd_data;
struct cxgbi_device *cdev = cconn->chba->cdev;
u32 tag = ntohl((__force u32) itt);
struct cxgbi_ppm *ppm = cdev->cdev2ppm(cdev);
u32 tag = ntohl((__force u32)itt);
u32 sw_bits;
sw_bits = cxgbi_tag_nonrsvd_bits(&cdev->tag_format, tag);
if (idx)
*idx = sw_bits & ((1 << cconn->task_idx_bits) - 1);
if (age)
*age = (sw_bits >> cconn->task_idx_bits) & ISCSI_AGE_MASK;
if (ppm) {
if (cxgbi_ppm_is_ddp_tag(ppm, tag))
sw_bits = cxgbi_ppm_get_tag_caller_data(ppm, tag);
else
sw_bits = cxgbi_ppm_decode_non_ddp_tag(ppm, tag);
} else {
sw_bits = tag;
}
cxgbi_decode_sw_tag(sw_bits, idx, age);
log_debug(1 << CXGBI_DBG_DDP,
"cdev 0x%p, tag 0x%x/0x%x, -> 0x%x(0x%x,0x%x).\n",
cdev, tag, itt, sw_bits, idx ? *idx : 0xFFFFF,
age ? *age : 0xFF);
"cdev 0x%p, tag 0x%x/0x%x, -> 0x%x(0x%x,0x%x).\n",
cdev, tag, itt, sw_bits, idx ? *idx : 0xFFFFF,
age ? *age : 0xFF);
}
EXPORT_SYMBOL_GPL(cxgbi_parse_pdu_itt);
@ -2260,7 +1995,9 @@ int cxgbi_conn_xmit_pdu(struct iscsi_task *task)
struct iscsi_tcp_conn *tcp_conn = task->conn->dd_data;
struct cxgbi_conn *cconn = tcp_conn->dd_data;
struct cxgbi_task_data *tdata = iscsi_task_cxgbi_data(task);
struct cxgbi_task_tag_info *ttinfo = &tdata->ttinfo;
struct sk_buff *skb = tdata->skb;
struct cxgbi_sock *csk = NULL;
unsigned int datalen;
int err;
@ -2270,8 +2007,28 @@ int cxgbi_conn_xmit_pdu(struct iscsi_task *task)
return 0;
}
if (cconn && cconn->cep)
csk = cconn->cep->csk;
if (!csk) {
log_debug(1 << CXGBI_DBG_ISCSI | 1 << CXGBI_DBG_PDU_TX,
"task 0x%p, csk gone.\n", task);
return -EPIPE;
}
datalen = skb->data_len;
tdata->skb = NULL;
/* write ppod first if using ofldq to write ppod */
if (ttinfo->flags & CXGBI_PPOD_INFO_FLAG_VALID) {
struct cxgbi_ppm *ppm = csk->cdev->cdev2ppm(csk->cdev);
ttinfo->flags &= ~CXGBI_PPOD_INFO_FLAG_VALID;
if (csk->cdev->csk_ddp_set_map(ppm, csk, ttinfo) < 0)
pr_err("task 0x%p, ppod writing using ofldq failed.\n",
task);
/* continue. Let fl get the data */
}
err = cxgbi_sock_send_pdus(cconn->cep->csk, skb);
if (err > 0) {
int pdulen = err;
@ -2313,12 +2070,14 @@ EXPORT_SYMBOL_GPL(cxgbi_conn_xmit_pdu);
void cxgbi_cleanup_task(struct iscsi_task *task)
{
struct iscsi_tcp_task *tcp_task = task->dd_data;
struct cxgbi_task_data *tdata = iscsi_task_cxgbi_data(task);
log_debug(1 << CXGBI_DBG_ISCSI,
"task 0x%p, skb 0x%p, itt 0x%x.\n",
task, tdata->skb, task->hdr_itt);
tcp_task->dd_data = NULL;
/* never reached the xmit task callout */
if (tdata->skb)
__kfree_skb(tdata->skb);
@ -2528,6 +2287,7 @@ int cxgbi_bind_conn(struct iscsi_cls_session *cls_session,
struct iscsi_conn *conn = cls_conn->dd_data;
struct iscsi_tcp_conn *tcp_conn = conn->dd_data;
struct cxgbi_conn *cconn = tcp_conn->dd_data;
struct cxgbi_ppm *ppm;
struct iscsi_endpoint *ep;
struct cxgbi_endpoint *cep;
struct cxgbi_sock *csk;
@ -2540,7 +2300,10 @@ int cxgbi_bind_conn(struct iscsi_cls_session *cls_session,
/* setup ddp pagesize */
cep = ep->dd_data;
csk = cep->csk;
err = csk->cdev->csk_ddp_setup_pgidx(csk, csk->tid, page_idx, 0);
ppm = csk->cdev->cdev2ppm(csk->cdev);
err = csk->cdev->csk_ddp_setup_pgidx(csk, csk->tid,
ppm->tformat.pgsz_idx_dflt, 0);
if (err < 0)
return err;
@ -2915,16 +2678,7 @@ EXPORT_SYMBOL_GPL(cxgbi_attr_is_visible);
static int __init libcxgbi_init_module(void)
{
sw_tag_idx_bits = (__ilog2_u32(ISCSI_ITT_MASK)) + 1;
sw_tag_age_bits = (__ilog2_u32(ISCSI_AGE_MASK)) + 1;
pr_info("%s", version);
pr_info("tag itt 0x%x, %u bits, age 0x%x, %u bits.\n",
ISCSI_ITT_MASK, sw_tag_idx_bits,
ISCSI_AGE_MASK, sw_tag_age_bits);
ddp_setup_host_page_size();
return 0;
}

View File

@ -24,9 +24,12 @@
#include <linux/scatterlist.h>
#include <linux/skbuff.h>
#include <linux/vmalloc.h>
#include <linux/version.h>
#include <scsi/scsi_device.h>
#include <scsi/libiscsi_tcp.h>
#include <libcxgb_ppm.h>
enum cxgbi_dbg_flag {
CXGBI_DBG_ISCSI,
CXGBI_DBG_DDP,
@ -84,92 +87,11 @@ static inline unsigned int cxgbi_ulp_extra_len(int submode)
return ulp2_extra_len[submode & 3];
}
/*
* struct pagepod_hdr, pagepod - pagepod format
*/
#define CPL_RX_DDP_STATUS_DDP_SHIFT 16 /* ddp'able */
#define CPL_RX_DDP_STATUS_PAD_SHIFT 19 /* pad error */
#define CPL_RX_DDP_STATUS_HCRC_SHIFT 20 /* hcrc error */
#define CPL_RX_DDP_STATUS_DCRC_SHIFT 21 /* dcrc error */
struct cxgbi_pagepod_hdr {
u32 vld_tid;
u32 pgsz_tag_clr;
u32 max_offset;
u32 page_offset;
u64 rsvd;
};
#define PPOD_PAGES_MAX 4
struct cxgbi_pagepod {
struct cxgbi_pagepod_hdr hdr;
u64 addr[PPOD_PAGES_MAX + 1];
};
struct cxgbi_tag_format {
unsigned char sw_bits;
unsigned char rsvd_bits;
unsigned char rsvd_shift;
unsigned char filler[1];
u32 rsvd_mask;
};
struct cxgbi_gather_list {
unsigned int tag;
unsigned int length;
unsigned int offset;
unsigned int nelem;
struct page **pages;
dma_addr_t phys_addr[0];
};
struct cxgbi_ddp_info {
struct kref refcnt;
struct cxgbi_device *cdev;
struct pci_dev *pdev;
unsigned int max_txsz;
unsigned int max_rxsz;
unsigned int llimit;
unsigned int ulimit;
unsigned int nppods;
unsigned int idx_last;
unsigned char idx_bits;
unsigned char filler[3];
unsigned int idx_mask;
unsigned int rsvd_tag_mask;
spinlock_t map_lock;
struct cxgbi_gather_list **gl_map;
};
#define DDP_PGIDX_MAX 4
#define DDP_THRESHOLD 2048
#define PPOD_PAGES_SHIFT 2 /* 4 pages per pod */
#define PPOD_SIZE sizeof(struct cxgbi_pagepod) /* 64 */
#define PPOD_SIZE_SHIFT 6
#define ULPMEM_DSGL_MAX_NPPODS 16 /* 1024/PPOD_SIZE */
#define ULPMEM_IDATA_MAX_NPPODS 4 /* 256/PPOD_SIZE */
#define PCIE_MEMWIN_MAX_NPPODS 16 /* 1024/PPOD_SIZE */
#define PPOD_COLOR_SHIFT 0
#define PPOD_COLOR(x) ((x) << PPOD_COLOR_SHIFT)
#define PPOD_IDX_SHIFT 6
#define PPOD_IDX_MAX_SIZE 24
#define PPOD_TID_SHIFT 0
#define PPOD_TID(x) ((x) << PPOD_TID_SHIFT)
#define PPOD_TAG_SHIFT 6
#define PPOD_TAG(x) ((x) << PPOD_TAG_SHIFT)
#define PPOD_VALID_SHIFT 24
#define PPOD_VALID(x) ((x) << PPOD_VALID_SHIFT)
#define PPOD_VALID_FLAG PPOD_VALID(1U)
/*
* sge_opaque_hdr -
* Opaque version of structure the SGE stores at skb->head of TX_DATA packets
@ -279,6 +201,8 @@ struct cxgbi_skb_tx_cb {
enum cxgbi_skcb_flags {
SKCBF_TX_NEED_HDR, /* packet needs a header */
SKCBF_TX_MEM_WRITE, /* memory write */
SKCBF_TX_FLAG_COMPL, /* wr completion flag */
SKCBF_RX_COALESCED, /* received whole pdu */
SKCBF_RX_HDR, /* received pdu header */
SKCBF_RX_DATA, /* received pdu payload */
@ -527,6 +451,9 @@ struct cxgbi_ports_map {
#define CXGBI_FLAG_DEV_T4 0x2
#define CXGBI_FLAG_ADAPTER_RESET 0x4
#define CXGBI_FLAG_IPV4_SET 0x10
#define CXGBI_FLAG_USE_PPOD_OFLDQ 0x40
#define CXGBI_FLAG_DDP_OFF 0x100
struct cxgbi_device {
struct list_head list_head;
struct list_head rcu_node;
@ -548,15 +475,14 @@ struct cxgbi_device {
unsigned int tx_max_size;
unsigned int rx_max_size;
struct cxgbi_ports_map pmap;
struct cxgbi_tag_format tag_format;
struct cxgbi_ddp_info *ddp;
void (*dev_ddp_cleanup)(struct cxgbi_device *);
int (*csk_ddp_set)(struct cxgbi_sock *, struct cxgbi_pagepod_hdr *,
unsigned int, unsigned int,
struct cxgbi_gather_list *);
void (*csk_ddp_clear)(struct cxgbi_hba *,
unsigned int, unsigned int, unsigned int);
struct cxgbi_ppm* (*cdev2ppm)(struct cxgbi_device *);
int (*csk_ddp_set_map)(struct cxgbi_ppm *, struct cxgbi_sock *,
struct cxgbi_task_tag_info *);
void (*csk_ddp_clear_map)(struct cxgbi_device *cdev,
struct cxgbi_ppm *,
struct cxgbi_task_tag_info *);
int (*csk_ddp_setup_digest)(struct cxgbi_sock *,
unsigned int, int, int, int);
int (*csk_ddp_setup_pgidx)(struct cxgbi_sock *,
@ -580,6 +506,8 @@ struct cxgbi_conn {
struct iscsi_conn *iconn;
struct cxgbi_hba *chba;
u32 task_idx_bits;
unsigned int ddp_full;
unsigned int ddp_tag_full;
};
struct cxgbi_endpoint {
@ -593,85 +521,15 @@ struct cxgbi_task_data {
unsigned short nr_frags;
struct page_frag frags[MAX_PDU_FRAGS];
struct sk_buff *skb;
unsigned int dlen;
unsigned int offset;
unsigned int count;
unsigned int sgoffset;
struct cxgbi_task_tag_info ttinfo;
};
#define iscsi_task_cxgbi_data(task) \
((task)->dd_data + sizeof(struct iscsi_tcp_task))
static inline int cxgbi_is_ddp_tag(struct cxgbi_tag_format *tformat, u32 tag)
{
return !(tag & (1 << (tformat->rsvd_bits + tformat->rsvd_shift - 1)));
}
static inline int cxgbi_sw_tag_usable(struct cxgbi_tag_format *tformat,
u32 sw_tag)
{
sw_tag >>= (32 - tformat->rsvd_bits);
return !sw_tag;
}
static inline u32 cxgbi_set_non_ddp_tag(struct cxgbi_tag_format *tformat,
u32 sw_tag)
{
unsigned char shift = tformat->rsvd_bits + tformat->rsvd_shift - 1;
u32 mask = (1 << shift) - 1;
if (sw_tag && (sw_tag & ~mask)) {
u32 v1 = sw_tag & ((1 << shift) - 1);
u32 v2 = (sw_tag >> (shift - 1)) << shift;
return v2 | v1 | 1 << shift;
}
return sw_tag | 1 << shift;
}
static inline u32 cxgbi_ddp_tag_base(struct cxgbi_tag_format *tformat,
u32 sw_tag)
{
u32 mask = (1 << tformat->rsvd_shift) - 1;
if (sw_tag && (sw_tag & ~mask)) {
u32 v1 = sw_tag & mask;
u32 v2 = sw_tag >> tformat->rsvd_shift;
v2 <<= tformat->rsvd_bits + tformat->rsvd_shift;
return v2 | v1;
}
return sw_tag;
}
static inline u32 cxgbi_tag_rsvd_bits(struct cxgbi_tag_format *tformat,
u32 tag)
{
if (cxgbi_is_ddp_tag(tformat, tag))
return (tag >> tformat->rsvd_shift) & tformat->rsvd_mask;
return 0;
}
static inline u32 cxgbi_tag_nonrsvd_bits(struct cxgbi_tag_format *tformat,
u32 tag)
{
unsigned char shift = tformat->rsvd_bits + tformat->rsvd_shift - 1;
u32 v1, v2;
if (cxgbi_is_ddp_tag(tformat, tag)) {
v1 = tag & ((1 << tformat->rsvd_shift) - 1);
v2 = (tag >> (shift + 1)) << tformat->rsvd_shift;
} else {
u32 mask = (1 << shift) - 1;
tag &= ~(1 << shift);
v1 = tag & mask;
v2 = (tag >> 1) & ~mask;
}
return v1 | v2;
}
static inline void *cxgbi_alloc_big_mem(unsigned int size,
gfp_t gfp)
{
@ -749,7 +607,11 @@ int cxgbi_ddp_init(struct cxgbi_device *, unsigned int, unsigned int,
unsigned int, unsigned int);
int cxgbi_ddp_cleanup(struct cxgbi_device *);
void cxgbi_ddp_page_size_factor(int *);
void cxgbi_ddp_ppod_clear(struct cxgbi_pagepod *);
void cxgbi_ddp_ppod_set(struct cxgbi_pagepod *, struct cxgbi_pagepod_hdr *,
struct cxgbi_gather_list *, unsigned int);
void cxgbi_ddp_set_one_ppod(struct cxgbi_pagepod *,
struct cxgbi_task_tag_info *,
struct scatterlist **sg_pp, unsigned int *sg_off);
void cxgbi_ddp_ppm_setup(void **ppm_pp, struct cxgbi_device *,
struct cxgbi_tag_format *, unsigned int ppmax,
unsigned int llimit, unsigned int start,
unsigned int rsvd_factor);
#endif /*__LIBCXGBI_H__*/

View File

@ -1,7 +1,7 @@
config ISCSI_TARGET_CXGB4
tristate "Chelsio iSCSI target offload driver"
depends on ISCSI_TARGET && CHELSIO_T4 && INET
select CHELSIO_T4_UWIRE
select CHELSIO_LIB
---help---
To compile this driver as module, choose M here: the module
will be called cxgbit.

View File

@ -1,4 +1,5 @@
ccflags-y := -Idrivers/net/ethernet/chelsio/cxgb4
ccflags-y += -Idrivers/net/ethernet/chelsio/libcxgb
ccflags-y += -Idrivers/target/iscsi
obj-$(CONFIG_ISCSI_TARGET_CXGB4) += cxgbit.o

View File

@ -37,7 +37,7 @@
#include "cxgb4.h"
#include "cxgb4_uld.h"
#include "l2t.h"
#include "cxgb4_ppm.h"
#include "libcxgb_ppm.h"
#include "cxgbit_lro.h"
extern struct mutex cdev_list_lock;

View File

@ -26,6 +26,8 @@ void _cxgbit_free_cdev(struct kref *kref)
struct cxgbit_device *cdev;
cdev = container_of(kref, struct cxgbit_device, kref);
cxgbi_ppm_release(cdev2ppm(cdev));
kfree(cdev);
}