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https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
synced 2024-08-23 09:19:51 +00:00
mtd: nand: use a local variable to simplify the nand_scan_tail
There are too many "chip->ecc" in the nand_scan_tail() which makes the eyes sore. This patch uses a local variable "ecc" to replace the "chip->ecc" to make the code more graceful. Do the code change with "s/chip->ecc\./ecc->/g" in the nand_scan_tail, and also change some lines by hand. Signed-off-by: Huang Shijie <b32955@freescale.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
This commit is contained in:
parent
b1eb234fb3
commit
97de79e02d
1 changed files with 103 additions and 108 deletions
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@ -3558,6 +3558,7 @@ int nand_scan_tail(struct mtd_info *mtd)
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{
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int i;
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struct nand_chip *chip = mtd->priv;
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struct nand_ecc_ctrl *ecc = &chip->ecc;
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/* New bad blocks should be marked in OOB, flash-based BBT, or both */
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BUG_ON((chip->bbt_options & NAND_BBT_NO_OOB_BBM) &&
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@ -3574,19 +3575,19 @@ int nand_scan_tail(struct mtd_info *mtd)
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/*
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* If no default placement scheme is given, select an appropriate one.
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*/
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if (!chip->ecc.layout && (chip->ecc.mode != NAND_ECC_SOFT_BCH)) {
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if (!ecc->layout && (ecc->mode != NAND_ECC_SOFT_BCH)) {
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switch (mtd->oobsize) {
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case 8:
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chip->ecc.layout = &nand_oob_8;
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ecc->layout = &nand_oob_8;
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break;
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case 16:
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chip->ecc.layout = &nand_oob_16;
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ecc->layout = &nand_oob_16;
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break;
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case 64:
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chip->ecc.layout = &nand_oob_64;
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ecc->layout = &nand_oob_64;
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break;
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case 128:
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chip->ecc.layout = &nand_oob_128;
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ecc->layout = &nand_oob_128;
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break;
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default:
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pr_warn("No oob scheme defined for oobsize %d\n",
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@ -3603,64 +3604,62 @@ int nand_scan_tail(struct mtd_info *mtd)
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* selected and we have 256 byte pagesize fallback to software ECC
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*/
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switch (chip->ecc.mode) {
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switch (ecc->mode) {
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case NAND_ECC_HW_OOB_FIRST:
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/* Similar to NAND_ECC_HW, but a separate read_page handle */
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if (!chip->ecc.calculate || !chip->ecc.correct ||
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!chip->ecc.hwctl) {
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if (!ecc->calculate || !ecc->correct || !ecc->hwctl) {
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pr_warn("No ECC functions supplied; "
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"hardware ECC not possible\n");
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BUG();
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}
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if (!chip->ecc.read_page)
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chip->ecc.read_page = nand_read_page_hwecc_oob_first;
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if (!ecc->read_page)
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ecc->read_page = nand_read_page_hwecc_oob_first;
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case NAND_ECC_HW:
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/* Use standard hwecc read page function? */
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if (!chip->ecc.read_page)
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chip->ecc.read_page = nand_read_page_hwecc;
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if (!chip->ecc.write_page)
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chip->ecc.write_page = nand_write_page_hwecc;
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if (!chip->ecc.read_page_raw)
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chip->ecc.read_page_raw = nand_read_page_raw;
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if (!chip->ecc.write_page_raw)
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chip->ecc.write_page_raw = nand_write_page_raw;
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if (!chip->ecc.read_oob)
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chip->ecc.read_oob = nand_read_oob_std;
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if (!chip->ecc.write_oob)
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chip->ecc.write_oob = nand_write_oob_std;
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if (!chip->ecc.read_subpage)
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chip->ecc.read_subpage = nand_read_subpage;
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if (!chip->ecc.write_subpage)
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chip->ecc.write_subpage = nand_write_subpage_hwecc;
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if (!ecc->read_page)
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ecc->read_page = nand_read_page_hwecc;
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if (!ecc->write_page)
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ecc->write_page = nand_write_page_hwecc;
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if (!ecc->read_page_raw)
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ecc->read_page_raw = nand_read_page_raw;
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if (!ecc->write_page_raw)
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ecc->write_page_raw = nand_write_page_raw;
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if (!ecc->read_oob)
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ecc->read_oob = nand_read_oob_std;
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if (!ecc->write_oob)
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ecc->write_oob = nand_write_oob_std;
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if (!ecc->read_subpage)
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ecc->read_subpage = nand_read_subpage;
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if (!ecc->write_subpage)
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ecc->write_subpage = nand_write_subpage_hwecc;
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case NAND_ECC_HW_SYNDROME:
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if ((!chip->ecc.calculate || !chip->ecc.correct ||
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!chip->ecc.hwctl) &&
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(!chip->ecc.read_page ||
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chip->ecc.read_page == nand_read_page_hwecc ||
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!chip->ecc.write_page ||
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chip->ecc.write_page == nand_write_page_hwecc)) {
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if ((!ecc->calculate || !ecc->correct || !ecc->hwctl) &&
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(!ecc->read_page ||
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ecc->read_page == nand_read_page_hwecc ||
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!ecc->write_page ||
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ecc->write_page == nand_write_page_hwecc)) {
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pr_warn("No ECC functions supplied; "
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"hardware ECC not possible\n");
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BUG();
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}
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/* Use standard syndrome read/write page function? */
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if (!chip->ecc.read_page)
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chip->ecc.read_page = nand_read_page_syndrome;
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if (!chip->ecc.write_page)
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chip->ecc.write_page = nand_write_page_syndrome;
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if (!chip->ecc.read_page_raw)
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chip->ecc.read_page_raw = nand_read_page_raw_syndrome;
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if (!chip->ecc.write_page_raw)
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chip->ecc.write_page_raw = nand_write_page_raw_syndrome;
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if (!chip->ecc.read_oob)
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chip->ecc.read_oob = nand_read_oob_syndrome;
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if (!chip->ecc.write_oob)
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chip->ecc.write_oob = nand_write_oob_syndrome;
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if (!ecc->read_page)
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ecc->read_page = nand_read_page_syndrome;
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if (!ecc->write_page)
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ecc->write_page = nand_write_page_syndrome;
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if (!ecc->read_page_raw)
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ecc->read_page_raw = nand_read_page_raw_syndrome;
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if (!ecc->write_page_raw)
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ecc->write_page_raw = nand_write_page_raw_syndrome;
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if (!ecc->read_oob)
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ecc->read_oob = nand_read_oob_syndrome;
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if (!ecc->write_oob)
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ecc->write_oob = nand_write_oob_syndrome;
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if (mtd->writesize >= chip->ecc.size) {
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if (!chip->ecc.strength) {
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if (mtd->writesize >= ecc->size) {
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if (!ecc->strength) {
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pr_warn("Driver must set ecc.strength when using hardware ECC\n");
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BUG();
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}
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@ -3668,23 +3667,23 @@ int nand_scan_tail(struct mtd_info *mtd)
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}
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pr_warn("%d byte HW ECC not possible on "
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"%d byte page size, fallback to SW ECC\n",
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chip->ecc.size, mtd->writesize);
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chip->ecc.mode = NAND_ECC_SOFT;
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ecc->size, mtd->writesize);
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ecc->mode = NAND_ECC_SOFT;
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case NAND_ECC_SOFT:
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chip->ecc.calculate = nand_calculate_ecc;
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chip->ecc.correct = nand_correct_data;
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chip->ecc.read_page = nand_read_page_swecc;
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chip->ecc.read_subpage = nand_read_subpage;
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chip->ecc.write_page = nand_write_page_swecc;
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chip->ecc.read_page_raw = nand_read_page_raw;
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chip->ecc.write_page_raw = nand_write_page_raw;
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chip->ecc.read_oob = nand_read_oob_std;
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chip->ecc.write_oob = nand_write_oob_std;
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if (!chip->ecc.size)
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chip->ecc.size = 256;
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chip->ecc.bytes = 3;
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chip->ecc.strength = 1;
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ecc->calculate = nand_calculate_ecc;
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ecc->correct = nand_correct_data;
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ecc->read_page = nand_read_page_swecc;
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ecc->read_subpage = nand_read_subpage;
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ecc->write_page = nand_write_page_swecc;
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ecc->read_page_raw = nand_read_page_raw;
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ecc->write_page_raw = nand_write_page_raw;
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ecc->read_oob = nand_read_oob_std;
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ecc->write_oob = nand_write_oob_std;
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if (!ecc->size)
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ecc->size = 256;
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ecc->bytes = 3;
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ecc->strength = 1;
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break;
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case NAND_ECC_SOFT_BCH:
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@ -3692,87 +3691,83 @@ int nand_scan_tail(struct mtd_info *mtd)
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pr_warn("CONFIG_MTD_ECC_BCH not enabled\n");
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BUG();
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}
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chip->ecc.calculate = nand_bch_calculate_ecc;
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chip->ecc.correct = nand_bch_correct_data;
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chip->ecc.read_page = nand_read_page_swecc;
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chip->ecc.read_subpage = nand_read_subpage;
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chip->ecc.write_page = nand_write_page_swecc;
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chip->ecc.read_page_raw = nand_read_page_raw;
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chip->ecc.write_page_raw = nand_write_page_raw;
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chip->ecc.read_oob = nand_read_oob_std;
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chip->ecc.write_oob = nand_write_oob_std;
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ecc->calculate = nand_bch_calculate_ecc;
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ecc->correct = nand_bch_correct_data;
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ecc->read_page = nand_read_page_swecc;
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ecc->read_subpage = nand_read_subpage;
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ecc->write_page = nand_write_page_swecc;
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ecc->read_page_raw = nand_read_page_raw;
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ecc->write_page_raw = nand_write_page_raw;
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ecc->read_oob = nand_read_oob_std;
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ecc->write_oob = nand_write_oob_std;
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/*
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* Board driver should supply ecc.size and ecc.bytes values to
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* select how many bits are correctable; see nand_bch_init()
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* for details. Otherwise, default to 4 bits for large page
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* devices.
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*/
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if (!chip->ecc.size && (mtd->oobsize >= 64)) {
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chip->ecc.size = 512;
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chip->ecc.bytes = 7;
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if (!ecc->size && (mtd->oobsize >= 64)) {
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ecc->size = 512;
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ecc->bytes = 7;
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}
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chip->ecc.priv = nand_bch_init(mtd,
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chip->ecc.size,
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chip->ecc.bytes,
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&chip->ecc.layout);
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if (!chip->ecc.priv) {
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ecc->priv = nand_bch_init(mtd, ecc->size, ecc->bytes,
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&ecc->layout);
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if (!ecc->priv) {
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pr_warn("BCH ECC initialization failed!\n");
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BUG();
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}
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chip->ecc.strength =
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chip->ecc.bytes * 8 / fls(8 * chip->ecc.size);
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ecc->strength = ecc->bytes * 8 / fls(8 * ecc->size);
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break;
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case NAND_ECC_NONE:
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pr_warn("NAND_ECC_NONE selected by board driver. "
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"This is not recommended!\n");
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chip->ecc.read_page = nand_read_page_raw;
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chip->ecc.write_page = nand_write_page_raw;
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chip->ecc.read_oob = nand_read_oob_std;
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chip->ecc.read_page_raw = nand_read_page_raw;
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chip->ecc.write_page_raw = nand_write_page_raw;
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chip->ecc.write_oob = nand_write_oob_std;
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chip->ecc.size = mtd->writesize;
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chip->ecc.bytes = 0;
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chip->ecc.strength = 0;
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ecc->read_page = nand_read_page_raw;
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ecc->write_page = nand_write_page_raw;
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ecc->read_oob = nand_read_oob_std;
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ecc->read_page_raw = nand_read_page_raw;
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ecc->write_page_raw = nand_write_page_raw;
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ecc->write_oob = nand_write_oob_std;
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ecc->size = mtd->writesize;
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ecc->bytes = 0;
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ecc->strength = 0;
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break;
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default:
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pr_warn("Invalid NAND_ECC_MODE %d\n", chip->ecc.mode);
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pr_warn("Invalid NAND_ECC_MODE %d\n", ecc->mode);
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BUG();
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}
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/* For many systems, the standard OOB write also works for raw */
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if (!chip->ecc.read_oob_raw)
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chip->ecc.read_oob_raw = chip->ecc.read_oob;
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if (!chip->ecc.write_oob_raw)
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chip->ecc.write_oob_raw = chip->ecc.write_oob;
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if (!ecc->read_oob_raw)
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ecc->read_oob_raw = ecc->read_oob;
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if (!ecc->write_oob_raw)
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ecc->write_oob_raw = ecc->write_oob;
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/*
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* The number of bytes available for a client to place data into
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* the out of band area.
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*/
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chip->ecc.layout->oobavail = 0;
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for (i = 0; chip->ecc.layout->oobfree[i].length
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&& i < ARRAY_SIZE(chip->ecc.layout->oobfree); i++)
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chip->ecc.layout->oobavail +=
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chip->ecc.layout->oobfree[i].length;
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mtd->oobavail = chip->ecc.layout->oobavail;
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ecc->layout->oobavail = 0;
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for (i = 0; ecc->layout->oobfree[i].length
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&& i < ARRAY_SIZE(ecc->layout->oobfree); i++)
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ecc->layout->oobavail += ecc->layout->oobfree[i].length;
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mtd->oobavail = ecc->layout->oobavail;
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/*
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* Set the number of read / write steps for one page depending on ECC
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* mode.
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*/
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chip->ecc.steps = mtd->writesize / chip->ecc.size;
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if (chip->ecc.steps * chip->ecc.size != mtd->writesize) {
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ecc->steps = mtd->writesize / ecc->size;
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if (ecc->steps * ecc->size != mtd->writesize) {
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pr_warn("Invalid ECC parameters\n");
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BUG();
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}
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chip->ecc.total = chip->ecc.steps * chip->ecc.bytes;
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ecc->total = ecc->steps * ecc->bytes;
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/* Allow subpage writes up to ecc.steps. Not possible for MLC flash */
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if (!(chip->options & NAND_NO_SUBPAGE_WRITE) && nand_is_slc(chip)) {
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switch (chip->ecc.steps) {
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switch (ecc->steps) {
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case 2:
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mtd->subpage_sft = 1;
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break;
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@ -3792,7 +3787,7 @@ int nand_scan_tail(struct mtd_info *mtd)
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chip->pagebuf = -1;
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/* Large page NAND with SOFT_ECC should support subpage reads */
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if ((chip->ecc.mode == NAND_ECC_SOFT) && (chip->page_shift > 9))
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if ((ecc->mode == NAND_ECC_SOFT) && (chip->page_shift > 9))
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chip->options |= NAND_SUBPAGE_READ;
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/* Fill in remaining MTD driver data */
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@ -3817,9 +3812,9 @@ int nand_scan_tail(struct mtd_info *mtd)
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mtd->writebufsize = mtd->writesize;
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/* propagate ecc info to mtd_info */
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mtd->ecclayout = chip->ecc.layout;
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mtd->ecc_strength = chip->ecc.strength;
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mtd->ecc_step_size = chip->ecc.size;
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mtd->ecclayout = ecc->layout;
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mtd->ecc_strength = ecc->strength;
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mtd->ecc_step_size = ecc->size;
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/*
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* Initialize bitflip_threshold to its default prior scan_bbt() call.
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* scan_bbt() might invoke mtd_read(), thus bitflip_threshold must be
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