omap: i2c: Fix muxing for command line enabled bus

The commit b63128e812 broke the pin muxing
for I2C busses that are enabled from the kernel command line.

Fix this by defining the board registration function omap_register_i2c_bus
in common platform code as it was before but keep the muxing in architecture
dependent files.

Signed-off-by: Jarkko Nikula <jhnikula@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This commit is contained in:
Jarkko Nikula 2010-02-22 20:29:36 +00:00 committed by Tony Lindgren
parent b610ec5023
commit 9833eff3d7
4 changed files with 12 additions and 15 deletions

View File

@ -23,9 +23,7 @@
#include <plat/mux.h>
#include <plat/cpu.h>
int __init omap_register_i2c_bus(int bus_id, u32 clkrate,
struct i2c_board_info const *info,
unsigned len)
void __init omap1_i2c_mux_pins(int bus_id)
{
if (cpu_is_omap7xx()) {
omap_cfg_reg(I2C_7XX_SDA);
@ -34,6 +32,4 @@ int __init omap_register_i2c_bus(int bus_id, u32 clkrate,
omap_cfg_reg(I2C_SDA);
omap_cfg_reg(I2C_SCL);
}
return omap_plat_register_i2c_bus(bus_id, clkrate, info, len);
}

View File

@ -25,9 +25,7 @@
#include "mux.h"
int __init omap_register_i2c_bus(int bus_id, u32 clkrate,
struct i2c_board_info const *info,
unsigned len)
void __init omap2_i2c_mux_pins(int bus_id)
{
if (cpu_is_omap24xx()) {
const int omap24xx_pins[][2] = {
@ -51,6 +49,4 @@ int __init omap_register_i2c_bus(int bus_id, u32 clkrate,
sprintf(mux_name, "i2c%i_sda.i2c%i_sda", bus_id, bus_id);
omap_mux_init_signal(mux_name, OMAP_PIN_INPUT);
}
return omap_plat_register_i2c_bus(bus_id, clkrate, info, len);
}

View File

@ -28,6 +28,7 @@
#include <linux/i2c.h>
#include <mach/irqs.h>
#include <plat/mux.h>
#include <plat/i2c.h>
#define OMAP_I2C_SIZE 0x3f
#define OMAP1_I2C_BASE 0xfffb3800
@ -117,6 +118,11 @@ static int __init omap_i2c_add_bus(int bus_id)
res[1].start = irq;
}
if (cpu_class_is_omap1())
omap1_i2c_mux_pins(bus_id);
if (cpu_class_is_omap2())
omap2_i2c_mux_pins(bus_id);
return platform_device_register(pdev);
}
@ -169,7 +175,7 @@ out:
subsys_initcall(omap_register_i2c_bus_cmdline);
/**
* omap_plat_register_i2c_bus - register I2C bus with device descriptors
* omap_register_i2c_bus - register I2C bus with device descriptors
* @bus_id: bus id counting from number 1
* @clkrate: clock rate of the bus in kHz
* @info: pointer into I2C device descriptor table or NULL
@ -177,7 +183,7 @@ subsys_initcall(omap_register_i2c_bus_cmdline);
*
* Returns 0 on success or an error code.
*/
int __init omap_plat_register_i2c_bus(int bus_id, u32 clkrate,
int __init omap_register_i2c_bus(int bus_id, u32 clkrate,
struct i2c_board_info const *info,
unsigned len)
{

View File

@ -34,6 +34,5 @@ static inline int omap_register_i2c_bus(int bus_id, u32 clkrate,
}
#endif
int omap_plat_register_i2c_bus(int bus_id, u32 clkrate,
struct i2c_board_info const *info,
unsigned len);
void __init omap1_i2c_mux_pins(int bus_id);
void __init omap2_i2c_mux_pins(int bus_id);