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https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
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[ARM] 2888/1: OMAP 3/4: Update omap include files, take 2
Patch from Tony Lindgren This patch syncs the mainline kernel with linux-omap tree. The highlights of the patch are: - Start adding 24xx support by Paul Mundt - Clean-up of cpu detection by Dirk Behme and Tony Lindgren - Add DSP header by Toshihiro Kobayashi - Add support for mtd-xip by Vladimir Barinov - Add various new mux registers - Move OMAP specific serial defines back to serial.h Signed-off-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This commit is contained in:
parent
92105bb706
commit
9839c6b8dd
26 changed files with 771 additions and 242 deletions
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@ -30,6 +30,9 @@
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#define __ASM_ARCH_OMAP_H4_H
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#define __ASM_ARCH_OMAP_H4_H
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/* Placeholder for H4 specific defines */
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/* Placeholder for H4 specific defines */
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/* GPMC CS1 */
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#define OMAP24XX_ETHR_START 0x08000300
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#define OMAP24XX_ETHR_GPIO_IRQ 92
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#endif /* __ASM_ARCH_OMAP_H4_H */
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#endif /* __ASM_ARCH_OMAP_H4_H */
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@ -36,31 +36,6 @@
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#define OMAP1510P1_EMIFS_PRI_VALUE 0x00
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#define OMAP1510P1_EMIFS_PRI_VALUE 0x00
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#define OMAP1510P1_EMIFF_PRI_VALUE 0x00
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#define OMAP1510P1_EMIFF_PRI_VALUE 0x00
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/*
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* These definitions define an area of FLASH set aside
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* for the use of MTD/JFFS2. This is the area of flash
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* that a JFFS2 filesystem will reside which is mounted
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* at boot with the "root=/dev/mtdblock/0 rw"
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* command line option. The flash address used here must
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* fall within the legal range defined by rrload for storing
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* the filesystem component. This address will be sufficiently
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* deep into the overall flash range to avoid the other
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* components also stored in flash such as the bootloader,
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* the bootloader params, and the kernel.
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* The SW2 settings for the map below are:
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* 1 off, 2 off, 3 on, 4 off.
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*/
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/* Intel flash_0, partitioned as expected by rrload */
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#define OMAP_FLASH_0_BASE 0xD8000000
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#define OMAP_FLASH_0_START 0x00000000
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#define OMAP_FLASH_0_SIZE SZ_16M
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/* Intel flash_1, used for cramfs or other flash file systems */
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#define OMAP_FLASH_1_BASE 0xD9000000
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#define OMAP_FLASH_1_START 0x01000000
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#define OMAP_FLASH_1_SIZE SZ_16M
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#define NR_FPGA_IRQS 24
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#define NR_FPGA_IRQS 24
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#define NR_IRQS IH_BOARD_BASE + NR_FPGA_IRQS
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#define NR_IRQS IH_BOARD_BASE + NR_FPGA_IRQS
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@ -36,23 +36,14 @@
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#define OMAP_SDRAM_DEVICE D256M_1X16_4B
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#define OMAP_SDRAM_DEVICE D256M_1X16_4B
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#endif
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#endif
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/*
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* These definitions define an area of FLASH set aside
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* for the use of MTD/JFFS2. This is the area of flash
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* that a JFFS2 filesystem will reside which is mounted
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* at boot with the "root=/dev/mtdblock/0 rw"
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* command line option.
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*/
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/* Intel flash_0, partitioned as expected by rrload */
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#define OMAP_FLASH_0_BASE 0xD8000000 /* VA */
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#define OMAP_FLASH_0_START 0x00000000 /* PA */
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#define OMAP_FLASH_0_SIZE SZ_32M
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#define MAXIRQNUM IH_BOARD_BASE
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#define MAXIRQNUM IH_BOARD_BASE
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#define MAXFIQNUM MAXIRQNUM
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#define MAXFIQNUM MAXIRQNUM
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#define MAXSWINUM MAXIRQNUM
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#define MAXSWINUM MAXIRQNUM
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#define NR_IRQS (MAXIRQNUM + 1)
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#define NR_IRQS (MAXIRQNUM + 1)
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/* Samsung NAND flash at CS2B or CS3(NAND Boot) */
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#define OMAP_NAND_FLASH_START1 0x0A000000 /* CS2B */
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#define OMAP_NAND_FLASH_START2 0x0C000000 /* CS3 */
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#endif
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#endif
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@ -11,11 +11,6 @@
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#ifndef __ASM_ARCH_VOICEBLUE_H
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#ifndef __ASM_ARCH_VOICEBLUE_H
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#define __ASM_ARCH_VOICEBLUE_H
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#define __ASM_ARCH_VOICEBLUE_H
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#if (EXTERNAL_MAX_NR_PORTS < 4)
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#undef EXTERNAL_MAX_NR_PORTS
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#define EXTERNAL_MAX_NR_PORTS 4
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#endif
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extern void voiceblue_wdt_enable(void);
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extern void voiceblue_wdt_enable(void);
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extern void voiceblue_wdt_disable(void);
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extern void voiceblue_wdt_disable(void);
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extern void voiceblue_wdt_ping(void);
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extern void voiceblue_wdt_ping(void);
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@ -30,10 +30,23 @@ struct omap_clock_config {
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u8 system_clock_type;
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u8 system_clock_type;
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};
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};
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struct omap_mmc_conf {
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unsigned enabled:1;
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/* nomux means "standard" muxing is wrong on this board, and that
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* board-specific code handled it before common init logic.
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*/
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unsigned nomux:1;
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/* switch pin can be for card detect (default) or card cover */
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unsigned cover:1;
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/* 4 wire signaling is optional, and is only used for SD/SDIO */
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unsigned wire4:1;
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s16 power_pin;
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s16 switch_pin;
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s16 wp_pin;
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};
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struct omap_mmc_config {
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struct omap_mmc_config {
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u8 mmc_blocks;
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struct omap_mmc_conf mmc[2];
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s16 mmc1_power_pin, mmc2_power_pin;
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s16 mmc1_switch_pin, mmc2_switch_pin;
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};
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};
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struct omap_serial_console_config {
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struct omap_serial_console_config {
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@ -38,146 +38,179 @@ extern unsigned int system_rev;
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/*
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/*
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* Test if multicore OMAP support is needed
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* Test if multicore OMAP support is needed
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*/
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*/
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#undef MULTI_OMAP
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#undef MULTI_OMAP1
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#undef MULTI_OMAP2
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#undef OMAP_NAME
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#undef OMAP_NAME
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#ifdef CONFIG_ARCH_OMAP730
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#ifdef CONFIG_ARCH_OMAP730
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# ifdef OMAP_NAME
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# ifdef OMAP_NAME
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# undef MULTI_OMAP
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# undef MULTI_OMAP1
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# define MULTI_OMAP
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# define MULTI_OMAP1
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# else
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# else
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# define OMAP_NAME omap730
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# define OMAP_NAME omap730
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# endif
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# endif
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#endif
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#endif
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#ifdef CONFIG_ARCH_OMAP1510
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#ifdef CONFIG_ARCH_OMAP1510
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# ifdef OMAP_NAME
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# ifdef OMAP_NAME
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# undef MULTI_OMAP
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# undef MULTI_OMAP1
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# define MULTI_OMAP
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# define MULTI_OMAP1
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# else
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# else
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# define OMAP_NAME omap1510
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# define OMAP_NAME omap1510
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# endif
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# endif
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#endif
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#endif
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#ifdef CONFIG_ARCH_OMAP16XX
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#ifdef CONFIG_ARCH_OMAP16XX
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# ifdef OMAP_NAME
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# ifdef OMAP_NAME
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# undef MULTI_OMAP
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# undef MULTI_OMAP1
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# define MULTI_OMAP
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# define MULTI_OMAP1
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# else
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# else
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# define OMAP_NAME omap1610
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# define OMAP_NAME omap16xx
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# endif
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# endif
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#endif
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#endif
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#ifdef CONFIG_ARCH_OMAP16XX
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#ifdef CONFIG_ARCH_OMAP24XX
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# ifdef OMAP_NAME
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# if (defined(OMAP_NAME) || defined(MULTI_OMAP1))
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# undef MULTI_OMAP
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# error "OMAP1 and OMAP2 can't be selected at the same time"
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# define MULTI_OMAP
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# else
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# else
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# define OMAP_NAME omap1710
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# undef MULTI_OMAP2
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# define OMAP_NAME omap24xx
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# endif
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# endif
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#endif
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#endif
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/*
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/*
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* Generate various OMAP cpu specific macros, and cpu class
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* Macros to group OMAP into cpu classes.
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* specific macros
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* These can be used in most places.
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* cpu_is_omap7xx(): True for OMAP730
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* cpu_is_omap15xx(): True for OMAP1510 and OMAP5910
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* cpu_is_omap16xx(): True for OMAP1610, OMAP5912 and OMAP1710
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* cpu_is_omap24xx(): True for OMAP2420
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*/
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*/
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#define GET_OMAP_TYPE ((system_rev >> 24) & 0xff)
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#define GET_OMAP_CLASS (system_rev & 0xff)
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#define GET_OMAP_CLASS (system_rev & 0xff)
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#define IS_OMAP_TYPE(type, id) \
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static inline int is_omap ##type (void) \
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{ \
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return (GET_OMAP_TYPE == (id)) ? 1 : 0; \
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}
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#define IS_OMAP_CLASS(class, id) \
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#define IS_OMAP_CLASS(class, id) \
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static inline int is_omap ##class (void) \
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static inline int is_omap ##class (void) \
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{ \
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{ \
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return (GET_OMAP_CLASS == (id)) ? 1 : 0; \
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return (GET_OMAP_CLASS == (id)) ? 1 : 0; \
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}
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}
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IS_OMAP_TYPE(730, 0x07)
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IS_OMAP_TYPE(1510, 0x15)
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IS_OMAP_TYPE(1610, 0x16)
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IS_OMAP_TYPE(5912, 0x16)
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IS_OMAP_TYPE(1710, 0x17)
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IS_OMAP_TYPE(2420, 0x24)
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IS_OMAP_CLASS(7xx, 0x07)
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IS_OMAP_CLASS(7xx, 0x07)
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IS_OMAP_CLASS(15xx, 0x15)
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IS_OMAP_CLASS(15xx, 0x15)
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IS_OMAP_CLASS(16xx, 0x16)
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IS_OMAP_CLASS(16xx, 0x16)
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IS_OMAP_CLASS(24xx, 0x24)
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IS_OMAP_CLASS(24xx, 0x24)
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/*
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#define cpu_is_omap7xx() 0
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* Macros to group OMAP types into cpu classes.
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#define cpu_is_omap15xx() 0
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* These can be used in most places.
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#define cpu_is_omap16xx() 0
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* cpu_is_omap15xx(): True for 1510 and 5910
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#define cpu_is_omap24xx() 0
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* cpu_is_omap16xx(): True for 1610, 5912 and 1710
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*/
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#if defined(MULTI_OMAP1)
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#if defined(MULTI_OMAP)
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# if defined(CONFIG_ARCH_OMAP730)
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# define cpu_is_omap7xx() is_omap7xx()
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# undef cpu_is_omap7xx
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# define cpu_is_omap15xx() is_omap15xx()
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# define cpu_is_omap7xx() is_omap7xx()
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# if !(defined(CONFIG_ARCH_OMAP1510) || defined(CONFIG_ARCH_OMAP730))
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# endif
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# define cpu_is_omap16xx() 1
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# if defined(CONFIG_ARCH_OMAP1510)
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# else
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# undef cpu_is_omap15xx
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# define cpu_is_omap15xx() is_omap15xx()
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# endif
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# if defined(CONFIG_ARCH_OMAP16XX)
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# undef cpu_is_omap16xx
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# define cpu_is_omap16xx() is_omap16xx()
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# define cpu_is_omap16xx() is_omap16xx()
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# endif
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# endif
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#else
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#else
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# if defined(CONFIG_ARCH_OMAP730)
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# if defined(CONFIG_ARCH_OMAP730)
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# undef cpu_is_omap7xx
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# define cpu_is_omap7xx() 1
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# define cpu_is_omap7xx() 1
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# else
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# define cpu_is_omap7xx() 0
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# endif
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# endif
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# if defined(CONFIG_ARCH_OMAP1510)
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# if defined(CONFIG_ARCH_OMAP1510)
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# undef cpu_is_omap15xx
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# define cpu_is_omap15xx() 1
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# define cpu_is_omap15xx() 1
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# else
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# define cpu_is_omap15xx() 0
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# endif
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# endif
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# if defined(CONFIG_ARCH_OMAP16XX)
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# if defined(CONFIG_ARCH_OMAP16XX)
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# undef cpu_is_omap16xx
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# define cpu_is_omap16xx() 1
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# define cpu_is_omap16xx() 1
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# else
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# endif
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# define cpu_is_omap16xx() 0
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# if defined(CONFIG_ARCH_OMAP24XX)
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# undef cpu_is_omap24xx
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# define cpu_is_omap24xx() 1
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# endif
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# endif
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#endif
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#endif
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#if defined(MULTI_OMAP)
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/*
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# define cpu_is_omap730() is_omap730()
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* Macros to detect individual cpu types.
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# define cpu_is_omap1510() is_omap1510()
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* These are only rarely needed.
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# define cpu_is_omap1610() is_omap1610()
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* cpu_is_omap730(): True for OMAP730
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# define cpu_is_omap5912() is_omap5912()
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* cpu_is_omap1510(): True for OMAP1510
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# define cpu_is_omap1710() is_omap1710()
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* cpu_is_omap1610(): True for OMAP1610
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* cpu_is_omap1611(): True for OMAP1611
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* cpu_is_omap5912(): True for OMAP5912
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* cpu_is_omap1621(): True for OMAP1621
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* cpu_is_omap1710(): True for OMAP1710
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* cpu_is_omap2420(): True for OMAP2420
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*/
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#define GET_OMAP_TYPE ((system_rev >> 16) & 0xffff)
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#define IS_OMAP_TYPE(type, id) \
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static inline int is_omap ##type (void) \
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{ \
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return (GET_OMAP_TYPE == (id)) ? 1 : 0; \
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}
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IS_OMAP_TYPE(730, 0x0730)
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IS_OMAP_TYPE(1510, 0x1510)
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IS_OMAP_TYPE(1610, 0x1610)
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IS_OMAP_TYPE(1611, 0x1611)
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IS_OMAP_TYPE(5912, 0x1611)
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IS_OMAP_TYPE(1621, 0x1621)
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IS_OMAP_TYPE(1710, 0x1710)
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IS_OMAP_TYPE(2420, 0x2420)
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#define cpu_is_omap730() 0
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#define cpu_is_omap1510() 0
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#define cpu_is_omap1610() 0
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#define cpu_is_omap5912() 0
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#define cpu_is_omap1611() 0
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#define cpu_is_omap1621() 0
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#define cpu_is_omap1710() 0
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#define cpu_is_omap2420() 0
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#if defined(MULTI_OMAP1)
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# if defined(CONFIG_ARCH_OMAP730)
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# undef cpu_is_omap730
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# define cpu_is_omap730() is_omap730()
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# endif
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# if defined(CONFIG_ARCH_OMAP1510)
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# undef cpu_is_omap1510
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# define cpu_is_omap1510() is_omap1510()
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# endif
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#else
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#else
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# if defined(CONFIG_ARCH_OMAP730)
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# if defined(CONFIG_ARCH_OMAP730)
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# undef cpu_is_omap730
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# define cpu_is_omap730() 1
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# define cpu_is_omap730() 1
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# else
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# define cpu_is_omap730() 0
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# endif
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# endif
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# if defined(CONFIG_ARCH_OMAP1510)
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# if defined(CONFIG_ARCH_OMAP1510)
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# undef cpu_is_omap1510
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# define cpu_is_omap1510() 1
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# define cpu_is_omap1510() 1
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# else
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# define cpu_is_omap1510() 0
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# endif
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# if defined(CONFIG_ARCH_OMAP16XX)
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# define cpu_is_omap1610() 1
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# else
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# define cpu_is_omap1610() 0
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# endif
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# if defined(CONFIG_ARCH_OMAP16XX)
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# define cpu_is_omap5912() 1
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# else
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# define cpu_is_omap5912() 0
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# endif
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# if defined(CONFIG_ARCH_OMAP16XX)
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# define cpu_is_omap1610() is_omap1610()
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# define cpu_is_omap5912() is_omap5912()
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|
||||||
# define cpu_is_omap1710() is_omap1710()
|
|
||||||
# else
|
|
||||||
# define cpu_is_omap1610() 0
|
|
||||||
# define cpu_is_omap5912() 0
|
|
||||||
# define cpu_is_omap1710() 0
|
|
||||||
# endif
|
|
||||||
# if defined(CONFIG_ARCH_OMAP2420)
|
|
||||||
# define cpu_is_omap2420() 1
|
|
||||||
# else
|
|
||||||
# define cpu_is_omap2420() 0
|
|
||||||
# endif
|
# endif
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
|
/*
|
||||||
|
* Whether we have MULTI_OMAP1 or not, we still need to distinguish
|
||||||
|
* between 1611B/5912 and 1710.
|
||||||
|
*/
|
||||||
|
#if defined(CONFIG_ARCH_OMAP16XX)
|
||||||
|
# undef cpu_is_omap1610
|
||||||
|
# undef cpu_is_omap1611
|
||||||
|
# undef cpu_is_omap5912
|
||||||
|
# undef cpu_is_omap1621
|
||||||
|
# undef cpu_is_omap1710
|
||||||
|
# define cpu_is_omap1610() is_omap1610()
|
||||||
|
# define cpu_is_omap1611() is_omap1611()
|
||||||
|
# define cpu_is_omap5912() is_omap5912()
|
||||||
|
# define cpu_is_omap1621() is_omap1621()
|
||||||
|
# define cpu_is_omap1710() is_omap1710()
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#if defined(CONFIG_ARCH_OMAP2420)
|
||||||
|
# undef cpu_is_omap2420
|
||||||
|
# define cpu_is_omap2420() 1
|
||||||
|
#endif
|
||||||
|
|
||||||
#endif
|
#endif
|
||||||
|
|
|
@ -14,6 +14,7 @@
|
||||||
.macro addruart,rx
|
.macro addruart,rx
|
||||||
mrc p15, 0, \rx, c1, c0
|
mrc p15, 0, \rx, c1, c0
|
||||||
tst \rx, #1 @ MMU enabled?
|
tst \rx, #1 @ MMU enabled?
|
||||||
|
#ifdef CONFIG_ARCH_OMAP1
|
||||||
moveq \rx, #0xff000000 @ physical base address
|
moveq \rx, #0xff000000 @ physical base address
|
||||||
movne \rx, #0xfe000000 @ virtual base
|
movne \rx, #0xfe000000 @ virtual base
|
||||||
orr \rx, \rx, #0x00fb0000
|
orr \rx, \rx, #0x00fb0000
|
||||||
|
@ -22,6 +23,18 @@
|
||||||
#endif
|
#endif
|
||||||
#if defined(CONFIG_OMAP_LL_DEBUG_UART2) || defined(CONFIG_OMAP_LL_DEBUG_UART3)
|
#if defined(CONFIG_OMAP_LL_DEBUG_UART2) || defined(CONFIG_OMAP_LL_DEBUG_UART3)
|
||||||
orr \rx, \rx, #0x00000800 @ UART 2 & 3
|
orr \rx, \rx, #0x00000800 @ UART 2 & 3
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#elif CONFIG_ARCH_OMAP2
|
||||||
|
moveq \rx, #0x48000000 @ physical base address
|
||||||
|
movne \rx, #0xd8000000 @ virtual base
|
||||||
|
orr \rx, \rx, #0x0006a000
|
||||||
|
#ifdef CONFIG_OMAP_LL_DEBUG_UART2
|
||||||
|
add \rx, \rx, #0x00002000 @ UART 2
|
||||||
|
#endif
|
||||||
|
#ifdef CONFIG_OMAP_LL_DEBUG_UART3
|
||||||
|
add \rx, \rx, #0x00004000 @ UART 3
|
||||||
|
#endif
|
||||||
#endif
|
#endif
|
||||||
.endm
|
.endm
|
||||||
|
|
||||||
|
|
|
@ -240,6 +240,7 @@ extern void omap_dma_unlink_lch (int lch_head, int lch_queue);
|
||||||
|
|
||||||
extern dma_addr_t omap_get_dma_src_pos(int lch);
|
extern dma_addr_t omap_get_dma_src_pos(int lch);
|
||||||
extern dma_addr_t omap_get_dma_dst_pos(int lch);
|
extern dma_addr_t omap_get_dma_dst_pos(int lch);
|
||||||
|
extern int omap_get_dma_src_addr_counter(int lch);
|
||||||
extern void omap_clear_dma(int lch);
|
extern void omap_clear_dma(int lch);
|
||||||
extern int omap_dma_running(void);
|
extern int omap_dma_running(void);
|
||||||
|
|
||||||
|
|
92
include/asm-arm/arch-omap/dmtimer.h
Normal file
92
include/asm-arm/arch-omap/dmtimer.h
Normal file
|
@ -0,0 +1,92 @@
|
||||||
|
/*
|
||||||
|
* linux/include/asm-arm/arm/arch-omap/dmtimer.h
|
||||||
|
*
|
||||||
|
* OMAP Dual-Mode Timers
|
||||||
|
*
|
||||||
|
* Copyright (C) 2005 Nokia Corporation
|
||||||
|
* Author: Lauri Leukkunen <lauri.leukkunen@nokia.com>
|
||||||
|
*
|
||||||
|
* This program is free software; you can redistribute it and/or modify it
|
||||||
|
* under the terms of the GNU General Public License as published by the
|
||||||
|
* Free Software Foundation; either version 2 of the License, or (at your
|
||||||
|
* option) any later version.
|
||||||
|
*
|
||||||
|
* THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
|
||||||
|
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||||
|
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
|
||||||
|
* NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||||
|
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
|
||||||
|
* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||||
|
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
|
||||||
|
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||||
|
*
|
||||||
|
* You should have received a copy of the GNU General Public License along
|
||||||
|
* with this program; if not, write to the Free Software Foundation, Inc.,
|
||||||
|
* 675 Mass Ave, Cambridge, MA 02139, USA.
|
||||||
|
*/
|
||||||
|
|
||||||
|
#ifndef __ASM_ARCH_TIMER_H
|
||||||
|
#define __ASM_ARCH_TIMER_H
|
||||||
|
|
||||||
|
#include <linux/list.h>
|
||||||
|
|
||||||
|
#define OMAP_TIMER_SRC_ARMXOR 0x00
|
||||||
|
#define OMAP_TIMER_SRC_32_KHZ 0x01
|
||||||
|
#define OMAP_TIMER_SRC_EXT_CLK 0x02
|
||||||
|
|
||||||
|
/* timer control reg bits */
|
||||||
|
#define OMAP_TIMER_CTRL_CAPTMODE (1 << 13)
|
||||||
|
#define OMAP_TIMER_CTRL_PT (1 << 12)
|
||||||
|
#define OMAP_TIMER_CTRL_TRG_OVERFLOW (0x1 << 10)
|
||||||
|
#define OMAP_TIMER_CTRL_TRG_OFANDMATCH (0x2 << 10)
|
||||||
|
#define OMAP_TIMER_CTRL_TCM_LOWTOHIGH (0x1 << 8)
|
||||||
|
#define OMAP_TIMER_CTRL_TCM_HIGHTOLOW (0x2 << 8)
|
||||||
|
#define OMAP_TIMER_CTRL_TCM_BOTHEDGES (0x3 << 8)
|
||||||
|
#define OMAP_TIMER_CTRL_SCPWM (1 << 7)
|
||||||
|
#define OMAP_TIMER_CTRL_CE (1 << 6) /* compare enable */
|
||||||
|
#define OMAP_TIMER_CTRL_PRE (1 << 5) /* prescaler enable */
|
||||||
|
#define OMAP_TIMER_CTRL_PTV_SHIFT 2 /* how much to shift the prescaler value */
|
||||||
|
#define OMAP_TIMER_CTRL_AR (1 << 1) /* auto-reload enable */
|
||||||
|
#define OMAP_TIMER_CTRL_ST (1 << 0) /* start timer */
|
||||||
|
|
||||||
|
/* timer interrupt enable bits */
|
||||||
|
#define OMAP_TIMER_INT_CAPTURE (1 << 2)
|
||||||
|
#define OMAP_TIMER_INT_OVERFLOW (1 << 1)
|
||||||
|
#define OMAP_TIMER_INT_MATCH (1 << 0)
|
||||||
|
|
||||||
|
|
||||||
|
struct omap_dm_timer {
|
||||||
|
struct list_head timer_list;
|
||||||
|
|
||||||
|
u32 base;
|
||||||
|
unsigned int irq;
|
||||||
|
};
|
||||||
|
|
||||||
|
u32 omap_dm_timer_read_reg(struct omap_dm_timer *timer, int reg);
|
||||||
|
void omap_dm_timer_write_reg(struct omap_dm_timer *timer, int reg, u32 value);
|
||||||
|
|
||||||
|
struct omap_dm_timer * omap_dm_timer_request(void);
|
||||||
|
void omap_dm_timer_free(struct omap_dm_timer *timer);
|
||||||
|
void omap_dm_timer_set_source(struct omap_dm_timer *timer, int source);
|
||||||
|
|
||||||
|
void omap_dm_timer_set_int_enable(struct omap_dm_timer *timer, unsigned int value);
|
||||||
|
void omap_dm_timer_set_trigger(struct omap_dm_timer *timer, unsigned int value);
|
||||||
|
void omap_dm_timer_enable_compare(struct omap_dm_timer *timer);
|
||||||
|
void omap_dm_timer_enable_autoreload(struct omap_dm_timer *timer);
|
||||||
|
|
||||||
|
void omap_dm_timer_trigger(struct omap_dm_timer *timer);
|
||||||
|
void omap_dm_timer_start(struct omap_dm_timer *timer);
|
||||||
|
void omap_dm_timer_stop(struct omap_dm_timer *timer);
|
||||||
|
|
||||||
|
void omap_dm_timer_set_load(struct omap_dm_timer *timer, unsigned int load);
|
||||||
|
void omap_dm_timer_set_match(struct omap_dm_timer *timer, unsigned int match);
|
||||||
|
|
||||||
|
unsigned int omap_dm_timer_read_status(struct omap_dm_timer *timer);
|
||||||
|
void omap_dm_timer_write_status(struct omap_dm_timer *timer, unsigned int value);
|
||||||
|
|
||||||
|
unsigned int omap_dm_timer_read_counter(struct omap_dm_timer *timer);
|
||||||
|
void omap_dm_timer_reset_counter(struct omap_dm_timer *timer);
|
||||||
|
|
||||||
|
int omap_dm_timers_active(void);
|
||||||
|
|
||||||
|
#endif /* __ASM_ARCH_TIMER_H */
|
244
include/asm-arm/arch-omap/dsp.h
Normal file
244
include/asm-arm/arch-omap/dsp.h
Normal file
|
@ -0,0 +1,244 @@
|
||||||
|
/*
|
||||||
|
* linux/include/asm-arm/arch-omap/dsp.h
|
||||||
|
*
|
||||||
|
* Header for OMAP DSP driver
|
||||||
|
*
|
||||||
|
* Copyright (C) 2002-2005 Nokia Corporation
|
||||||
|
*
|
||||||
|
* Written by Toshihiro Kobayashi <toshihiro.kobayashi@nokia.com>
|
||||||
|
*
|
||||||
|
* This program is free software; you can redistribute it and/or modify
|
||||||
|
* it under the terms of the GNU General Public License as published by
|
||||||
|
* the Free Software Foundation; either version 2 of the License, or
|
||||||
|
* (at your option) any later version.
|
||||||
|
*
|
||||||
|
* This program is distributed in the hope that it will be useful,
|
||||||
|
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||||
|
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||||
|
* GNU General Public License for more details.
|
||||||
|
*
|
||||||
|
* You should have received a copy of the GNU General Public License
|
||||||
|
* along with this program; if not, write to the Free Software
|
||||||
|
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
|
||||||
|
*
|
||||||
|
* 2005/06/01: DSP Gateway version 3.3
|
||||||
|
*/
|
||||||
|
|
||||||
|
#ifndef ASM_ARCH_DSP_H
|
||||||
|
#define ASM_ARCH_DSP_H
|
||||||
|
|
||||||
|
|
||||||
|
/*
|
||||||
|
* for /dev/dspctl/ctl
|
||||||
|
*/
|
||||||
|
#define OMAP_DSP_IOCTL_RESET 1
|
||||||
|
#define OMAP_DSP_IOCTL_RUN 2
|
||||||
|
#define OMAP_DSP_IOCTL_SETRSTVECT 3
|
||||||
|
#define OMAP_DSP_IOCTL_CPU_IDLE 4
|
||||||
|
#define OMAP_DSP_IOCTL_MPUI_WORDSWAP_ON 5
|
||||||
|
#define OMAP_DSP_IOCTL_MPUI_WORDSWAP_OFF 6
|
||||||
|
#define OMAP_DSP_IOCTL_MPUI_BYTESWAP_ON 7
|
||||||
|
#define OMAP_DSP_IOCTL_MPUI_BYTESWAP_OFF 8
|
||||||
|
#define OMAP_DSP_IOCTL_GBL_IDLE 9
|
||||||
|
#define OMAP_DSP_IOCTL_DSPCFG 10
|
||||||
|
#define OMAP_DSP_IOCTL_DSPUNCFG 11
|
||||||
|
#define OMAP_DSP_IOCTL_TASKCNT 12
|
||||||
|
#define OMAP_DSP_IOCTL_POLL 13
|
||||||
|
#define OMAP_DSP_IOCTL_REGMEMR 40
|
||||||
|
#define OMAP_DSP_IOCTL_REGMEMW 41
|
||||||
|
#define OMAP_DSP_IOCTL_REGIOR 42
|
||||||
|
#define OMAP_DSP_IOCTL_REGIOW 43
|
||||||
|
#define OMAP_DSP_IOCTL_GETVAR 44
|
||||||
|
#define OMAP_DSP_IOCTL_SETVAR 45
|
||||||
|
#define OMAP_DSP_IOCTL_RUNLEVEL 50
|
||||||
|
#define OMAP_DSP_IOCTL_SUSPEND 51
|
||||||
|
#define OMAP_DSP_IOCTL_RESUME 52
|
||||||
|
#define OMAP_DSP_IOCTL_FBEN 53
|
||||||
|
#define OMAP_DSP_IOCTL_FBDIS 54
|
||||||
|
#define OMAP_DSP_IOCTL_MBSEND 99
|
||||||
|
|
||||||
|
/*
|
||||||
|
* for taskdev
|
||||||
|
* (ioctls below should be >= 0x10000)
|
||||||
|
*/
|
||||||
|
#define OMAP_DSP_TASK_IOCTL_BFLSH 0x10000
|
||||||
|
#define OMAP_DSP_TASK_IOCTL_SETBSZ 0x10001
|
||||||
|
#define OMAP_DSP_TASK_IOCTL_LOCK 0x10002
|
||||||
|
#define OMAP_DSP_TASK_IOCTL_UNLOCK 0x10003
|
||||||
|
#define OMAP_DSP_TASK_IOCTL_GETNAME 0x10004
|
||||||
|
|
||||||
|
/*
|
||||||
|
* for /dev/dspctl/mem
|
||||||
|
*/
|
||||||
|
#define OMAP_DSP_MEM_IOCTL_EXMAP 1
|
||||||
|
#define OMAP_DSP_MEM_IOCTL_EXUNMAP 2
|
||||||
|
#define OMAP_DSP_MEM_IOCTL_EXMAP_FLUSH 3
|
||||||
|
#define OMAP_DSP_MEM_IOCTL_FBEXPORT 5
|
||||||
|
#define OMAP_DSP_MEM_IOCTL_MMUITACK 7
|
||||||
|
#define OMAP_DSP_MEM_IOCTL_MMUINIT 9
|
||||||
|
#define OMAP_DSP_MEM_IOCTL_KMEM_RESERVE 11
|
||||||
|
#define OMAP_DSP_MEM_IOCTL_KMEM_RELEASE 12
|
||||||
|
|
||||||
|
struct omap_dsp_mapinfo {
|
||||||
|
unsigned long dspadr;
|
||||||
|
unsigned long size;
|
||||||
|
};
|
||||||
|
|
||||||
|
/*
|
||||||
|
* for /dev/dspctl/twch
|
||||||
|
*/
|
||||||
|
#define OMAP_DSP_TWCH_IOCTL_MKDEV 1
|
||||||
|
#define OMAP_DSP_TWCH_IOCTL_RMDEV 2
|
||||||
|
#define OMAP_DSP_TWCH_IOCTL_TADD 11
|
||||||
|
#define OMAP_DSP_TWCH_IOCTL_TDEL 12
|
||||||
|
#define OMAP_DSP_TWCH_IOCTL_TKILL 13
|
||||||
|
|
||||||
|
#define OMAP_DSP_DEVSTATE_NOTASK 0x00000001
|
||||||
|
#define OMAP_DSP_DEVSTATE_ATTACHED 0x00000002
|
||||||
|
#define OMAP_DSP_DEVSTATE_GARBAGE 0x00000004
|
||||||
|
#define OMAP_DSP_DEVSTATE_INVALID 0x00000008
|
||||||
|
#define OMAP_DSP_DEVSTATE_ADDREQ 0x00000100
|
||||||
|
#define OMAP_DSP_DEVSTATE_DELREQ 0x00000200
|
||||||
|
#define OMAP_DSP_DEVSTATE_ADDFAIL 0x00001000
|
||||||
|
#define OMAP_DSP_DEVSTATE_ADDING 0x00010000
|
||||||
|
#define OMAP_DSP_DEVSTATE_DELING 0x00020000
|
||||||
|
#define OMAP_DSP_DEVSTATE_KILLING 0x00040000
|
||||||
|
#define OMAP_DSP_DEVSTATE_STATE_MASK 0x7fffffff
|
||||||
|
#define OMAP_DSP_DEVSTATE_STALE 0x80000000
|
||||||
|
|
||||||
|
struct omap_dsp_taddinfo {
|
||||||
|
unsigned char minor;
|
||||||
|
unsigned long taskadr;
|
||||||
|
};
|
||||||
|
#define OMAP_DSP_TADD_ABORTADR 0xffffffff
|
||||||
|
|
||||||
|
|
||||||
|
/*
|
||||||
|
* error cause definition (for error detection device)
|
||||||
|
*/
|
||||||
|
#define OMAP_DSP_ERRDT_WDT 0x00000001
|
||||||
|
#define OMAP_DSP_ERRDT_MMU 0x00000002
|
||||||
|
|
||||||
|
|
||||||
|
/*
|
||||||
|
* mailbox protocol definitions
|
||||||
|
*/
|
||||||
|
|
||||||
|
struct omap_dsp_mailbox_cmd {
|
||||||
|
unsigned short cmd;
|
||||||
|
unsigned short data;
|
||||||
|
};
|
||||||
|
|
||||||
|
struct omap_dsp_reginfo {
|
||||||
|
unsigned short adr;
|
||||||
|
unsigned short val;
|
||||||
|
};
|
||||||
|
|
||||||
|
struct omap_dsp_varinfo {
|
||||||
|
unsigned char varid;
|
||||||
|
unsigned short val[0];
|
||||||
|
};
|
||||||
|
|
||||||
|
#define OMAP_DSP_MBPROT_REVISION 0x0019
|
||||||
|
|
||||||
|
#define OMAP_DSP_MBCMD_WDSND 0x10
|
||||||
|
#define OMAP_DSP_MBCMD_WDREQ 0x11
|
||||||
|
#define OMAP_DSP_MBCMD_BKSND 0x20
|
||||||
|
#define OMAP_DSP_MBCMD_BKREQ 0x21
|
||||||
|
#define OMAP_DSP_MBCMD_BKYLD 0x23
|
||||||
|
#define OMAP_DSP_MBCMD_BKSNDP 0x24
|
||||||
|
#define OMAP_DSP_MBCMD_BKREQP 0x25
|
||||||
|
#define OMAP_DSP_MBCMD_TCTL 0x30
|
||||||
|
#define OMAP_DSP_MBCMD_TCTLDATA 0x31
|
||||||
|
#define OMAP_DSP_MBCMD_POLL 0x32
|
||||||
|
#define OMAP_DSP_MBCMD_WDT 0x50 /* v3.3: obsolete */
|
||||||
|
#define OMAP_DSP_MBCMD_RUNLEVEL 0x51
|
||||||
|
#define OMAP_DSP_MBCMD_PM 0x52
|
||||||
|
#define OMAP_DSP_MBCMD_SUSPEND 0x53
|
||||||
|
#define OMAP_DSP_MBCMD_KFUNC 0x54
|
||||||
|
#define OMAP_DSP_MBCMD_TCFG 0x60
|
||||||
|
#define OMAP_DSP_MBCMD_TADD 0x62
|
||||||
|
#define OMAP_DSP_MBCMD_TDEL 0x63
|
||||||
|
#define OMAP_DSP_MBCMD_TSTOP 0x65
|
||||||
|
#define OMAP_DSP_MBCMD_DSPCFG 0x70
|
||||||
|
#define OMAP_DSP_MBCMD_REGRW 0x72
|
||||||
|
#define OMAP_DSP_MBCMD_GETVAR 0x74
|
||||||
|
#define OMAP_DSP_MBCMD_SETVAR 0x75
|
||||||
|
#define OMAP_DSP_MBCMD_ERR 0x78
|
||||||
|
#define OMAP_DSP_MBCMD_DBG 0x79
|
||||||
|
|
||||||
|
#define OMAP_DSP_MBCMD_TCTL_TINIT 0x0000
|
||||||
|
#define OMAP_DSP_MBCMD_TCTL_TEN 0x0001
|
||||||
|
#define OMAP_DSP_MBCMD_TCTL_TDIS 0x0002
|
||||||
|
#define OMAP_DSP_MBCMD_TCTL_TCLR 0x0003
|
||||||
|
#define OMAP_DSP_MBCMD_TCTL_TCLR_FORCE 0x0004
|
||||||
|
|
||||||
|
#define OMAP_DSP_MBCMD_RUNLEVEL_USER 0x01
|
||||||
|
#define OMAP_DSP_MBCMD_RUNLEVEL_SUPER 0x0e
|
||||||
|
#define OMAP_DSP_MBCMD_RUNLEVEL_RECOVERY 0x10
|
||||||
|
|
||||||
|
#define OMAP_DSP_MBCMD_PM_DISABLE 0x00
|
||||||
|
#define OMAP_DSP_MBCMD_PM_ENABLE 0x01
|
||||||
|
|
||||||
|
#define OMAP_DSP_MBCMD_KFUNC_FBCTL 0x00
|
||||||
|
|
||||||
|
#define OMAP_DSP_MBCMD_FBCTL_ENABLE 0x0002
|
||||||
|
#define OMAP_DSP_MBCMD_FBCTL_DISABLE 0x0003
|
||||||
|
|
||||||
|
#define OMAP_DSP_MBCMD_TDEL_SAFE 0x0000
|
||||||
|
#define OMAP_DSP_MBCMD_TDEL_KILL 0x0001
|
||||||
|
|
||||||
|
#define OMAP_DSP_MBCMD_DSPCFG_REQ 0x00
|
||||||
|
#define OMAP_DSP_MBCMD_DSPCFG_SYSADRH 0x28
|
||||||
|
#define OMAP_DSP_MBCMD_DSPCFG_SYSADRL 0x29
|
||||||
|
#define OMAP_DSP_MBCMD_DSPCFG_PROTREV 0x70
|
||||||
|
#define OMAP_DSP_MBCMD_DSPCFG_ABORT 0x78
|
||||||
|
#define OMAP_DSP_MBCMD_DSPCFG_LAST 0x80
|
||||||
|
|
||||||
|
#define OMAP_DSP_MBCMD_REGRW_MEMR 0x00
|
||||||
|
#define OMAP_DSP_MBCMD_REGRW_MEMW 0x01
|
||||||
|
#define OMAP_DSP_MBCMD_REGRW_IOR 0x02
|
||||||
|
#define OMAP_DSP_MBCMD_REGRW_IOW 0x03
|
||||||
|
#define OMAP_DSP_MBCMD_REGRW_DATA 0x04
|
||||||
|
|
||||||
|
#define OMAP_DSP_MBCMD_VARID_ICRMASK 0x00
|
||||||
|
#define OMAP_DSP_MBCMD_VARID_LOADINFO 0x01
|
||||||
|
|
||||||
|
#define OMAP_DSP_TTYP_ARCV 0x0001
|
||||||
|
#define OMAP_DSP_TTYP_ASND 0x0002
|
||||||
|
#define OMAP_DSP_TTYP_BKMD 0x0004
|
||||||
|
#define OMAP_DSP_TTYP_BKDM 0x0008
|
||||||
|
#define OMAP_DSP_TTYP_PVMD 0x0010
|
||||||
|
#define OMAP_DSP_TTYP_PVDM 0x0020
|
||||||
|
|
||||||
|
#define OMAP_DSP_EID_BADTID 0x10
|
||||||
|
#define OMAP_DSP_EID_BADTCN 0x11
|
||||||
|
#define OMAP_DSP_EID_BADBID 0x20
|
||||||
|
#define OMAP_DSP_EID_BADCNT 0x21
|
||||||
|
#define OMAP_DSP_EID_NOTLOCKED 0x22
|
||||||
|
#define OMAP_DSP_EID_STVBUF 0x23
|
||||||
|
#define OMAP_DSP_EID_BADADR 0x24
|
||||||
|
#define OMAP_DSP_EID_BADTCTL 0x30
|
||||||
|
#define OMAP_DSP_EID_BADPARAM 0x50
|
||||||
|
#define OMAP_DSP_EID_FATAL 0x58
|
||||||
|
#define OMAP_DSP_EID_NOMEM 0xc0
|
||||||
|
#define OMAP_DSP_EID_NORES 0xc1
|
||||||
|
#define OMAP_DSP_EID_IPBFULL 0xc2
|
||||||
|
#define OMAP_DSP_EID_WDT 0xd0
|
||||||
|
#define OMAP_DSP_EID_TASKNOTRDY 0xe0
|
||||||
|
#define OMAP_DSP_EID_TASKBSY 0xe1
|
||||||
|
#define OMAP_DSP_EID_TASKERR 0xef
|
||||||
|
#define OMAP_DSP_EID_BADCFGTYP 0xf0
|
||||||
|
#define OMAP_DSP_EID_DEBUG 0xf8
|
||||||
|
#define OMAP_DSP_EID_BADSEQ 0xfe
|
||||||
|
#define OMAP_DSP_EID_BADCMD 0xff
|
||||||
|
|
||||||
|
#define OMAP_DSP_TNM_LEN 16
|
||||||
|
|
||||||
|
#define OMAP_DSP_TID_FREE 0xff
|
||||||
|
#define OMAP_DSP_TID_ANON 0xfe
|
||||||
|
|
||||||
|
#define OMAP_DSP_BID_NULL 0xffff
|
||||||
|
#define OMAP_DSP_BID_PVT 0xfffe
|
||||||
|
|
||||||
|
#endif /* ASM_ARCH_DSP_H */
|
37
include/asm-arm/arch-omap/dsp_common.h
Normal file
37
include/asm-arm/arch-omap/dsp_common.h
Normal file
|
@ -0,0 +1,37 @@
|
||||||
|
/*
|
||||||
|
* linux/include/asm-arm/arch-omap/dsp_common.h
|
||||||
|
*
|
||||||
|
* Header for OMAP DSP subsystem control
|
||||||
|
*
|
||||||
|
* Copyright (C) 2004,2005 Nokia Corporation
|
||||||
|
*
|
||||||
|
* Written by Toshihiro Kobayashi <toshihiro.kobayashi@nokia.com>
|
||||||
|
*
|
||||||
|
* This program is free software; you can redistribute it and/or modify
|
||||||
|
* it under the terms of the GNU General Public License as published by
|
||||||
|
* the Free Software Foundation; either version 2 of the License, or
|
||||||
|
* (at your option) any later version.
|
||||||
|
*
|
||||||
|
* This program is distributed in the hope that it will be useful,
|
||||||
|
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||||
|
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||||
|
* GNU General Public License for more details.
|
||||||
|
*
|
||||||
|
* You should have received a copy of the GNU General Public License
|
||||||
|
* along with this program; if not, write to the Free Software
|
||||||
|
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
|
||||||
|
*
|
||||||
|
* 2005/06/03: DSP Gateway version 3.3
|
||||||
|
*/
|
||||||
|
|
||||||
|
#ifndef ASM_ARCH_DSP_COMMON_H
|
||||||
|
#define ASM_ARCH_DSP_COMMON_H
|
||||||
|
|
||||||
|
void omap_dsp_pm_suspend(void);
|
||||||
|
void omap_dsp_pm_resume(void);
|
||||||
|
void omap_dsp_request_mpui(void);
|
||||||
|
void omap_dsp_release_mpui(void);
|
||||||
|
int omap_dsp_request_mem(void);
|
||||||
|
int omap_dsp_release_mem(void);
|
||||||
|
|
||||||
|
#endif /* ASM_ARCH_DSP_COMMON_H */
|
|
@ -8,6 +8,8 @@
|
||||||
* warranty of any kind, whether express or implied.
|
* warranty of any kind, whether express or implied.
|
||||||
*/
|
*/
|
||||||
|
|
||||||
|
#if defined(CONFIG_ARCH_OMAP1)
|
||||||
|
|
||||||
.macro disable_fiq
|
.macro disable_fiq
|
||||||
.endm
|
.endm
|
||||||
|
|
||||||
|
@ -30,3 +32,29 @@
|
||||||
1510:
|
1510:
|
||||||
.endm
|
.endm
|
||||||
|
|
||||||
|
#elif defined(CONFIG_ARCH_OMAP24XX)
|
||||||
|
|
||||||
|
#include <asm/arch/omap24xx.h>
|
||||||
|
|
||||||
|
.macro disable_fiq
|
||||||
|
.endm
|
||||||
|
|
||||||
|
.macro get_irqnr_and_base, irqnr, irqstat, base, tmp
|
||||||
|
ldr \base, =VA_IC_BASE
|
||||||
|
ldr \irqnr, [\base, #0x98] /* IRQ pending reg 1 */
|
||||||
|
cmp \irqnr, #0x0
|
||||||
|
bne 2222f
|
||||||
|
ldr \irqnr, [\base, #0xb8] /* IRQ pending reg 2 */
|
||||||
|
cmp \irqnr, #0x0
|
||||||
|
bne 2222f
|
||||||
|
ldr \irqnr, [\base, #0xd8] /* IRQ pending reg 3 */
|
||||||
|
cmp \irqnr, #0x0
|
||||||
|
2222:
|
||||||
|
ldrne \irqnr, [\base, #IRQ_SIR_IRQ]
|
||||||
|
|
||||||
|
.endm
|
||||||
|
|
||||||
|
.macro irq_prio_table
|
||||||
|
.endm
|
||||||
|
|
||||||
|
#endif
|
||||||
|
|
|
@ -3,7 +3,7 @@
|
||||||
*
|
*
|
||||||
* OMAP GPIO handling defines and functions
|
* OMAP GPIO handling defines and functions
|
||||||
*
|
*
|
||||||
* Copyright (C) 2003 Nokia Corporation
|
* Copyright (C) 2003-2005 Nokia Corporation
|
||||||
*
|
*
|
||||||
* Written by Juha Yrjölä <juha.yrjola@nokia.com>
|
* Written by Juha Yrjölä <juha.yrjola@nokia.com>
|
||||||
*
|
*
|
||||||
|
@ -30,7 +30,23 @@
|
||||||
#include <asm/arch/irqs.h>
|
#include <asm/arch/irqs.h>
|
||||||
#include <asm/io.h>
|
#include <asm/io.h>
|
||||||
|
|
||||||
#define OMAP_MPUIO_BASE 0xfffb5000
|
#define OMAP_MPUIO_BASE (void __iomem *)0xfffb5000
|
||||||
|
|
||||||
|
#ifdef CONFIG_ARCH_OMAP730
|
||||||
|
#define OMAP_MPUIO_INPUT_LATCH 0x00
|
||||||
|
#define OMAP_MPUIO_OUTPUT 0x02
|
||||||
|
#define OMAP_MPUIO_IO_CNTL 0x04
|
||||||
|
#define OMAP_MPUIO_KBR_LATCH 0x08
|
||||||
|
#define OMAP_MPUIO_KBC 0x0a
|
||||||
|
#define OMAP_MPUIO_GPIO_EVENT_MODE 0x0c
|
||||||
|
#define OMAP_MPUIO_GPIO_INT_EDGE 0x0e
|
||||||
|
#define OMAP_MPUIO_KBD_INT 0x10
|
||||||
|
#define OMAP_MPUIO_GPIO_INT 0x12
|
||||||
|
#define OMAP_MPUIO_KBD_MASKIT 0x14
|
||||||
|
#define OMAP_MPUIO_GPIO_MASKIT 0x16
|
||||||
|
#define OMAP_MPUIO_GPIO_DEBOUNCING 0x18
|
||||||
|
#define OMAP_MPUIO_LATCH 0x1a
|
||||||
|
#else
|
||||||
#define OMAP_MPUIO_INPUT_LATCH 0x00
|
#define OMAP_MPUIO_INPUT_LATCH 0x00
|
||||||
#define OMAP_MPUIO_OUTPUT 0x04
|
#define OMAP_MPUIO_OUTPUT 0x04
|
||||||
#define OMAP_MPUIO_IO_CNTL 0x08
|
#define OMAP_MPUIO_IO_CNTL 0x08
|
||||||
|
@ -44,6 +60,7 @@
|
||||||
#define OMAP_MPUIO_GPIO_MASKIT 0x2c
|
#define OMAP_MPUIO_GPIO_MASKIT 0x2c
|
||||||
#define OMAP_MPUIO_GPIO_DEBOUNCING 0x30
|
#define OMAP_MPUIO_GPIO_DEBOUNCING 0x30
|
||||||
#define OMAP_MPUIO_LATCH 0x34
|
#define OMAP_MPUIO_LATCH 0x34
|
||||||
|
#endif
|
||||||
|
|
||||||
#define OMAP_MPUIO(nr) (OMAP_MAX_GPIO_LINES + (nr))
|
#define OMAP_MPUIO(nr) (OMAP_MAX_GPIO_LINES + (nr))
|
||||||
#define OMAP_GPIO_IS_MPUIO(nr) ((nr) >= OMAP_MAX_GPIO_LINES)
|
#define OMAP_GPIO_IS_MPUIO(nr) ((nr) >= OMAP_MAX_GPIO_LINES)
|
||||||
|
@ -52,18 +69,11 @@
|
||||||
IH_MPUIO_BASE + ((nr) & 0x0f) : \
|
IH_MPUIO_BASE + ((nr) & 0x0f) : \
|
||||||
IH_GPIO_BASE + ((nr) & 0x3f))
|
IH_GPIO_BASE + ((nr) & 0x3f))
|
||||||
|
|
||||||
/* For EDGECTRL */
|
|
||||||
#define OMAP_GPIO_NO_EDGE 0x00
|
|
||||||
#define OMAP_GPIO_FALLING_EDGE 0x01
|
|
||||||
#define OMAP_GPIO_RISING_EDGE 0x02
|
|
||||||
#define OMAP_GPIO_BOTH_EDGES 0x03
|
|
||||||
|
|
||||||
extern int omap_gpio_init(void); /* Call from board init only */
|
extern int omap_gpio_init(void); /* Call from board init only */
|
||||||
extern int omap_request_gpio(int gpio);
|
extern int omap_request_gpio(int gpio);
|
||||||
extern void omap_free_gpio(int gpio);
|
extern void omap_free_gpio(int gpio);
|
||||||
extern void omap_set_gpio_direction(int gpio, int is_input);
|
extern void omap_set_gpio_direction(int gpio, int is_input);
|
||||||
extern void omap_set_gpio_dataout(int gpio, int enable);
|
extern void omap_set_gpio_dataout(int gpio, int enable);
|
||||||
extern int omap_get_gpio_datain(int gpio);
|
extern int omap_get_gpio_datain(int gpio);
|
||||||
extern void omap_set_gpio_edge_ctrl(int gpio, int edge);
|
|
||||||
|
|
||||||
#endif
|
#endif
|
||||||
|
|
|
@ -43,6 +43,7 @@
|
||||||
#include <asm/arch/cpu.h>
|
#include <asm/arch/cpu.h>
|
||||||
#endif
|
#endif
|
||||||
#include <asm/arch/io.h>
|
#include <asm/arch/io.h>
|
||||||
|
#include <asm/arch/serial.h>
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* ---------------------------------------------------------------------------
|
* ---------------------------------------------------------------------------
|
||||||
|
@ -89,11 +90,12 @@
|
||||||
/* DPLL control registers */
|
/* DPLL control registers */
|
||||||
#define DPLL_CTL (0xfffecf00)
|
#define DPLL_CTL (0xfffecf00)
|
||||||
|
|
||||||
/* DSP clock control */
|
/* DSP clock control. Must use __raw_readw() and __raw_writew() with these */
|
||||||
#define DSP_CONFIG_REG_BASE (0xe1008000)
|
#define DSP_CONFIG_REG_BASE (0xe1008000)
|
||||||
#define DSP_CKCTL (DSP_CONFIG_REG_BASE + 0x0)
|
#define DSP_CKCTL (DSP_CONFIG_REG_BASE + 0x0)
|
||||||
#define DSP_IDLECT1 (DSP_CONFIG_REG_BASE + 0x4)
|
#define DSP_IDLECT1 (DSP_CONFIG_REG_BASE + 0x4)
|
||||||
#define DSP_IDLECT2 (DSP_CONFIG_REG_BASE + 0x8)
|
#define DSP_IDLECT2 (DSP_CONFIG_REG_BASE + 0x8)
|
||||||
|
#define DSP_RSTCT2 (DSP_CONFIG_REG_BASE + 0x14)
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* ---------------------------------------------------------------------------
|
* ---------------------------------------------------------------------------
|
||||||
|
@ -142,6 +144,13 @@
|
||||||
* Interrupts
|
* Interrupts
|
||||||
* ---------------------------------------------------------------------------
|
* ---------------------------------------------------------------------------
|
||||||
*/
|
*/
|
||||||
|
#ifdef CONFIG_ARCH_OMAP1
|
||||||
|
|
||||||
|
/*
|
||||||
|
* XXX: These probably want to be moved to arch/arm/mach-omap/omap1/irq.c
|
||||||
|
* or something similar.. -- PFM.
|
||||||
|
*/
|
||||||
|
|
||||||
#define OMAP_IH1_BASE 0xfffecb00
|
#define OMAP_IH1_BASE 0xfffecb00
|
||||||
#define OMAP_IH2_BASE 0xfffe0000
|
#define OMAP_IH2_BASE 0xfffe0000
|
||||||
|
|
||||||
|
@ -170,6 +179,8 @@
|
||||||
#define IRQ_ILR0_REG_OFFSET 0x1c
|
#define IRQ_ILR0_REG_OFFSET 0x1c
|
||||||
#define IRQ_GMR_REG_OFFSET 0xa0
|
#define IRQ_GMR_REG_OFFSET 0xa0
|
||||||
|
|
||||||
|
#endif
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* ----------------------------------------------------------------------------
|
* ----------------------------------------------------------------------------
|
||||||
* System control registers
|
* System control registers
|
||||||
|
@ -258,26 +269,6 @@
|
||||||
|
|
||||||
#ifndef __ASSEMBLER__
|
#ifndef __ASSEMBLER__
|
||||||
|
|
||||||
/*
|
|
||||||
* ---------------------------------------------------------------------------
|
|
||||||
* Serial ports
|
|
||||||
* ---------------------------------------------------------------------------
|
|
||||||
*/
|
|
||||||
#define OMAP_UART1_BASE (unsigned char *)0xfffb0000
|
|
||||||
#define OMAP_UART2_BASE (unsigned char *)0xfffb0800
|
|
||||||
#define OMAP_UART3_BASE (unsigned char *)0xfffb9800
|
|
||||||
#define OMAP_MAX_NR_PORTS 3
|
|
||||||
#define OMAP1510_BASE_BAUD (12000000/16)
|
|
||||||
#define OMAP16XX_BASE_BAUD (48000000/16)
|
|
||||||
|
|
||||||
#define is_omap_port(p) ({int __ret = 0; \
|
|
||||||
if (p == IO_ADDRESS(OMAP_UART1_BASE) || \
|
|
||||||
p == IO_ADDRESS(OMAP_UART2_BASE) || \
|
|
||||||
p == IO_ADDRESS(OMAP_UART3_BASE)) \
|
|
||||||
__ret = 1; \
|
|
||||||
__ret; \
|
|
||||||
})
|
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* ---------------------------------------------------------------------------
|
* ---------------------------------------------------------------------------
|
||||||
* Processor specific defines
|
* Processor specific defines
|
||||||
|
@ -286,6 +277,11 @@
|
||||||
|
|
||||||
#include "omap730.h"
|
#include "omap730.h"
|
||||||
#include "omap1510.h"
|
#include "omap1510.h"
|
||||||
|
|
||||||
|
#ifdef CONFIG_ARCH_OMAP24XX
|
||||||
|
#include "omap24xx.h"
|
||||||
|
#endif
|
||||||
|
|
||||||
#include "omap16xx.h"
|
#include "omap16xx.h"
|
||||||
|
|
||||||
/*
|
/*
|
||||||
|
@ -312,7 +308,6 @@
|
||||||
|
|
||||||
#ifdef CONFIG_MACH_OMAP_H4
|
#ifdef CONFIG_MACH_OMAP_H4
|
||||||
#include "board-h4.h"
|
#include "board-h4.h"
|
||||||
#error "Support for H4 board not yet implemented."
|
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
#ifdef CONFIG_MACH_OMAP_OSK
|
#ifdef CONFIG_MACH_OMAP_OSK
|
||||||
|
|
|
@ -49,16 +49,24 @@
|
||||||
* I/O mapping
|
* I/O mapping
|
||||||
* ----------------------------------------------------------------------------
|
* ----------------------------------------------------------------------------
|
||||||
*/
|
*/
|
||||||
#define IO_PHYS 0xFFFB0000
|
|
||||||
#define IO_OFFSET 0x01000000 /* Virtual IO = 0xfefb0000 */
|
|
||||||
#define IO_VIRT (IO_PHYS - IO_OFFSET)
|
|
||||||
#define IO_SIZE 0x40000
|
|
||||||
#define IO_ADDRESS(x) ((x) - IO_OFFSET)
|
|
||||||
|
|
||||||
#define PCIO_BASE 0
|
#if defined(CONFIG_ARCH_OMAP1)
|
||||||
|
#define IO_PHYS 0xFFFB0000
|
||||||
|
#define IO_OFFSET -0x01000000 /* Virtual IO = 0xfefb0000 */
|
||||||
|
#define IO_SIZE 0x40000
|
||||||
|
|
||||||
#define io_p2v(x) ((x) - IO_OFFSET)
|
#elif defined(CONFIG_ARCH_OMAP2)
|
||||||
#define io_v2p(x) ((x) + IO_OFFSET)
|
#define IO_PHYS 0x48000000 /* L4 peripherals; other stuff has to be mapped *
|
||||||
|
* manually. */
|
||||||
|
#define IO_OFFSET 0x90000000 /* Virtual IO = 0xd8000000 */
|
||||||
|
#define IO_SIZE 0x08000000
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#define IO_VIRT (IO_PHYS + IO_OFFSET)
|
||||||
|
#define IO_ADDRESS(x) ((x) + IO_OFFSET)
|
||||||
|
#define PCIO_BASE 0
|
||||||
|
#define io_p2v(x) ((x) + IO_OFFSET)
|
||||||
|
#define io_v2p(x) ((x) - IO_OFFSET)
|
||||||
|
|
||||||
#ifndef __ASSEMBLER__
|
#ifndef __ASSEMBLER__
|
||||||
|
|
||||||
|
@ -96,6 +104,8 @@ typedef struct { volatile u32 offset[4096]; } __regbase32;
|
||||||
->offset[((vaddr)&4095)>>2]
|
->offset[((vaddr)&4095)>>2]
|
||||||
#define __REG32(paddr) __REGV32(io_p2v(paddr))
|
#define __REG32(paddr) __REGV32(io_p2v(paddr))
|
||||||
|
|
||||||
|
extern void omap_map_common_io(void);
|
||||||
|
|
||||||
#else
|
#else
|
||||||
|
|
||||||
#define __REG8(paddr) io_p2v(paddr)
|
#define __REG8(paddr) io_p2v(paddr)
|
||||||
|
|
|
@ -135,7 +135,6 @@
|
||||||
/*
|
/*
|
||||||
* OMAP-1510 specific IRQ numbers for interrupt handler 2
|
* OMAP-1510 specific IRQ numbers for interrupt handler 2
|
||||||
*/
|
*/
|
||||||
#define INT_1510_OS_32kHz_TIMER (22 + IH2_BASE)
|
|
||||||
#define INT_1510_COM_SPI_RO (31 + IH2_BASE)
|
#define INT_1510_COM_SPI_RO (31 + IH2_BASE)
|
||||||
|
|
||||||
/*
|
/*
|
||||||
|
@ -232,6 +231,11 @@
|
||||||
#define INT_730_DMA_CH15 (62 + IH2_BASE)
|
#define INT_730_DMA_CH15 (62 + IH2_BASE)
|
||||||
#define INT_730_NAND (63 + IH2_BASE)
|
#define INT_730_NAND (63 + IH2_BASE)
|
||||||
|
|
||||||
|
#define INT_24XX_GPIO_BANK1 29
|
||||||
|
#define INT_24XX_GPIO_BANK2 30
|
||||||
|
#define INT_24XX_GPIO_BANK3 31
|
||||||
|
#define INT_24XX_GPIO_BANK4 32
|
||||||
|
|
||||||
/* Max. 128 level 2 IRQs (OMAP1610), 192 GPIOs (OMAP730) and
|
/* Max. 128 level 2 IRQs (OMAP1610), 192 GPIOs (OMAP730) and
|
||||||
* 16 MPUIO lines */
|
* 16 MPUIO lines */
|
||||||
#define OMAP_MAX_GPIO_LINES 192
|
#define OMAP_MAX_GPIO_LINES 192
|
||||||
|
|
|
@ -36,12 +36,11 @@
|
||||||
/*
|
/*
|
||||||
* Physical DRAM offset.
|
* Physical DRAM offset.
|
||||||
*/
|
*/
|
||||||
|
#if defined(CONFIG_ARCH_OMAP1)
|
||||||
#define PHYS_OFFSET (0x10000000UL)
|
#define PHYS_OFFSET (0x10000000UL)
|
||||||
|
#elif defined(CONFIG_ARCH_OMAP2)
|
||||||
/*
|
#define PHYS_OFFSET (0x80000000UL)
|
||||||
* OMAP-1510 Local Bus address offset
|
#endif
|
||||||
*/
|
|
||||||
#define OMAP1510_LB_OFFSET (0x30000000UL)
|
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* Conversion between SDRAM and fake PCI bus, used by USB
|
* Conversion between SDRAM and fake PCI bus, used by USB
|
||||||
|
@ -64,6 +63,11 @@
|
||||||
*/
|
*/
|
||||||
#ifdef CONFIG_ARCH_OMAP1510
|
#ifdef CONFIG_ARCH_OMAP1510
|
||||||
|
|
||||||
|
/*
|
||||||
|
* OMAP-1510 Local Bus address offset
|
||||||
|
*/
|
||||||
|
#define OMAP1510_LB_OFFSET (0x30000000UL)
|
||||||
|
|
||||||
#define virt_to_lbus(x) ((x) - PAGE_OFFSET + OMAP1510_LB_OFFSET)
|
#define virt_to_lbus(x) ((x) - PAGE_OFFSET + OMAP1510_LB_OFFSET)
|
||||||
#define lbus_to_virt(x) ((x) - OMAP1510_LB_OFFSET + PAGE_OFFSET)
|
#define lbus_to_virt(x) ((x) - OMAP1510_LB_OFFSET + PAGE_OFFSET)
|
||||||
#define is_lbus_device(dev) (cpu_is_omap1510() && dev && (strncmp(dev->bus_id, "ohci", 4) == 0))
|
#define is_lbus_device(dev) (cpu_is_omap1510() && dev && (strncmp(dev->bus_id, "ohci", 4) == 0))
|
||||||
|
|
61
include/asm-arm/arch-omap/mtd-xip.h
Normal file
61
include/asm-arm/arch-omap/mtd-xip.h
Normal file
|
@ -0,0 +1,61 @@
|
||||||
|
/*
|
||||||
|
* MTD primitives for XIP support. Architecture specific functions.
|
||||||
|
*
|
||||||
|
* Do not include this file directly. It's included from linux/mtd/xip.h
|
||||||
|
*
|
||||||
|
* Author: Vladimir Barinov <vbarinov@ru.mvista.com>
|
||||||
|
*
|
||||||
|
* (c) 2005 MontaVista Software, Inc. This file is licensed under the
|
||||||
|
* terms of the GNU General Public License version 2. This program is
|
||||||
|
* licensed "as is" without any warranty of any kind, whether express or
|
||||||
|
* implied.
|
||||||
|
*/
|
||||||
|
|
||||||
|
#ifndef __ARCH_OMAP_MTD_XIP_H__
|
||||||
|
#define __ARCH_OMAP_MTD_XIP_H__
|
||||||
|
|
||||||
|
#include <asm/hardware.h>
|
||||||
|
#define OMAP_MPU_TIMER_BASE (0xfffec500)
|
||||||
|
#define OMAP_MPU_TIMER_OFFSET 0x100
|
||||||
|
|
||||||
|
typedef struct {
|
||||||
|
u32 cntl; /* CNTL_TIMER, R/W */
|
||||||
|
u32 load_tim; /* LOAD_TIM, W */
|
||||||
|
u32 read_tim; /* READ_TIM, R */
|
||||||
|
} xip_omap_mpu_timer_regs_t;
|
||||||
|
|
||||||
|
#define xip_omap_mpu_timer_base(n) \
|
||||||
|
((volatile xip_omap_mpu_timer_regs_t*)IO_ADDRESS(OMAP_MPU_TIMER_BASE + \
|
||||||
|
(n)*OMAP_MPU_TIMER_OFFSET))
|
||||||
|
|
||||||
|
static inline unsigned long xip_omap_mpu_timer_read(int nr)
|
||||||
|
{
|
||||||
|
volatile xip_omap_mpu_timer_regs_t* timer = xip_omap_mpu_timer_base(nr);
|
||||||
|
return timer->read_tim;
|
||||||
|
}
|
||||||
|
|
||||||
|
#define xip_irqpending() \
|
||||||
|
(omap_readl(OMAP_IH1_ITR) & ~omap_readl(OMAP_IH1_MIR))
|
||||||
|
#define xip_currtime() (~xip_omap_mpu_timer_read(0))
|
||||||
|
|
||||||
|
/*
|
||||||
|
* It's permitted to do approxmation for xip_elapsed_since macro
|
||||||
|
* (see linux/mtd/xip.h)
|
||||||
|
*/
|
||||||
|
|
||||||
|
#ifdef CONFIG_MACH_OMAP_PERSEUS2
|
||||||
|
#define xip_elapsed_since(x) (signed)((~xip_omap_mpu_timer_read(0) - (x)) / 7)
|
||||||
|
#else
|
||||||
|
#define xip_elapsed_since(x) (signed)((~xip_omap_mpu_timer_read(0) - (x)) / 6)
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/*
|
||||||
|
* xip_cpu_idle() is used when waiting for a delay equal or larger than
|
||||||
|
* the system timer tick period. This should put the CPU into idle mode
|
||||||
|
* to save power and to be woken up only when some interrupts are pending.
|
||||||
|
* As above, this should not rely upon standard kernel code.
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define xip_cpu_idle() asm volatile ("mcr p15, 0, %0, c7, c0, 4" :: "r" (1))
|
||||||
|
|
||||||
|
#endif /* __ARCH_OMAP_MTD_XIP_H__ */
|
|
@ -185,6 +185,7 @@ typedef enum {
|
||||||
|
|
||||||
/* MPUIO */
|
/* MPUIO */
|
||||||
MPUIO2,
|
MPUIO2,
|
||||||
|
N15_1610_MPUIO2,
|
||||||
MPUIO4,
|
MPUIO4,
|
||||||
MPUIO5,
|
MPUIO5,
|
||||||
T20_1610_MPUIO5,
|
T20_1610_MPUIO5,
|
||||||
|
@ -210,6 +211,7 @@ typedef enum {
|
||||||
|
|
||||||
/* Misc ballouts */
|
/* Misc ballouts */
|
||||||
BALLOUT_V8_ARMIO3,
|
BALLOUT_V8_ARMIO3,
|
||||||
|
N20_HDQ,
|
||||||
|
|
||||||
/* OMAP-1610 MMC2 */
|
/* OMAP-1610 MMC2 */
|
||||||
W8_1610_MMC2_DAT0,
|
W8_1610_MMC2_DAT0,
|
||||||
|
@ -235,6 +237,7 @@ typedef enum {
|
||||||
P20_1610_GPIO4,
|
P20_1610_GPIO4,
|
||||||
V9_1610_GPIO7,
|
V9_1610_GPIO7,
|
||||||
W8_1610_GPIO9,
|
W8_1610_GPIO9,
|
||||||
|
N20_1610_GPIO11,
|
||||||
N19_1610_GPIO13,
|
N19_1610_GPIO13,
|
||||||
P10_1610_GPIO22,
|
P10_1610_GPIO22,
|
||||||
V5_1610_GPIO24,
|
V5_1610_GPIO24,
|
||||||
|
@ -250,7 +253,7 @@ typedef enum {
|
||||||
U18_1610_UWIRE_SDI,
|
U18_1610_UWIRE_SDI,
|
||||||
W21_1610_UWIRE_SDO,
|
W21_1610_UWIRE_SDO,
|
||||||
N14_1610_UWIRE_CS0,
|
N14_1610_UWIRE_CS0,
|
||||||
P15_1610_UWIRE_CS0,
|
P15_1610_UWIRE_CS3,
|
||||||
N15_1610_UWIRE_CS1,
|
N15_1610_UWIRE_CS1,
|
||||||
|
|
||||||
/* OMAP-1610 Flash */
|
/* OMAP-1610 Flash */
|
||||||
|
@ -411,7 +414,8 @@ MUX_CFG("N21_1710_GPIO14", 6, 9, 0, 1, 1, 1, 1, 1, 1)
|
||||||
MUX_CFG("W15_1710_GPIO40", 9, 27, 7, 2, 5, 1, 2, 1, 1)
|
MUX_CFG("W15_1710_GPIO40", 9, 27, 7, 2, 5, 1, 2, 1, 1)
|
||||||
|
|
||||||
/* MPUIO */
|
/* MPUIO */
|
||||||
MUX_CFG("MPUIO2", 7, 18, 0, 1, 1, 1, NA, 0, 1)
|
MUX_CFG("MPUIO2", 7, 18, 0, 1, 14, 1, NA, 0, 1)
|
||||||
|
MUX_CFG("N15_1610_MPUIO2", 7, 18, 0, 1, 14, 1, 1, 0, 1)
|
||||||
MUX_CFG("MPUIO4", 7, 15, 0, 1, 13, 1, NA, 0, 1)
|
MUX_CFG("MPUIO4", 7, 15, 0, 1, 13, 1, NA, 0, 1)
|
||||||
MUX_CFG("MPUIO5", 7, 12, 0, 1, 12, 1, NA, 0, 1)
|
MUX_CFG("MPUIO5", 7, 12, 0, 1, 12, 1, NA, 0, 1)
|
||||||
|
|
||||||
|
@ -438,6 +442,7 @@ MUX_CFG("MCBSP3_CLKX", 9, 3, 1, 1, 29, 0, NA, 0, 1)
|
||||||
|
|
||||||
/* Misc ballouts */
|
/* Misc ballouts */
|
||||||
MUX_CFG("BALLOUT_V8_ARMIO3", B, 18, 0, 2, 25, 1, NA, 0, 1)
|
MUX_CFG("BALLOUT_V8_ARMIO3", B, 18, 0, 2, 25, 1, NA, 0, 1)
|
||||||
|
MUX_CFG("N20_HDQ", 6, 18, 1, 1, 4, 0, 1, 4, 0)
|
||||||
|
|
||||||
/* OMAP-1610 MMC2 */
|
/* OMAP-1610 MMC2 */
|
||||||
MUX_CFG("W8_1610_MMC2_DAT0", B, 21, 6, 2, 23, 1, 2, 1, 1)
|
MUX_CFG("W8_1610_MMC2_DAT0", B, 21, 6, 2, 23, 1, 2, 1, 1)
|
||||||
|
@ -463,6 +468,7 @@ MUX_CFG("J18_1610_ETM_D7", 5, 27, 1, 0, 19, 0, 0, 0, 1)
|
||||||
MUX_CFG("P20_1610_GPIO4", 6, 27, 0, 1, 7, 0, 1, 1, 1)
|
MUX_CFG("P20_1610_GPIO4", 6, 27, 0, 1, 7, 0, 1, 1, 1)
|
||||||
MUX_CFG("V9_1610_GPIO7", B, 12, 1, 2, 20, 0, 2, 1, 1)
|
MUX_CFG("V9_1610_GPIO7", B, 12, 1, 2, 20, 0, 2, 1, 1)
|
||||||
MUX_CFG("W8_1610_GPIO9", B, 21, 0, 2, 23, 0, 2, 1, 1)
|
MUX_CFG("W8_1610_GPIO9", B, 21, 0, 2, 23, 0, 2, 1, 1)
|
||||||
|
MUX_CFG("N20_1610_GPIO11", 6, 18, 0, 1, 4, 0, 1, 1, 1)
|
||||||
MUX_CFG("N19_1610_GPIO13", 6, 12, 0, 1, 2, 0, 1, 1, 1)
|
MUX_CFG("N19_1610_GPIO13", 6, 12, 0, 1, 2, 0, 1, 1, 1)
|
||||||
MUX_CFG("P10_1610_GPIO22", C, 0, 7, 2, 26, 0, 2, 1, 1)
|
MUX_CFG("P10_1610_GPIO22", C, 0, 7, 2, 26, 0, 2, 1, 1)
|
||||||
MUX_CFG("V5_1610_GPIO24", B, 15, 7, 2, 21, 0, 2, 1, 1)
|
MUX_CFG("V5_1610_GPIO24", B, 15, 7, 2, 21, 0, 2, 1, 1)
|
||||||
|
|
|
@ -36,10 +36,6 @@
|
||||||
|
|
||||||
/* Syntax: XX_BASE = Virtual base address, XX_START = Physical base address */
|
/* Syntax: XX_BASE = Virtual base address, XX_START = Physical base address */
|
||||||
|
|
||||||
#define OMAP1510_SRAM_BASE 0xD0000000
|
|
||||||
#define OMAP1510_SRAM_SIZE (SZ_128K + SZ_64K)
|
|
||||||
#define OMAP1510_SRAM_START 0x20000000
|
|
||||||
|
|
||||||
#define OMAP1510_DSP_BASE 0xE0000000
|
#define OMAP1510_DSP_BASE 0xE0000000
|
||||||
#define OMAP1510_DSP_SIZE 0x28000
|
#define OMAP1510_DSP_SIZE 0x28000
|
||||||
#define OMAP1510_DSP_START 0xE0000000
|
#define OMAP1510_DSP_START 0xE0000000
|
||||||
|
@ -48,14 +44,5 @@
|
||||||
#define OMAP1510_DSPREG_SIZE SZ_128K
|
#define OMAP1510_DSPREG_SIZE SZ_128K
|
||||||
#define OMAP1510_DSPREG_START 0xE1000000
|
#define OMAP1510_DSPREG_START 0xE1000000
|
||||||
|
|
||||||
/*
|
|
||||||
* ----------------------------------------------------------------------------
|
|
||||||
* Memory used by power management
|
|
||||||
* ----------------------------------------------------------------------------
|
|
||||||
*/
|
|
||||||
|
|
||||||
#define OMAP1510_SRAM_IDLE_SUSPEND (OMAP1510_SRAM_BASE + OMAP1510_SRAM_SIZE - 0x200)
|
|
||||||
#define OMAP1510_SRAM_API_SUSPEND (OMAP1510_SRAM_IDLE_SUSPEND + 0x100)
|
|
||||||
|
|
||||||
#endif /* __ASM_ARCH_OMAP1510_H */
|
#endif /* __ASM_ARCH_OMAP1510_H */
|
||||||
|
|
||||||
|
|
|
@ -36,11 +36,6 @@
|
||||||
|
|
||||||
/* Syntax: XX_BASE = Virtual base address, XX_START = Physical base address */
|
/* Syntax: XX_BASE = Virtual base address, XX_START = Physical base address */
|
||||||
|
|
||||||
#define OMAP16XX_SRAM_BASE 0xD0000000
|
|
||||||
#define OMAP1610_SRAM_SIZE (SZ_16K)
|
|
||||||
#define OMAP5912_SRAM_SIZE 0x3E800
|
|
||||||
#define OMAP16XX_SRAM_START 0x20000000
|
|
||||||
|
|
||||||
#define OMAP16XX_DSP_BASE 0xE0000000
|
#define OMAP16XX_DSP_BASE 0xE0000000
|
||||||
#define OMAP16XX_DSP_SIZE 0x28000
|
#define OMAP16XX_DSP_SIZE 0x28000
|
||||||
#define OMAP16XX_DSP_START 0xE0000000
|
#define OMAP16XX_DSP_START 0xE0000000
|
||||||
|
@ -49,17 +44,6 @@
|
||||||
#define OMAP16XX_DSPREG_SIZE SZ_128K
|
#define OMAP16XX_DSPREG_SIZE SZ_128K
|
||||||
#define OMAP16XX_DSPREG_START 0xE1000000
|
#define OMAP16XX_DSPREG_START 0xE1000000
|
||||||
|
|
||||||
/*
|
|
||||||
* ----------------------------------------------------------------------------
|
|
||||||
* Memory used by power management
|
|
||||||
* ----------------------------------------------------------------------------
|
|
||||||
*/
|
|
||||||
|
|
||||||
#define OMAP1610_SRAM_IDLE_SUSPEND (OMAP16XX_SRAM_BASE + OMAP1610_SRAM_SIZE - 0x200)
|
|
||||||
#define OMAP1610_SRAM_API_SUSPEND (OMAP1610_SRAM_IDLE_SUSPEND + 0x100)
|
|
||||||
#define OMAP5912_SRAM_IDLE_SUSPEND (OMAP16XX_SRAM_BASE + OMAP5912_SRAM_SIZE - 0x200)
|
|
||||||
#define OMAP5912_SRAM_API_SUSPEND (OMAP5912_SRAM_IDLE_SUSPEND + 0x100)
|
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* ---------------------------------------------------------------------------
|
* ---------------------------------------------------------------------------
|
||||||
* Interrupts
|
* Interrupts
|
||||||
|
|
15
include/asm-arm/arch-omap/omap24xx.h
Normal file
15
include/asm-arm/arch-omap/omap24xx.h
Normal file
|
@ -0,0 +1,15 @@
|
||||||
|
#ifndef __ASM_ARCH_OMAP24XX_H
|
||||||
|
#define __ASM_ARCH_OMAP24XX_H
|
||||||
|
|
||||||
|
#define OMAP24XX_L4_IO_BASE 0x48000000
|
||||||
|
|
||||||
|
/* interrupt controller */
|
||||||
|
#define OMAP24XX_IC_BASE (OMAP24XX_L4_IO_BASE + 0xfe000)
|
||||||
|
#define VA_IC_BASE IO_ADDRESS(OMAP24XX_IC_BASE)
|
||||||
|
|
||||||
|
#define OMAP24XX_IVA_INTC_BASE 0x40000000
|
||||||
|
|
||||||
|
#define IRQ_SIR_IRQ 0x0040
|
||||||
|
|
||||||
|
#endif /* __ASM_ARCH_OMAP24XX_H */
|
||||||
|
|
|
@ -36,10 +36,6 @@
|
||||||
|
|
||||||
/* Syntax: XX_BASE = Virtual base address, XX_START = Physical base address */
|
/* Syntax: XX_BASE = Virtual base address, XX_START = Physical base address */
|
||||||
|
|
||||||
#define OMAP730_SRAM_BASE 0xD0000000
|
|
||||||
#define OMAP730_SRAM_SIZE (SZ_128K + SZ_64K + SZ_8K)
|
|
||||||
#define OMAP730_SRAM_START 0x20000000
|
|
||||||
|
|
||||||
#define OMAP730_DSP_BASE 0xE0000000
|
#define OMAP730_DSP_BASE 0xE0000000
|
||||||
#define OMAP730_DSP_SIZE 0x50000
|
#define OMAP730_DSP_SIZE 0x50000
|
||||||
#define OMAP730_DSP_START 0xE0000000
|
#define OMAP730_DSP_START 0xE0000000
|
||||||
|
|
|
@ -61,7 +61,10 @@
|
||||||
#define PER_EN 0x1
|
#define PER_EN 0x1
|
||||||
|
|
||||||
#define CPU_SUSPEND_SIZE 200
|
#define CPU_SUSPEND_SIZE 200
|
||||||
#define ULPD_LOW_POWER_EN 0x0001
|
#define ULPD_LOW_PWR_EN 0x0001
|
||||||
|
#define ULPD_DEEP_SLEEP_TRANSITION_EN 0x0010
|
||||||
|
#define ULPD_SETUP_ANALOG_CELL_3_VAL 0
|
||||||
|
#define ULPD_POWER_CTRL_REG_VAL 0x0219
|
||||||
|
|
||||||
#define DSP_IDLE_DELAY 10
|
#define DSP_IDLE_DELAY 10
|
||||||
#define DSP_IDLE 0x0040
|
#define DSP_IDLE 0x0040
|
||||||
|
@ -86,46 +89,35 @@
|
||||||
#define OMAP1510_BIG_SLEEP_REQUEST 0x0cc5
|
#define OMAP1510_BIG_SLEEP_REQUEST 0x0cc5
|
||||||
#define OMAP1510_IDLE_LOOP_REQUEST 0x0c00
|
#define OMAP1510_IDLE_LOOP_REQUEST 0x0c00
|
||||||
#define OMAP1510_IDLE_CLOCK_DOMAINS 0x2
|
#define OMAP1510_IDLE_CLOCK_DOMAINS 0x2
|
||||||
#define OMAP1510_ULPD_LOW_POWER_REQ 0x0001
|
|
||||||
|
|
||||||
#define OMAP1610_DEEP_SLEEP_REQUEST 0x17c7
|
/* Both big sleep and deep sleep use same values. Difference is in ULPD. */
|
||||||
#define OMAP1610_BIG_SLEEP_REQUEST TBD
|
#define OMAP1610_IDLECT1_SLEEP_VAL 0x13c7
|
||||||
|
#define OMAP1610_IDLECT2_SLEEP_VAL 0x09c7
|
||||||
|
#define OMAP1610_IDLECT3_VAL 0x3f
|
||||||
|
#define OMAP1610_IDLECT3_SLEEP_ORMASK 0x2c
|
||||||
|
#define OMAP1610_IDLECT3 0xfffece24
|
||||||
#define OMAP1610_IDLE_LOOP_REQUEST 0x0400
|
#define OMAP1610_IDLE_LOOP_REQUEST 0x0400
|
||||||
#define OMAP1610_IDLE_CLOCK_DOMAINS 0x09c7
|
|
||||||
#define OMAP1610_ULPD_LOW_POWER_REQ 0x3
|
|
||||||
|
|
||||||
#ifndef OMAP1510_SRAM_IDLE_SUSPEND
|
|
||||||
#define OMAP1510_SRAM_IDLE_SUSPEND 0
|
|
||||||
#endif
|
|
||||||
#ifndef OMAP1610_SRAM_IDLE_SUSPEND
|
|
||||||
#define OMAP1610_SRAM_IDLE_SUSPEND 0
|
|
||||||
#endif
|
|
||||||
#ifndef OMAP5912_SRAM_IDLE_SUSPEND
|
|
||||||
#define OMAP5912_SRAM_IDLE_SUSPEND 0
|
|
||||||
#endif
|
|
||||||
|
|
||||||
#ifndef OMAP1510_SRAM_API_SUSPEND
|
|
||||||
#define OMAP1510_SRAM_API_SUSPEND 0
|
|
||||||
#endif
|
|
||||||
#ifndef OMAP1610_SRAM_API_SUSPEND
|
|
||||||
#define OMAP1610_SRAM_API_SUSPEND 0
|
|
||||||
#endif
|
|
||||||
#ifndef OMAP5912_SRAM_API_SUSPEND
|
|
||||||
#define OMAP5912_SRAM_API_SUSPEND 0
|
|
||||||
#endif
|
|
||||||
|
|
||||||
#if !defined(CONFIG_ARCH_OMAP1510) && \
|
#if !defined(CONFIG_ARCH_OMAP1510) && \
|
||||||
!defined(CONFIG_ARCH_OMAP16XX)
|
!defined(CONFIG_ARCH_OMAP16XX) && \
|
||||||
|
!defined(CONFIG_ARCH_OMAP24XX)
|
||||||
#error "Power management for this processor not implemented yet"
|
#error "Power management for this processor not implemented yet"
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
#ifndef __ASSEMBLER__
|
#ifndef __ASSEMBLER__
|
||||||
extern void omap_pm_idle(void);
|
extern void omap_pm_idle(void);
|
||||||
extern void omap_pm_suspend(void);
|
extern void omap_pm_suspend(void);
|
||||||
extern int omap1510_cpu_suspend(unsigned short, unsigned short);
|
extern void omap1510_cpu_suspend(unsigned short, unsigned short);
|
||||||
extern int omap1610_cpu_suspend(unsigned short, unsigned short);
|
extern void omap1610_cpu_suspend(unsigned short, unsigned short);
|
||||||
extern int omap1510_idle_loop_suspend(void);
|
extern void omap1510_idle_loop_suspend(void);
|
||||||
extern int omap1610_idle_loop_suspend(void);
|
extern void omap1610_idle_loop_suspend(void);
|
||||||
|
|
||||||
|
#ifdef CONFIG_OMAP_SERIAL_WAKE
|
||||||
|
extern void omap_serial_wake_trigger(int enable);
|
||||||
|
#else
|
||||||
|
#define omap_serial_wake_trigger(x) {}
|
||||||
|
#endif /* CONFIG_OMAP_SERIAL_WAKE */
|
||||||
|
|
||||||
extern unsigned int omap1510_cpu_suspend_sz;
|
extern unsigned int omap1510_cpu_suspend_sz;
|
||||||
extern unsigned int omap1510_idle_loop_suspend_sz;
|
extern unsigned int omap1510_idle_loop_suspend_sz;
|
||||||
extern unsigned int omap1610_cpu_suspend_sz;
|
extern unsigned int omap1610_cpu_suspend_sz;
|
||||||
|
@ -161,6 +153,7 @@ enum arm_save_state {
|
||||||
ARM_SLEEP_SAVE_ARM_CKCTL,
|
ARM_SLEEP_SAVE_ARM_CKCTL,
|
||||||
ARM_SLEEP_SAVE_ARM_IDLECT1,
|
ARM_SLEEP_SAVE_ARM_IDLECT1,
|
||||||
ARM_SLEEP_SAVE_ARM_IDLECT2,
|
ARM_SLEEP_SAVE_ARM_IDLECT2,
|
||||||
|
ARM_SLEEP_SAVE_ARM_IDLECT3,
|
||||||
ARM_SLEEP_SAVE_ARM_EWUPCT,
|
ARM_SLEEP_SAVE_ARM_EWUPCT,
|
||||||
ARM_SLEEP_SAVE_ARM_RSTCT1,
|
ARM_SLEEP_SAVE_ARM_RSTCT1,
|
||||||
ARM_SLEEP_SAVE_ARM_RSTCT2,
|
ARM_SLEEP_SAVE_ARM_RSTCT2,
|
||||||
|
|
37
include/asm-arm/arch-omap/serial.h
Normal file
37
include/asm-arm/arch-omap/serial.h
Normal file
|
@ -0,0 +1,37 @@
|
||||||
|
/*
|
||||||
|
* linux/include/asm-arm/arch-omap/serial.h
|
||||||
|
*
|
||||||
|
* This program is distributed in the hope that it will be useful,
|
||||||
|
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||||
|
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||||
|
* GNU General Public License for more details.
|
||||||
|
*/
|
||||||
|
|
||||||
|
#ifndef __ASM_ARCH_SERIAL_H
|
||||||
|
#define __ASM_ARCH_SERIAL_H
|
||||||
|
|
||||||
|
#if defined(CONFIG_ARCH_OMAP1)
|
||||||
|
/* OMAP1 serial ports */
|
||||||
|
#define OMAP_UART1_BASE 0xfffb0000
|
||||||
|
#define OMAP_UART2_BASE 0xfffb0800
|
||||||
|
#define OMAP_UART3_BASE 0xfffb9800
|
||||||
|
#elif defined(CONFIG_ARCH_OMAP2)
|
||||||
|
/* OMAP2 serial ports */
|
||||||
|
#define OMAP_UART1_BASE 0x4806a000
|
||||||
|
#define OMAP_UART2_BASE 0x4806c000
|
||||||
|
#define OMAP_UART3_BASE 0x4806e000
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#define OMAP_MAX_NR_PORTS 3
|
||||||
|
#define OMAP1510_BASE_BAUD (12000000/16)
|
||||||
|
#define OMAP16XX_BASE_BAUD (48000000/16)
|
||||||
|
|
||||||
|
#define is_omap_port(p) ({int __ret = 0; \
|
||||||
|
if (p == IO_ADDRESS(OMAP_UART1_BASE) || \
|
||||||
|
p == IO_ADDRESS(OMAP_UART2_BASE) || \
|
||||||
|
p == IO_ADDRESS(OMAP_UART3_BASE)) \
|
||||||
|
__ret = 1; \
|
||||||
|
__ret; \
|
||||||
|
})
|
||||||
|
|
||||||
|
#endif
|
|
@ -20,7 +20,7 @@
|
||||||
#include <linux/config.h>
|
#include <linux/config.h>
|
||||||
#include <linux/types.h>
|
#include <linux/types.h>
|
||||||
#include <linux/serial_reg.h>
|
#include <linux/serial_reg.h>
|
||||||
#include <asm/arch/hardware.h>
|
#include <asm/arch/serial.h>
|
||||||
|
|
||||||
unsigned int system_rev;
|
unsigned int system_rev;
|
||||||
|
|
||||||
|
@ -34,8 +34,9 @@ static void
|
||||||
putstr(const char *s)
|
putstr(const char *s)
|
||||||
{
|
{
|
||||||
volatile u8 * uart = 0;
|
volatile u8 * uart = 0;
|
||||||
int shift;
|
int shift = 2;
|
||||||
|
|
||||||
|
#ifdef CONFIG_ARCH_OMAP
|
||||||
#ifdef CONFIG_OMAP_LL_DEBUG_UART3
|
#ifdef CONFIG_OMAP_LL_DEBUG_UART3
|
||||||
uart = (volatile u8 *)(OMAP_UART3_BASE);
|
uart = (volatile u8 *)(OMAP_UART3_BASE);
|
||||||
#elif CONFIG_OMAP_LL_DEBUG_UART2
|
#elif CONFIG_OMAP_LL_DEBUG_UART2
|
||||||
|
@ -44,6 +45,7 @@ putstr(const char *s)
|
||||||
uart = (volatile u8 *)(OMAP_UART1_BASE);
|
uart = (volatile u8 *)(OMAP_UART1_BASE);
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
|
#ifdef CONFIG_ARCH_OMAP1
|
||||||
/* Determine which serial port to use */
|
/* Determine which serial port to use */
|
||||||
do {
|
do {
|
||||||
/* MMU is not on, so cpu_is_omapXXXX() won't work here */
|
/* MMU is not on, so cpu_is_omapXXXX() won't work here */
|
||||||
|
@ -51,14 +53,14 @@ putstr(const char *s)
|
||||||
|
|
||||||
if (omap_id == OMAP_ID_730)
|
if (omap_id == OMAP_ID_730)
|
||||||
shift = 0;
|
shift = 0;
|
||||||
else
|
|
||||||
shift = 2;
|
|
||||||
|
|
||||||
if (check_port(uart, shift))
|
if (check_port(uart, shift))
|
||||||
break;
|
break;
|
||||||
/* Silent boot if no serial ports are enabled. */
|
/* Silent boot if no serial ports are enabled. */
|
||||||
return;
|
return;
|
||||||
} while (0);
|
} while (0);
|
||||||
|
#endif /* CONFIG_ARCH_OMAP1 */
|
||||||
|
#endif
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* Now, xmit each character
|
* Now, xmit each character
|
||||||
|
|
Loading…
Reference in a new issue