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drm/amdgpu: add VCE VM session tracking
Fix the problems with killing VCE sessions in VM mode. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-and-Tested by: Leo Liu <leo.liu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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3 changed files with 92 additions and 0 deletions
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@ -791,6 +791,96 @@ int amdgpu_vce_ring_parse_cs(struct amdgpu_cs_parser *p, uint32_t ib_idx)
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return r;
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return r;
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}
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}
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/**
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* amdgpu_vce_cs_parse_vm - parse the command stream in VM mode
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*
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* @p: parser context
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*
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*/
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int amdgpu_vce_ring_parse_cs_vm(struct amdgpu_cs_parser *p, uint32_t ib_idx)
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{
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struct amdgpu_ib *ib = &p->job->ibs[ib_idx];
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int session_idx = -1;
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uint32_t destroyed = 0;
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uint32_t created = 0;
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uint32_t allocated = 0;
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uint32_t tmp, handle = 0;
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int i, r = 0, idx = 0;
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while (idx < ib->length_dw) {
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uint32_t len = amdgpu_get_ib_value(p, ib_idx, idx);
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uint32_t cmd = amdgpu_get_ib_value(p, ib_idx, idx + 1);
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if ((len < 8) || (len & 3)) {
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DRM_ERROR("invalid VCE command length (%d)!\n", len);
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r = -EINVAL;
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goto out;
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}
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switch (cmd) {
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case 0x00000001: /* session */
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handle = amdgpu_get_ib_value(p, ib_idx, idx + 2);
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session_idx = amdgpu_vce_validate_handle(p, handle,
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&allocated);
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if (session_idx < 0) {
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r = session_idx;
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goto out;
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}
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break;
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case 0x01000001: /* create */
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created |= 1 << session_idx;
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if (destroyed & (1 << session_idx)) {
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destroyed &= ~(1 << session_idx);
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allocated |= 1 << session_idx;
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} else if (!(allocated & (1 << session_idx))) {
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DRM_ERROR("Handle already in use!\n");
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r = -EINVAL;
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goto out;
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}
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break;
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case 0x02000001: /* destroy */
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destroyed |= 1 << session_idx;
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break;
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default:
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break;
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}
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if (session_idx == -1) {
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DRM_ERROR("no session command at start of IB\n");
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r = -EINVAL;
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goto out;
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}
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idx += len / 4;
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}
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if (allocated & ~created) {
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DRM_ERROR("New session without create command!\n");
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r = -ENOENT;
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}
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out:
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if (!r) {
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/* No error, free all destroyed handle slots */
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tmp = destroyed;
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amdgpu_ib_free(p->adev, ib, NULL);
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} else {
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/* Error during parsing, free all allocated handle slots */
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tmp = allocated;
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}
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for (i = 0; i < AMDGPU_MAX_VCE_HANDLES; ++i)
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if (tmp & (1 << i))
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atomic_set(&p->adev->vce.handles[i], 0);
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return r;
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}
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/**
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/**
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* amdgpu_vce_ring_emit_ib - execute indirect buffer
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* amdgpu_vce_ring_emit_ib - execute indirect buffer
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*
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*
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@ -34,6 +34,7 @@ int amdgpu_vce_get_destroy_msg(struct amdgpu_ring *ring, uint32_t handle,
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bool direct, struct fence **fence);
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bool direct, struct fence **fence);
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void amdgpu_vce_free_handles(struct amdgpu_device *adev, struct drm_file *filp);
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void amdgpu_vce_free_handles(struct amdgpu_device *adev, struct drm_file *filp);
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int amdgpu_vce_ring_parse_cs(struct amdgpu_cs_parser *p, uint32_t ib_idx);
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int amdgpu_vce_ring_parse_cs(struct amdgpu_cs_parser *p, uint32_t ib_idx);
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int amdgpu_vce_ring_parse_cs_vm(struct amdgpu_cs_parser *p, uint32_t ib_idx);
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void amdgpu_vce_ring_emit_ib(struct amdgpu_ring *ring, struct amdgpu_ib *ib,
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void amdgpu_vce_ring_emit_ib(struct amdgpu_ring *ring, struct amdgpu_ib *ib,
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unsigned vm_id, bool ctx_switch);
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unsigned vm_id, bool ctx_switch);
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void amdgpu_vce_ring_emit_fence(struct amdgpu_ring *ring, u64 addr, u64 seq,
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void amdgpu_vce_ring_emit_fence(struct amdgpu_ring *ring, u64 addr, u64 seq,
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@ -856,6 +856,7 @@ static const struct amdgpu_ring_funcs vce_v3_0_ring_vm_funcs = {
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.get_rptr = vce_v3_0_ring_get_rptr,
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.get_rptr = vce_v3_0_ring_get_rptr,
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.get_wptr = vce_v3_0_ring_get_wptr,
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.get_wptr = vce_v3_0_ring_get_wptr,
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.set_wptr = vce_v3_0_ring_set_wptr,
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.set_wptr = vce_v3_0_ring_set_wptr,
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.parse_cs = amdgpu_vce_ring_parse_cs_vm,
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.emit_frame_size =
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.emit_frame_size =
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6 + /* vce_v3_0_emit_vm_flush */
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6 + /* vce_v3_0_emit_vm_flush */
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4 + /* vce_v3_0_emit_pipeline_sync */
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4 + /* vce_v3_0_emit_pipeline_sync */
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