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ARM: OMAP3: Add cpuidle parameters table for omap3430
Based on CPU type choose generic omap3 or omap3430 specific cpuidle parameters. Parameters for omap3430 were measured on Nokia N900 device and added by commit5a1b1d3a9e
("OMAP3: RX-51: Pass cpu idle parameters") which were later removed by commit231900afba
("ARM: OMAP3: cpuidle - remove rx51 cpuidle parameters table") due to huge code complexity. This patch brings cpuidle parameters for omap3430 devices again, but uses simple condition based on CPU type. Fixes:231900afba
("ARM: OMAP3: cpuidle - remove rx51 cpuidle parameters table") Signed-off-by: Pali Rohár <pali.rohar@gmail.com> Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org> Signed-off-by: Tony Lindgren <tony@atomide.com>
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parent
92e963f50f
commit
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1 changed files with 68 additions and 1 deletions
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@ -34,6 +34,7 @@
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#include "pm.h"
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#include "control.h"
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#include "common.h"
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#include "soc.h"
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/* Mach specific information to be recorded in the C-state driver_data */
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struct omap3_idle_statedata {
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@ -315,6 +316,69 @@ static struct cpuidle_driver omap3_idle_driver = {
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.safe_state_index = 0,
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};
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/*
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* Numbers based on measurements made in October 2009 for PM optimized kernel
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* with CPU freq enabled on device Nokia N900. Assumes OPP2 (main idle OPP,
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* and worst case latencies).
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*/
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static struct cpuidle_driver omap3430_idle_driver = {
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.name = "omap3430_idle",
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.owner = THIS_MODULE,
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.states = {
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{
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.enter = omap3_enter_idle_bm,
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.exit_latency = 110 + 162,
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.target_residency = 5,
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.name = "C1",
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.desc = "MPU ON + CORE ON",
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},
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{
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.enter = omap3_enter_idle_bm,
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.exit_latency = 106 + 180,
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.target_residency = 309,
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.name = "C2",
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.desc = "MPU ON + CORE ON",
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},
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{
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.enter = omap3_enter_idle_bm,
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.exit_latency = 107 + 410,
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.target_residency = 46057,
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.name = "C3",
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.desc = "MPU RET + CORE ON",
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},
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{
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.enter = omap3_enter_idle_bm,
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.exit_latency = 121 + 3374,
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.target_residency = 46057,
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.name = "C4",
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.desc = "MPU OFF + CORE ON",
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},
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{
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.enter = omap3_enter_idle_bm,
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.exit_latency = 855 + 1146,
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.target_residency = 46057,
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.name = "C5",
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.desc = "MPU RET + CORE RET",
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},
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{
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.enter = omap3_enter_idle_bm,
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.exit_latency = 7580 + 4134,
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.target_residency = 484329,
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.name = "C6",
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.desc = "MPU OFF + CORE RET",
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},
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{
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.enter = omap3_enter_idle_bm,
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.exit_latency = 7505 + 15274,
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.target_residency = 484329,
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.name = "C7",
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.desc = "MPU OFF + CORE OFF",
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},
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},
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.state_count = ARRAY_SIZE(omap3_idle_data),
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.safe_state_index = 0,
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};
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/* Public functions */
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/**
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@ -333,5 +397,8 @@ int __init omap3_idle_init(void)
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if (!mpu_pd || !core_pd || !per_pd || !cam_pd)
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return -ENODEV;
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return cpuidle_register(&omap3_idle_driver, NULL);
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if (cpu_is_omap3430())
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return cpuidle_register(&omap3430_idle_driver, NULL);
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else
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return cpuidle_register(&omap3_idle_driver, NULL);
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}
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