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KVM: PPC: Book3S PR: Expose TM registers
POWER8 introduces transactional memory which brings along a number of new registers and MSR bits. Implementing all of those is a pretty big headache, so for now let's at least emulate enough to make Linux's context switching code happy. Signed-off-by: Alexander Graf <agraf@suse.de>
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2e23f54413
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2 changed files with 41 additions and 1 deletions
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@ -451,6 +451,17 @@ int kvmppc_core_emulate_mtspr_pr(struct kvm_vcpu *vcpu, int sprn, ulong spr_val)
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case SPRN_EBBRR:
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vcpu->arch.ebbrr = spr_val;
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break;
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#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
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case SPRN_TFHAR:
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vcpu->arch.tfhar = spr_val;
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break;
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case SPRN_TEXASR:
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vcpu->arch.texasr = spr_val;
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break;
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case SPRN_TFIAR:
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vcpu->arch.tfiar = spr_val;
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break;
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#endif
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#endif
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case SPRN_ICTC:
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case SPRN_THRM1:
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@ -572,6 +583,17 @@ int kvmppc_core_emulate_mfspr_pr(struct kvm_vcpu *vcpu, int sprn, ulong *spr_val
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case SPRN_EBBRR:
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*spr_val = vcpu->arch.ebbrr;
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break;
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#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
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case SPRN_TFHAR:
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*spr_val = vcpu->arch.tfhar;
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break;
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case SPRN_TEXASR:
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*spr_val = vcpu->arch.texasr;
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break;
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case SPRN_TFIAR:
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*spr_val = vcpu->arch.tfiar;
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break;
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#endif
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#endif
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case SPRN_THRM1:
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case SPRN_THRM2:
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@ -794,9 +794,27 @@ static void kvmppc_emulate_fac(struct kvm_vcpu *vcpu, ulong fac)
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/* Enable facilities (TAR, EBB, DSCR) for the guest */
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static int kvmppc_handle_fac(struct kvm_vcpu *vcpu, ulong fac)
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{
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bool guest_fac_enabled;
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BUG_ON(!cpu_has_feature(CPU_FTR_ARCH_207S));
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if (!(vcpu->arch.fscr & (1ULL << fac))) {
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/*
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* Not every facility is enabled by FSCR bits, check whether the
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* guest has this facility enabled at all.
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*/
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switch (fac) {
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case FSCR_TAR_LG:
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case FSCR_EBB_LG:
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guest_fac_enabled = (vcpu->arch.fscr & (1ULL << fac));
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break;
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case FSCR_TM_LG:
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guest_fac_enabled = kvmppc_get_msr(vcpu) & MSR_TM;
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break;
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default:
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guest_fac_enabled = false;
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break;
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}
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if (!guest_fac_enabled) {
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/* Facility not enabled by the guest */
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kvmppc_trigger_fac_interrupt(vcpu, fac);
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return RESUME_GUEST;
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