mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
synced 2024-08-28 20:02:17 +00:00
soc: drivers: Amlogic updates for v5.7
- Add secure power domain controller -----BEGIN PGP SIGNATURE----- iQIzBAABCAAdFiEEe4dGDhaSf6n1v/EMWTcYmtP7xmUFAl5vy00ACgkQWTcYmtP7 xmXW3Q//Vp+Smi0+r9qEMhM18WFnaTn7A/uh828gjraX1Hnl8KlqYfz4Howh3GxK IsloulnmsfskJ2c+iVrJiX7SjCUJzd6kaordLC0C63WIxTnUgDnaUDFjwzUqT+Tr y9HtwCmUIgl1acJ6wPB+K0ssLuw8FUZa5RmQK24KoOo6Dz1wj3nB15xuy11oRnX7 63irUHHUVg7afV89C6Kxz8bUapufHvrqKKHeNHHm9ulwXFx04547NJ3+WMR0+qPZ QmlMav17p/SI3z40QVePAe/l9RQklxPVNKR2600PzMTjaDIuUK0HLRkRlYedl8fC K12WiPJJp8qZcf5rOMc3wYmdD4AJHsSlp1GhPR7rf4CU8RAkkHDJLvUJaGXJdu4A ixKepdkiKM9p57P48MDSCEvmLyfdt2ce4K0XkZgg9QVaNZ0uF30ixDoOsr+NFRkA quP52cMD3g0Wsm1OW+Ps+xkzkfXMpl+fNmCHFG7FAmSVbHxruhUhb0iah37tO1cz tUZ+wMV4DDkdFp/OKlywOqhk69Z2Uwa0Vs3yKWRrAXaWVfx7GOlR33u7CDZGGSba uSZsl1C4oFlKJ3PJ/6aMDEMx7CijMpENvQHtii2y4BIA8Uy69VBd2jA3SfXoylKw Xz39UfdQNnRUOlqGexh5DNym/iLdXh5YMSL3DgqkSZFG0do5aqM= =IKeh -----END PGP SIGNATURE----- Merge tag 'amlogic-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic into arm/drivers soc: drivers: Amlogic updates for v5.7 - Add secure power domain controller * tag 'amlogic-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic: dt-bindings: power: Fix dt_binding_check error soc: amlogic: fix compile failure with MESON_SECURE_PM_DOMAINS & !MESON_SM soc: amlogic: Add support for Secure power domains controller dt-bindings: power: add Amlogic secure power domains bindings firmware: meson_sm: Add secure power domain support Link: https://lore.kernel.org/r/7hpndcugoo.fsf@baylibre.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann
commit
993330e000
7 changed files with 294 additions and 0 deletions
|
|
@ -0,0 +1,40 @@
|
|||
# SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
||||
# Copyright (c) 2019 Amlogic, Inc
|
||||
# Author: Jianxin Pan <jianxin.pan@amlogic.com>
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: "http://devicetree.org/schemas/power/amlogic,meson-sec-pwrc.yaml#"
|
||||
$schema: "http://devicetree.org/meta-schemas/core.yaml#"
|
||||
|
||||
title: Amlogic Meson Secure Power Domains
|
||||
|
||||
maintainers:
|
||||
- Jianxin Pan <jianxin.pan@amlogic.com>
|
||||
|
||||
description: |+
|
||||
Secure Power Domains used in Meson A1/C1 SoCs, and should be the child node
|
||||
of secure-monitor.
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
- amlogic,meson-a1-pwrc
|
||||
|
||||
"#power-domain-cells":
|
||||
const: 1
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- "#power-domain-cells"
|
||||
|
||||
examples:
|
||||
- |
|
||||
secure-monitor {
|
||||
compatible = "amlogic,meson-gxbb-sm";
|
||||
|
||||
pwrc: power-controller {
|
||||
compatible = "amlogic,meson-a1-pwrc";
|
||||
#power-domain-cells = <1>;
|
||||
};
|
||||
};
|
||||
|
||||
|
|
@ -44,6 +44,8 @@ static const struct meson_sm_chip gxbb_chip = {
|
|||
CMD(SM_EFUSE_WRITE, 0x82000031),
|
||||
CMD(SM_EFUSE_USER_MAX, 0x82000033),
|
||||
CMD(SM_GET_CHIP_ID, 0x82000044),
|
||||
CMD(SM_A1_PWRC_SET, 0x82000093),
|
||||
CMD(SM_A1_PWRC_GET, 0x82000095),
|
||||
{ /* sentinel */ },
|
||||
},
|
||||
};
|
||||
|
|
|
|||
|
|
@ -48,6 +48,19 @@ config MESON_EE_PM_DOMAINS
|
|||
Say yes to expose Amlogic Meson Everything-Else Power Domains as
|
||||
Generic Power Domains.
|
||||
|
||||
config MESON_SECURE_PM_DOMAINS
|
||||
bool "Amlogic Meson Secure Power Domains driver"
|
||||
depends on (ARCH_MESON || COMPILE_TEST) && MESON_SM
|
||||
depends on PM && OF
|
||||
depends on HAVE_ARM_SMCCC
|
||||
default ARCH_MESON
|
||||
select PM_GENERIC_DOMAINS
|
||||
select PM_GENERIC_DOMAINS_OF
|
||||
help
|
||||
Support for the power controller on Amlogic A1/C1 series.
|
||||
Say yes to expose Amlogic Meson Secure Power Domains as Generic
|
||||
Power Domains.
|
||||
|
||||
config MESON_MX_SOCINFO
|
||||
bool "Amlogic Meson MX SoC Information driver"
|
||||
depends on ARCH_MESON || COMPILE_TEST
|
||||
|
|
|
|||
|
|
@ -5,3 +5,4 @@ obj-$(CONFIG_MESON_GX_SOCINFO) += meson-gx-socinfo.o
|
|||
obj-$(CONFIG_MESON_GX_PM_DOMAINS) += meson-gx-pwrc-vpu.o
|
||||
obj-$(CONFIG_MESON_MX_SOCINFO) += meson-mx-socinfo.o
|
||||
obj-$(CONFIG_MESON_EE_PM_DOMAINS) += meson-ee-pwrc.o
|
||||
obj-$(CONFIG_MESON_SECURE_PM_DOMAINS) += meson-secure-pwrc.o
|
||||
|
|
|
|||
204
drivers/soc/amlogic/meson-secure-pwrc.c
Normal file
204
drivers/soc/amlogic/meson-secure-pwrc.c
Normal file
|
|
@ -0,0 +1,204 @@
|
|||
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
||||
/*
|
||||
* Copyright (c) 2019 Amlogic, Inc.
|
||||
* Author: Jianxin Pan <jianxin.pan@amlogic.com>
|
||||
*/
|
||||
|
||||
#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
|
||||
|
||||
#include <linux/io.h>
|
||||
#include <linux/of_device.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/pm_domain.h>
|
||||
#include <dt-bindings/power/meson-a1-power.h>
|
||||
#include <linux/arm-smccc.h>
|
||||
#include <linux/firmware/meson/meson_sm.h>
|
||||
|
||||
#define PWRC_ON 1
|
||||
#define PWRC_OFF 0
|
||||
|
||||
struct meson_secure_pwrc_domain {
|
||||
struct generic_pm_domain base;
|
||||
unsigned int index;
|
||||
struct meson_secure_pwrc *pwrc;
|
||||
};
|
||||
|
||||
struct meson_secure_pwrc {
|
||||
struct meson_secure_pwrc_domain *domains;
|
||||
struct genpd_onecell_data xlate;
|
||||
struct meson_sm_firmware *fw;
|
||||
};
|
||||
|
||||
struct meson_secure_pwrc_domain_desc {
|
||||
unsigned int index;
|
||||
unsigned int flags;
|
||||
char *name;
|
||||
bool (*is_off)(struct meson_secure_pwrc_domain *pwrc_domain);
|
||||
};
|
||||
|
||||
struct meson_secure_pwrc_domain_data {
|
||||
unsigned int count;
|
||||
struct meson_secure_pwrc_domain_desc *domains;
|
||||
};
|
||||
|
||||
static bool pwrc_secure_is_off(struct meson_secure_pwrc_domain *pwrc_domain)
|
||||
{
|
||||
int is_off = 1;
|
||||
|
||||
if (meson_sm_call(pwrc_domain->pwrc->fw, SM_A1_PWRC_GET, &is_off,
|
||||
pwrc_domain->index, 0, 0, 0, 0) < 0)
|
||||
pr_err("failed to get power domain status\n");
|
||||
|
||||
return is_off;
|
||||
}
|
||||
|
||||
static int meson_secure_pwrc_off(struct generic_pm_domain *domain)
|
||||
{
|
||||
int ret = 0;
|
||||
struct meson_secure_pwrc_domain *pwrc_domain =
|
||||
container_of(domain, struct meson_secure_pwrc_domain, base);
|
||||
|
||||
if (meson_sm_call(pwrc_domain->pwrc->fw, SM_A1_PWRC_SET, NULL,
|
||||
pwrc_domain->index, PWRC_OFF, 0, 0, 0) < 0) {
|
||||
pr_err("failed to set power domain off\n");
|
||||
ret = -EINVAL;
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int meson_secure_pwrc_on(struct generic_pm_domain *domain)
|
||||
{
|
||||
int ret = 0;
|
||||
struct meson_secure_pwrc_domain *pwrc_domain =
|
||||
container_of(domain, struct meson_secure_pwrc_domain, base);
|
||||
|
||||
if (meson_sm_call(pwrc_domain->pwrc->fw, SM_A1_PWRC_SET, NULL,
|
||||
pwrc_domain->index, PWRC_ON, 0, 0, 0) < 0) {
|
||||
pr_err("failed to set power domain on\n");
|
||||
ret = -EINVAL;
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
#define SEC_PD(__name, __flag) \
|
||||
[PWRC_##__name##_ID] = \
|
||||
{ \
|
||||
.name = #__name, \
|
||||
.index = PWRC_##__name##_ID, \
|
||||
.is_off = pwrc_secure_is_off, \
|
||||
.flags = __flag, \
|
||||
}
|
||||
|
||||
static struct meson_secure_pwrc_domain_desc a1_pwrc_domains[] = {
|
||||
SEC_PD(DSPA, 0),
|
||||
SEC_PD(DSPB, 0),
|
||||
/* UART should keep working in ATF after suspend and before resume */
|
||||
SEC_PD(UART, GENPD_FLAG_ALWAYS_ON),
|
||||
/* DMC is for DDR PHY ana/dig and DMC, and should be always on */
|
||||
SEC_PD(DMC, GENPD_FLAG_ALWAYS_ON),
|
||||
SEC_PD(I2C, 0),
|
||||
SEC_PD(PSRAM, 0),
|
||||
SEC_PD(ACODEC, 0),
|
||||
SEC_PD(AUDIO, 0),
|
||||
SEC_PD(OTP, 0),
|
||||
SEC_PD(DMA, 0),
|
||||
SEC_PD(SD_EMMC, 0),
|
||||
SEC_PD(RAMA, 0),
|
||||
/* SRAMB is used as ATF runtime memory, and should be always on */
|
||||
SEC_PD(RAMB, GENPD_FLAG_ALWAYS_ON),
|
||||
SEC_PD(IR, 0),
|
||||
SEC_PD(SPICC, 0),
|
||||
SEC_PD(SPIFC, 0),
|
||||
SEC_PD(USB, 0),
|
||||
/* NIC is for the Arm NIC-400 interconnect, and should be always on */
|
||||
SEC_PD(NIC, GENPD_FLAG_ALWAYS_ON),
|
||||
SEC_PD(PDMIN, 0),
|
||||
SEC_PD(RSA, 0),
|
||||
};
|
||||
|
||||
static int meson_secure_pwrc_probe(struct platform_device *pdev)
|
||||
{
|
||||
int i;
|
||||
struct device_node *sm_np;
|
||||
struct meson_secure_pwrc *pwrc;
|
||||
const struct meson_secure_pwrc_domain_data *match;
|
||||
|
||||
match = of_device_get_match_data(&pdev->dev);
|
||||
if (!match) {
|
||||
dev_err(&pdev->dev, "failed to get match data\n");
|
||||
return -ENODEV;
|
||||
}
|
||||
|
||||
sm_np = of_find_compatible_node(NULL, NULL, "amlogic,meson-gxbb-sm");
|
||||
if (!sm_np) {
|
||||
dev_err(&pdev->dev, "no secure-monitor node\n");
|
||||
return -ENODEV;
|
||||
}
|
||||
|
||||
pwrc = devm_kzalloc(&pdev->dev, sizeof(*pwrc), GFP_KERNEL);
|
||||
if (!pwrc)
|
||||
return -ENOMEM;
|
||||
|
||||
pwrc->fw = meson_sm_get(sm_np);
|
||||
of_node_put(sm_np);
|
||||
if (!pwrc->fw)
|
||||
return -EPROBE_DEFER;
|
||||
|
||||
pwrc->xlate.domains = devm_kcalloc(&pdev->dev, match->count,
|
||||
sizeof(*pwrc->xlate.domains),
|
||||
GFP_KERNEL);
|
||||
if (!pwrc->xlate.domains)
|
||||
return -ENOMEM;
|
||||
|
||||
pwrc->domains = devm_kcalloc(&pdev->dev, match->count,
|
||||
sizeof(*pwrc->domains), GFP_KERNEL);
|
||||
if (!pwrc->domains)
|
||||
return -ENOMEM;
|
||||
|
||||
pwrc->xlate.num_domains = match->count;
|
||||
platform_set_drvdata(pdev, pwrc);
|
||||
|
||||
for (i = 0 ; i < match->count ; ++i) {
|
||||
struct meson_secure_pwrc_domain *dom = &pwrc->domains[i];
|
||||
|
||||
if (!match->domains[i].index)
|
||||
continue;
|
||||
|
||||
dom->pwrc = pwrc;
|
||||
dom->index = match->domains[i].index;
|
||||
dom->base.name = match->domains[i].name;
|
||||
dom->base.flags = match->domains[i].flags;
|
||||
dom->base.power_on = meson_secure_pwrc_on;
|
||||
dom->base.power_off = meson_secure_pwrc_off;
|
||||
|
||||
pm_genpd_init(&dom->base, NULL, match->domains[i].is_off(dom));
|
||||
|
||||
pwrc->xlate.domains[i] = &dom->base;
|
||||
}
|
||||
|
||||
return of_genpd_add_provider_onecell(pdev->dev.of_node, &pwrc->xlate);
|
||||
}
|
||||
|
||||
static struct meson_secure_pwrc_domain_data meson_secure_a1_pwrc_data = {
|
||||
.domains = a1_pwrc_domains,
|
||||
.count = ARRAY_SIZE(a1_pwrc_domains),
|
||||
};
|
||||
|
||||
static const struct of_device_id meson_secure_pwrc_match_table[] = {
|
||||
{
|
||||
.compatible = "amlogic,meson-a1-pwrc",
|
||||
.data = &meson_secure_a1_pwrc_data,
|
||||
},
|
||||
{ /* sentinel */ }
|
||||
};
|
||||
|
||||
static struct platform_driver meson_secure_pwrc_driver = {
|
||||
.probe = meson_secure_pwrc_probe,
|
||||
.driver = {
|
||||
.name = "meson_secure_pwrc",
|
||||
.of_match_table = meson_secure_pwrc_match_table,
|
||||
},
|
||||
};
|
||||
builtin_platform_driver(meson_secure_pwrc_driver);
|
||||
32
include/dt-bindings/power/meson-a1-power.h
Normal file
32
include/dt-bindings/power/meson-a1-power.h
Normal file
|
|
@ -0,0 +1,32 @@
|
|||
/* SPDX-License-Identifier: (GPL-2.0+ or MIT) */
|
||||
/*
|
||||
* Copyright (c) 2019 Amlogic, Inc.
|
||||
* Author: Jianxin Pan <jianxin.pan@amlogic.com>
|
||||
*/
|
||||
|
||||
#ifndef _DT_BINDINGS_MESON_A1_POWER_H
|
||||
#define _DT_BINDINGS_MESON_A1_POWER_H
|
||||
|
||||
#define PWRC_DSPA_ID 8
|
||||
#define PWRC_DSPB_ID 9
|
||||
#define PWRC_UART_ID 10
|
||||
#define PWRC_DMC_ID 11
|
||||
#define PWRC_I2C_ID 12
|
||||
#define PWRC_PSRAM_ID 13
|
||||
#define PWRC_ACODEC_ID 14
|
||||
#define PWRC_AUDIO_ID 15
|
||||
#define PWRC_OTP_ID 16
|
||||
#define PWRC_DMA_ID 17
|
||||
#define PWRC_SD_EMMC_ID 18
|
||||
#define PWRC_RAMA_ID 19
|
||||
#define PWRC_RAMB_ID 20
|
||||
#define PWRC_IR_ID 21
|
||||
#define PWRC_SPICC_ID 22
|
||||
#define PWRC_SPIFC_ID 23
|
||||
#define PWRC_USB_ID 24
|
||||
#define PWRC_NIC_ID 25
|
||||
#define PWRC_PDMIN_ID 26
|
||||
#define PWRC_RSA_ID 27
|
||||
#define PWRC_MAX_ID 28
|
||||
|
||||
#endif
|
||||
|
|
@ -12,6 +12,8 @@ enum {
|
|||
SM_EFUSE_WRITE,
|
||||
SM_EFUSE_USER_MAX,
|
||||
SM_GET_CHIP_ID,
|
||||
SM_A1_PWRC_SET,
|
||||
SM_A1_PWRC_GET,
|
||||
};
|
||||
|
||||
struct meson_sm_firmware;
|
||||
|
|
|
|||
Loading…
Reference in a new issue