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ARM: dts: aspeed: amd-ethanolx: Enable secondary LPC snooping address

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AMD EthanolX CRB uses 2-byte POST codes which are sent to ports 0x80/0x81.
Currently ASPEED controller snoops only 0x80 port and therefore captures
only the lower byte of each POST code.
Enable secondary LPC snooping address to capture the higher byte of POST
codes.

Signed-off-by: Konstantin Aladyshev <aladyshev22@gmail.com>
Reviewed-by: Andrew Jeffery <andrew@aj.id.au>
Link: https://lore.kernel.org/r/20210127182326.424-1-aladyshev22@gmail.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
This commit is contained in:
Konstantin Aladyshev 2021-01-27 21:23:26 +03:00 committed by Joel Stanley
parent a5c5168478
commit 99fa80c3de
1 changed files with 1 additions and 1 deletions
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2
arch/arm/boot/dts/aspeed-bmc-amd-ethanolx.dts
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@ -218,7 +218,7 @@ &kcs4 {
&lpc_snoop {
status = "okay";
snoop-ports = <0x80>;
snoop-ports = <0x80>, <0x81>;
};
&lpc_ctrl {