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KVM: PPC: e500: Add support for EPTCFG register
EPTCFG register defined by E.PT is accessed unconditionally by Linux guests in the presence of MAV 2.0. Emulate it now. Signed-off-by: Mihai Caraman <mihai.caraman@freescale.com> Signed-off-by: Alexander Graf <agraf@suse.de>
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5 changed files with 24 additions and 0 deletions
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@ -1807,6 +1807,7 @@ registers, find a list below:
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PPC | KVM_REG_PPC_TLB1PS | 32
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PPC | KVM_REG_PPC_TLB1PS | 32
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PPC | KVM_REG_PPC_TLB2PS | 32
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PPC | KVM_REG_PPC_TLB2PS | 32
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PPC | KVM_REG_PPC_TLB3PS | 32
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PPC | KVM_REG_PPC_TLB3PS | 32
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PPC | KVM_REG_PPC_EPTCFG | 32
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ARM registers are mapped using the lower 32 bits. The upper 16 of that
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ARM registers are mapped using the lower 32 bits. The upper 16 of that
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is the register group type, or coprocessor number:
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is the register group type, or coprocessor number:
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@ -504,6 +504,7 @@ struct kvm_vcpu_arch {
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u32 tlbcfg[4];
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u32 tlbcfg[4];
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u32 tlbps[4];
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u32 tlbps[4];
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u32 mmucfg;
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u32 mmucfg;
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u32 eptcfg;
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u32 epr;
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u32 epr;
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u32 crit_save;
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u32 crit_save;
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struct kvmppc_booke_debug_reg dbg_reg;
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struct kvmppc_booke_debug_reg dbg_reg;
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@ -469,5 +469,6 @@ struct kvm_get_htab_header {
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#define KVM_REG_PPC_TLB1PS (KVM_REG_PPC | KVM_REG_SIZE_U32 | 0x98)
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#define KVM_REG_PPC_TLB1PS (KVM_REG_PPC | KVM_REG_SIZE_U32 | 0x98)
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#define KVM_REG_PPC_TLB2PS (KVM_REG_PPC | KVM_REG_SIZE_U32 | 0x99)
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#define KVM_REG_PPC_TLB2PS (KVM_REG_PPC | KVM_REG_SIZE_U32 | 0x99)
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#define KVM_REG_PPC_TLB3PS (KVM_REG_PPC | KVM_REG_SIZE_U32 | 0x9a)
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#define KVM_REG_PPC_TLB3PS (KVM_REG_PPC | KVM_REG_SIZE_U32 | 0x9a)
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#define KVM_REG_PPC_EPTCFG (KVM_REG_PPC | KVM_REG_SIZE_U32 | 0x9b)
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#endif /* __LINUX_KVM_POWERPC_H */
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#endif /* __LINUX_KVM_POWERPC_H */
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@ -317,6 +317,15 @@ int kvmppc_core_emulate_mfspr(struct kvm_vcpu *vcpu, int sprn, ulong *spr_val)
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case SPRN_MMUCFG:
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case SPRN_MMUCFG:
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*spr_val = vcpu->arch.mmucfg;
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*spr_val = vcpu->arch.mmucfg;
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break;
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break;
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case SPRN_EPTCFG:
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if (!has_feature(vcpu, VCPU_FTR_MMU_V2))
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return EMULATE_FAIL;
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/*
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* Legacy Linux guests access EPTCFG register even if the E.PT
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* category is disabled in the VM. Give them a chance to live.
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*/
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*spr_val = vcpu->arch.eptcfg;
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break;
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/* extra exceptions */
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/* extra exceptions */
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case SPRN_IVOR32:
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case SPRN_IVOR32:
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@ -624,6 +624,9 @@ int kvmppc_get_one_reg_e500_tlb(struct kvm_vcpu *vcpu, u64 id,
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case KVM_REG_PPC_MMUCFG:
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case KVM_REG_PPC_MMUCFG:
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*val = get_reg_val(id, vcpu->arch.mmucfg);
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*val = get_reg_val(id, vcpu->arch.mmucfg);
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break;
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break;
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case KVM_REG_PPC_EPTCFG:
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*val = get_reg_val(id, vcpu->arch.eptcfg);
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break;
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case KVM_REG_PPC_TLB0CFG:
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case KVM_REG_PPC_TLB0CFG:
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case KVM_REG_PPC_TLB1CFG:
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case KVM_REG_PPC_TLB1CFG:
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case KVM_REG_PPC_TLB2CFG:
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case KVM_REG_PPC_TLB2CFG:
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@ -678,6 +681,12 @@ int kvmppc_set_one_reg_e500_tlb(struct kvm_vcpu *vcpu, u64 id,
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r = -EINVAL;
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r = -EINVAL;
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break;
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break;
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}
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}
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case KVM_REG_PPC_EPTCFG: {
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u32 reg = set_reg_val(id, *val);
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if (reg != vcpu->arch.eptcfg)
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r = -EINVAL;
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break;
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}
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case KVM_REG_PPC_TLB0CFG:
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case KVM_REG_PPC_TLB0CFG:
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case KVM_REG_PPC_TLB1CFG:
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case KVM_REG_PPC_TLB1CFG:
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case KVM_REG_PPC_TLB2CFG:
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case KVM_REG_PPC_TLB2CFG:
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@ -875,6 +884,9 @@ static int vcpu_mmu_init(struct kvm_vcpu *vcpu,
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if (has_feature(vcpu, VCPU_FTR_MMU_V2)) {
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if (has_feature(vcpu, VCPU_FTR_MMU_V2)) {
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vcpu->arch.tlbps[0] = mfspr(SPRN_TLB0PS);
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vcpu->arch.tlbps[0] = mfspr(SPRN_TLB0PS);
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vcpu->arch.tlbps[1] = mfspr(SPRN_TLB1PS);
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vcpu->arch.tlbps[1] = mfspr(SPRN_TLB1PS);
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/* Guest mmu emulation currently doesn't handle E.PT */
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vcpu->arch.eptcfg = 0;
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}
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}
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return 0;
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return 0;
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