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habanalabs: add current PI value to cpu packets
In order to increase cpucp messaging reliability we will add the current PI value to the descriptor sent to F/W. F/W will wait for the PI value as an indication of a valid packet. Signed-off-by: Ofir Bitton <obitton@habana.ai> Reviewed-by: Oded Gabbay <ogabbay@kernel.org> Signed-off-by: Oded Gabbay <ogabbay@kernel.org>
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1 changed files with 12 additions and 2 deletions
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@ -212,7 +212,8 @@ int hl_fw_send_cpu_message(struct hl_device *hdev, u32 hw_queue_id, u32 *msg,
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struct asic_fixed_properties *prop = &hdev->asic_prop;
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struct cpucp_packet *pkt;
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dma_addr_t pkt_dma_addr;
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u32 tmp, expected_ack_val;
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struct hl_bd *sent_bd;
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u32 tmp, expected_ack_val, pi;
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int rc = 0;
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pkt = hdev->asic_funcs->cpu_accessible_dma_pool_alloc(hdev, len,
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@ -237,6 +238,7 @@ int hl_fw_send_cpu_message(struct hl_device *hdev, u32 hw_queue_id, u32 *msg,
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/* set fence to a non valid value */
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pkt->fence = cpu_to_le32(UINT_MAX);
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pi = queue->pi;
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/*
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* The CPU queue is a synchronous queue with an effective depth of
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@ -246,7 +248,7 @@ int hl_fw_send_cpu_message(struct hl_device *hdev, u32 hw_queue_id, u32 *msg,
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* Which means that we don't need to lock the access to the entire H/W
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* queues module when submitting a JOB to the CPU queue.
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*/
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hl_hw_queue_submit_bd(hdev, queue, 0, len, pkt_dma_addr);
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hl_hw_queue_submit_bd(hdev, queue, hl_queue_inc_ptr(queue->pi), len, pkt_dma_addr);
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if (prop->fw_app_cpu_boot_dev_sts0 & CPU_BOOT_DEV_STS0_PKT_PI_ACK_EN)
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expected_ack_val = queue->pi;
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@ -278,6 +280,14 @@ int hl_fw_send_cpu_message(struct hl_device *hdev, u32 hw_queue_id, u32 *msg,
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*result = le64_to_cpu(pkt->result);
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}
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/* Scrub previous buffer descriptor 'ctl' field which contains the
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* previous PI value written during packet submission.
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* We must do this or else F/W can read an old value upon queue wraparound.
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*/
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sent_bd = queue->kernel_address;
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sent_bd += hl_pi_2_offset(pi);
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sent_bd->ctl = cpu_to_le32(UINT_MAX);
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out:
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mutex_unlock(&hdev->send_cpu_message_lock);
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