staging: vme_user: Fix misaligned closing comment */

This patch makes the following change:
 * Ensures the trailing */ for comments is on the same line as the opening
   /*

Signed-off-by: Jonathan Bergh <bergh.jonathan@gmail.com>
Link: https://lore.kernel.org/r/20240303100547.153636-1-bergh.jonathan@gmail.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
Jonathan Bergh 2024-03-03 11:05:46 +01:00 committed by Greg Kroah-Hartman
parent 7485b3e350
commit 9bed49bfd1
1 changed files with 2 additions and 4 deletions

View File

@ -691,8 +691,7 @@ static const int TSI148_GCSR_MBOX[4] = { TSI148_GCSR_MBOX0,
#define TSI148_LCSR_VMCTRL_RMWEN BIT(20) /* RMW Enable */
#define TSI148_LCSR_VMCTRL_ATO_M (7 << 16) /* Master Access Time-out Mask
*/
#define TSI148_LCSR_VMCTRL_ATO_M (7 << 16) /* Master Access Time-out Mask */
#define TSI148_LCSR_VMCTRL_ATO_32 (0 << 16) /* 32 us */
#define TSI148_LCSR_VMCTRL_ATO_128 BIT(16) /* 128 us */
#define TSI148_LCSR_VMCTRL_ATO_512 (2 << 16) /* 512 us */
@ -753,8 +752,7 @@ static const int TSI148_GCSR_MBOX[4] = { TSI148_GCSR_MBOX0,
#define TSI148_LCSR_VCTRL_DLT_16384 (0xB << 24) /* 16384 VCLKS */
#define TSI148_LCSR_VCTRL_DLT_32768 (0xC << 24) /* 32768 VCLKS */
#define TSI148_LCSR_VCTRL_NERBB BIT(20) /* No Early Release of Bus Busy
*/
#define TSI148_LCSR_VCTRL_NERBB BIT(20) /* No Early Release of Bus Busy */
#define TSI148_LCSR_VCTRL_SRESET BIT(17) /* System Reset */
#define TSI148_LCSR_VCTRL_LRESET BIT(16) /* Local Reset */