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1st set of IIO/counter device support, features and cleanup in the 5.13 cycle 

Big set in here from Alexandru Ardelean enabling multiple buffer support.
 This includes providing a new directory per buffer that combines
 what was previously in buffer/ and scan_elements/. Old interfaces still
 in place for compatiblity.
 
 Note immuatable branch for scmi patches to allow for some significant
 rework going on in that subsystem.  Merge required updating to reflect
 some changes in IIO.
 
 Late rebase to fix some wrong fixes tags due to some earlier rebases
 made necessary by messing up the immutable branch.
 
 IIO New Device Support
 * adi,ad5686
   - Add info to support AD5673R and AD5677R
 * bosch,bmi088
   - New driver supporting this accelerometer + gyroscope
 * cros_ec_mkbp
   - New driver for this proximity sensor that exposes a 'front'
     sensor. Very simple switch like device, but driver allows it
     to share interface with more sophisticated proximity sensors.
 * iio_scmi
   - New driver to support ARM SCMI protocol to expose underlying
     accelerometers and gyroscopes via this firmware interface.
 * st,st_magn
   - Add ID for IISMDC magnetometer.
 * ti,ads131e0
   - New driver supporting ads131e04, ads131e06 and ads131e08 24 bit ADCs
 
 Counter New Device Support
 * IRQ or GPIO based counter
   - New driver for a conceptually simple counter that uses interrupts
     to perform the count.
 
 Features
 * core
   - Dual buffer supprt including:
      Various helpers to centralize handling of bufferer related elements.
      Document existing and new IOCTLs
      Register the IIO chrdev only if it can actually be used for anything.
      Rework attribute group creation in the core (lots of patches)
      Merge buffer/ and scan_elements/ entries into one list + maintain
      backwards compatible set.
      Introduce the internal logic and IOCTL to allow multiple buffers
      + access to an anon FD per buffer to actually read from it.
      Tidy up tools/iio/iio_generic_buffer and switch to new interfaces.
      Update ABI docs.
      A few follow up fixes, unsuprising as this was a huge bit of rework.
   - Move common case setting of trig->parent to the core.
   - Provide an iio_read_channel_processed_scale() to avoid loss of
     precision from iio_read_channel_processed() then applying integer
     scale. Use it in ntc_thermistor driver in hwmon.
   - Allow drivers to specify labels from elsewhere than DT. Use it for
     bmc150 and kxcjk-1013 labels related to position on 2 in one tablets.
   - Document label usage for proximity and accelerometer sensors.
   - Some local variable renames for consistency
 tools
   - Add -a parameter to iio_event_monitor to allow autoenabling of events.
 * acpi_als
   - Add trigger support for devices that don't support notification method.
 * adi,ad7124
   - Allow more than 8 channels.  This is a complex little device, but is
     capable of supporting up to 16 channels if the share certain
     configuration settings.
 * hrtimer-trigger
   - Support sampling frequency below 1Hz.
 * mediatek,mt8195-auxadc
   - Add compatible to binding docs (always also includes mt8173)
 * st,stm32-adc
   - Enable timetamps when not using DMA.
 * vishay,vcnl3020
   - Sampling frequency control.
 
 Cleanup and minor fixes:
 * treewide
   - Use some getter and setter functions instead of opencoding.
   - Set of fixes for pointless casts in various drivers.
   - Avoid wrong kernel-doc marking on comment blocks.
   - Fix various other minor kernel-doc issues shown by W=1
 * core
   - Use a signed temporary for IIO_VAL_FRACTIONAL_LOG2 to avoid odd casts.
   - Fix IIO_VAL_FRACTIONAL_LOG2 for values between -1.0 and 0.0
   - Add unit tests for iio_format_value()
 * docs
   - Fix formatting/typos in iio_configfs.rst and buffers.rst
   - Add documentation of index in buffers.rst
   - Fix scan element description
   - Avoid some issues with HTML generation from ABI docs by moving
     duplicated defintions to more generic files.
   - Drop reference to long dead mailing list.
 * 104-quad
   - Remove left over deprecated IIO counter ABI.
 * adi,adi-axi-adc
   - Fix wrong bit of docs.
 * adi,ad5791
   - Typos
 * adi,ad9834
    - Switch to device managed functions in probe.
 * adi,adis*
   - Add and use helpers for locking to reduced duplication.
 * adi,adis16480
   - Fix calculation of sampling frequency when using pulse per second input.
 * adi,adis16475
   - Calculate the IMU scaled internal sampling rate and runtime depending
     on sysfs based configuration rather than getting from DT. Drop now
     unnecessary property from DT bindings doc.
 * cros_ec
    - Fix result of a series of recent changes that means extended buffer
      attributes turn up in the wrong place. Too complex to revert the
      various patches unfortunately so this is a bit messy.
 * fsl,mma3452
   - Indentation cleanup.
 * hid-sensors
   - Size of storage needs to increase for some parts when using quaternions.
   - Move the get sensistivity attribute to hid-sensors-common to reduce
     duplication.  Enable it for more device types.
   - Correctly handle relative sensitivity if reported that way including
     documenting the new ABI.
 * maxim,max517
   - Use device managed functions in probe.
 * mediatek,mt6360-adc
   - Use asm/unaligned.h instead of directly including
     unaligned/be_byteshift.h
 * novuton,npcm-adc
   - Local lock instead of missusing mlock.
 * semtech,sx9500
   - Typos
 * st,sensor
   - typo fix
 * st,spear-adc
   - Local lock instead of missusing mlock.
 * st,stm32-adc
   - Long standing HAS_IOMEM dependency fix.
 * st,stm32-counter
   - Remove left over deprecated IIO counter ABI.
 * ti,palmas-adc
   - Local lock instead of missusing mlock.
 * ti,tmp007
   - Switch to device managed functions in probe.
 
 Other
 * MAINTAINERS
   - Move Peter Meerwald-Stadler to Credits at his request
 -----BEGIN PGP SIGNATURE-----
 
 iQJFBAABCAAvFiEEbilms4eEBlKRJoGxVIU0mcT0FogFAmBdtl4RHGppYzIzQGtl
 cm5lbC5vcmcACgkQVIU0mcT0FogEhxAAuTWrEwun8rE5fQkQIlEkKYwZqEgUln4Q
 tLKhrqeyfGcY/A1aX/HTpnn0TOtaOkUqRzLWsAW0thZih1u7yEL6Vc55KKh5WGL7
 CvcvLWAkorsTjbtusgrBgFmjuoAMjW892Q+bbh1CJ/0qlezhFE9jrmJfmH2klI/p
 nIoJsdyCE98+4oIdcOCxwJe7nTDDHP8BCF7WnKtHCLtn3T9Dzttises3T6HfKxlg
 cdu3cy2N+pQpakYpv96tvjBGI9Ho3FX8R+dILUxJpVwCcLUjf8b1CFcgboJwxou2
 tgPNwWToxd9OTYJa7EOsDaFPZD46NRProkUBGKgA58XPkhqSvLcSdvGokFPgKnPW
 NorymGaUOC2qolH91nuFaWrd6c6hIf5NeWtGDo1GHJdcSgu21C0OdaU3K72EGhsB
 YLnl0Wp8Bthwn7KS0Ck4TqUPN3D3Q9NCEz7sAUzqc3QBzm4U+dXVzCwRehI7hPdw
 YlORAzbV1o7Z0skhAAth+NAYUUB6GywGZLaUi5oXWoJSYhNvI1K1uiHVVStVINWl
 L7uor5FXTr4/czjrutWQbw7GQ0cfCODH6B1cbS9vNaDQ6wO9XGSaWgc3mK9Lgsqc
 Y1ekYvXNSxKJw42FWvr4ylkeF7BV6h0oBFB4DLlZppYi1pKZb8oPsED8UpBrFnG1
 uPqjNX9Tsqw=
 =jeRJ
 -----END PGP SIGNATURE-----

Merge tag 'iio-for-5.13a' of https://git.kernel.org/pub/scm/linux/kernel/git/jic23/iio into staging-next

Jonathan writes:

1st set of IIO/counter device support, features and cleanup in the 5.13 cycle

Big set in here from Alexandru Ardelean enabling multiple buffer support.
This includes providing a new directory per buffer that combines
what was previously in buffer/ and scan_elements/. Old interfaces still
in place for compatiblity.

Note immuatable branch for scmi patches to allow for some significant
rework going on in that subsystem.  Merge required updating to reflect
some changes in IIO.

Late rebase to fix some wrong fixes tags due to some earlier rebases
made necessary by messing up the immutable branch.

IIO New Device Support
* adi,ad5686
  - Add info to support AD5673R and AD5677R
* bosch,bmi088
  - New driver supporting this accelerometer + gyroscope
* cros_ec_mkbp
  - New driver for this proximity sensor that exposes a 'front'
    sensor. Very simple switch like device, but driver allows it
    to share interface with more sophisticated proximity sensors.
* iio_scmi
  - New driver to support ARM SCMI protocol to expose underlying
    accelerometers and gyroscopes via this firmware interface.
* st,st_magn
  - Add ID for IISMDC magnetometer.
* ti,ads131e0
  - New driver supporting ads131e04, ads131e06 and ads131e08 24 bit ADCs

Counter New Device Support
* IRQ or GPIO based counter
  - New driver for a conceptually simple counter that uses interrupts
    to perform the count.

Features
* core
  - Dual buffer supprt including:
     Various helpers to centralize handling of bufferer related elements.
     Document existing and new IOCTLs
     Register the IIO chrdev only if it can actually be used for anything.
     Rework attribute group creation in the core (lots of patches)
     Merge buffer/ and scan_elements/ entries into one list + maintain
     backwards compatible set.
     Introduce the internal logic and IOCTL to allow multiple buffers
     + access to an anon FD per buffer to actually read from it.
     Tidy up tools/iio/iio_generic_buffer and switch to new interfaces.
     Update ABI docs.
     A few follow up fixes, unsuprising as this was a huge bit of rework.
  - Move common case setting of trig->parent to the core.
  - Provide an iio_read_channel_processed_scale() to avoid loss of
    precision from iio_read_channel_processed() then applying integer
    scale. Use it in ntc_thermistor driver in hwmon.
  - Allow drivers to specify labels from elsewhere than DT. Use it for
    bmc150 and kxcjk-1013 labels related to position on 2 in one tablets.
  - Document label usage for proximity and accelerometer sensors.
  - Some local variable renames for consistency
tools
  - Add -a parameter to iio_event_monitor to allow autoenabling of events.
* acpi_als
  - Add trigger support for devices that don't support notification method.
* adi,ad7124
  - Allow more than 8 channels.  This is a complex little device, but is
    capable of supporting up to 16 channels if the share certain
    configuration settings.
* hrtimer-trigger
  - Support sampling frequency below 1Hz.
* mediatek,mt8195-auxadc
  - Add compatible to binding docs (always also includes mt8173)
* st,stm32-adc
  - Enable timetamps when not using DMA.
* vishay,vcnl3020
  - Sampling frequency control.

Cleanup and minor fixes:
* treewide
  - Use some getter and setter functions instead of opencoding.
  - Set of fixes for pointless casts in various drivers.
  - Avoid wrong kernel-doc marking on comment blocks.
  - Fix various other minor kernel-doc issues shown by W=1
* core
  - Use a signed temporary for IIO_VAL_FRACTIONAL_LOG2 to avoid odd casts.
  - Fix IIO_VAL_FRACTIONAL_LOG2 for values between -1.0 and 0.0
  - Add unit tests for iio_format_value()
* docs
  - Fix formatting/typos in iio_configfs.rst and buffers.rst
  - Add documentation of index in buffers.rst
  - Fix scan element description
  - Avoid some issues with HTML generation from ABI docs by moving
    duplicated defintions to more generic files.
  - Drop reference to long dead mailing list.
* 104-quad
  - Remove left over deprecated IIO counter ABI.
* adi,adi-axi-adc
  - Fix wrong bit of docs.
* adi,ad5791
  - Typos
* adi,ad9834
   - Switch to device managed functions in probe.
* adi,adis*
  - Add and use helpers for locking to reduced duplication.
* adi,adis16480
  - Fix calculation of sampling frequency when using pulse per second input.
* adi,adis16475
  - Calculate the IMU scaled internal sampling rate and runtime depending
    on sysfs based configuration rather than getting from DT. Drop now
    unnecessary property from DT bindings doc.
* cros_ec
   - Fix result of a series of recent changes that means extended buffer
     attributes turn up in the wrong place. Too complex to revert the
     various patches unfortunately so this is a bit messy.
* fsl,mma3452
  - Indentation cleanup.
* hid-sensors
  - Size of storage needs to increase for some parts when using quaternions.
  - Move the get sensistivity attribute to hid-sensors-common to reduce
    duplication.  Enable it for more device types.
  - Correctly handle relative sensitivity if reported that way including
    documenting the new ABI.
* maxim,max517
  - Use device managed functions in probe.
* mediatek,mt6360-adc
  - Use asm/unaligned.h instead of directly including
    unaligned/be_byteshift.h
* novuton,npcm-adc
  - Local lock instead of missusing mlock.
* semtech,sx9500
  - Typos
* st,sensor
  - typo fix
* st,spear-adc
  - Local lock instead of missusing mlock.
* st,stm32-adc
  - Long standing HAS_IOMEM dependency fix.
* st,stm32-counter
  - Remove left over deprecated IIO counter ABI.
* ti,palmas-adc
  - Local lock instead of missusing mlock.
* ti,tmp007
  - Switch to device managed functions in probe.

Other
* MAINTAINERS
  - Move Peter Meerwald-Stadler to Credits at his request

* tag 'iio-for-5.13a' of https://git.kernel.org/pub/scm/linux/kernel/git/jic23/iio: (119 commits)
  iio: acpi_als: Add trigger support
  iio: acpi_als: Add local variable dev in probe
  iio: acpi_als: Add timestamp channel
  iio: adc: ad7292: Modify the bool initialization assignment
  iio: cros: unify hw fifo attributes without API changes
  iio: kfifo: add devm_iio_triggered_buffer_setup_ext variant
  iio: event_monitor: Enable events before monitoring
  dt-bindings: iio: adc: Add compatible for Mediatek MT8195
  iio:magnetometer: Add Support for ST IIS2MDC
  dt-bindings: iio: st,st-sensors add IIS2MDC.
  staging: iio: ad9832: kernel-doc fixes
  iio:dac:max517.c: Use devm_iio_device_register()
  iio:cros_ec_sensors: Fix a wrong function name in kernel doc.
  iio: buffer: kfifo_buf: kernel-doc, typo in function name.
  iio: accel: sca3000: kernel-doc fixes. Missing - and wrong function names.
  iio: adc: adi-axi-adc: Drop false marking for kernel-doc
  iio: adc: cpcap-adc: kernel-doc fix - that should be _ in structure name
  iio: dac: ad5504: fix wrong part number in kernel-doc structure name.
  iio: dac: ad5770r: kernel-doc fix case of letter R wrong in structure name
  iio: adc: ti-adc084s021: kernel-doc fixes, missing function names
  ...
This commit is contained in:
Greg Kroah-Hartman 2021-03-26 12:09:47 +01:00
parent d010995736 1b33dfa5d5
commit 9c15db92a8
212 changed files with 5954 additions and 2282 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

8
CREDITS
View File

@ -2536,6 +2536,14 @@ D: Linux/PARISC hacker
D: AD1889 sound driver
S: Ottawa, Canada
N: Peter Meerwald-Stadler
E: pmeerw@pmeerw.net
W: https://pmeerw.net
D: IIO reviewing, drivers
S: Schießstandstr. 3a
S: A-5061 Elsbethen
S: Austria
N: Dirk Melchers
E: dirk@merlin.nbg.sub.org
D: 8 bit XT hard disk driver for OMTI5520

140
Documentation/ABI/testing/sysfs-bus-iio
View File

@ -33,6 +33,52 @@ Description:
Description of the physical chip / device for device X.
Typically a part number.
What: /sys/bus/iio/devices/iio:deviceX/label
KernelVersion: 5.8
Contact: linux-iio@vger.kernel.org
Description:
Optional symbolic label for a device.
This is useful for userspace to be able to better identify an
individual device.
The contents of the label are free-form, but there are some
standardized uses:
For proximity sensors which give the proximity (of a person) to
a certain wlan or wwan antenna the following standardized labels
are used:
* "proximity-wifi"
* "proximity-lte"
* "proximity-wifi-lte"
* "proximity-wifi-left"
* "proximity-wifi-right"
These are used to indicate to userspace that these proximity
sensors may be used to tune transmit power to ensure that
Specific Absorption Rate (SAR) limits are honored.
The "-left" and "-right" labels are for devices with multiple
antennas.
In some laptops/tablets the standardized proximity sensor labels
instead indicate proximity to a specific part of the device:
* "proximity-palmrest" indicates proximity to the keyboard's palmrest
* "proximity-palmrest-left" indicates proximity to the left part of the palmrest
* "proximity-palmrest-right" indicates proximity to the right part of the palmrest
* "proximity-lap" indicates the device is being used on someone's lap
Note "proximity-lap" is special in that its value may be
calculated by firmware from other sensor readings, rather then
being a raw sensor reading.
For accelerometers used in 2-in-1s with 360° (yoga-style) hinges,
which have an accelerometer in both their base and their display,
the following standardized labels are used:
* "accel-base"
* "accel-display"
What: /sys/bus/iio/devices/iio:deviceX/current_timestamp_clock
KernelVersion: 4.5
Contact: linux-iio@vger.kernel.org
@ -1118,12 +1164,16 @@ Description:
What: /sys/bus/iio/devices/iio:deviceX/buffer/length
KernelVersion: 2.6.35
What: /sys/bus/iio/devices/iio:deviceX/bufferY/length
KernelVersion: 5.11
Contact: linux-iio@vger.kernel.org
Description:
Number of scans contained by the buffer.
What: /sys/bus/iio/devices/iio:deviceX/buffer/enable
KernelVersion: 2.6.35
What: /sys/bus/iio/devices/iio:deviceX/bufferY/enable
KernelVersion: 5.11
Contact: linux-iio@vger.kernel.org
Description:
Actually start the buffer capture up. Will start trigger
@ -1131,11 +1181,16 @@ Description:
What: /sys/bus/iio/devices/iio:deviceX/scan_elements
KernelVersion: 2.6.37
What: /sys/bus/iio/devices/iio:deviceX/bufferY
KernelVersion: 5.11
Contact: linux-iio@vger.kernel.org
Description:
Directory containing interfaces for elements that will be
captured for a single triggered sample set in the buffer.
Since kernel 5.11 the scan_elements attributes are merged into
the bufferY directory, to be configurable per buffer.
What: /sys/.../iio:deviceX/scan_elements/in_accel_x_en
What: /sys/.../iio:deviceX/scan_elements/in_accel_y_en
What: /sys/.../iio:deviceX/scan_elements/in_accel_z_en
@ -1164,6 +1219,34 @@ What: /sys/.../iio:deviceX/scan_elements/in_pressure_en
What: /sys/.../iio:deviceX/scan_elements/in_rot_quaternion_en
What: /sys/.../iio:deviceX/scan_elements/in_proximity_en
KernelVersion: 2.6.37
What: /sys/.../iio:deviceX/bufferY/in_accel_x_en
What: /sys/.../iio:deviceX/bufferY/in_accel_y_en
What: /sys/.../iio:deviceX/bufferY/in_accel_z_en
What: /sys/.../iio:deviceX/bufferY/in_anglvel_x_en
What: /sys/.../iio:deviceX/bufferY/in_anglvel_y_en
What: /sys/.../iio:deviceX/bufferY/in_anglvel_z_en
What: /sys/.../iio:deviceX/bufferY/in_magn_x_en
What: /sys/.../iio:deviceX/bufferY/in_magn_y_en
What: /sys/.../iio:deviceX/bufferY/in_magn_z_en
What: /sys/.../iio:deviceX/bufferY/in_rot_from_north_magnetic_en
What: /sys/.../iio:deviceX/bufferY/in_rot_from_north_true_en
What: /sys/.../iio:deviceX/bufferY/in_rot_from_north_magnetic_tilt_comp_en
What: /sys/.../iio:deviceX/bufferY/in_rot_from_north_true_tilt_comp_en
What: /sys/.../iio:deviceX/bufferY/in_timestamp_en
What: /sys/.../iio:deviceX/bufferY/in_voltageY_supply_en
What: /sys/.../iio:deviceX/bufferY/in_voltageY_en
What: /sys/.../iio:deviceX/bufferY/in_voltageY-voltageZ_en
What: /sys/.../iio:deviceX/bufferY/in_voltageY_i_en
What: /sys/.../iio:deviceX/bufferY/in_voltageY_q_en
What: /sys/.../iio:deviceX/bufferY/in_voltage_i_en
What: /sys/.../iio:deviceX/bufferY/in_voltage_q_en
What: /sys/.../iio:deviceX/bufferY/in_incli_x_en
What: /sys/.../iio:deviceX/bufferY/in_incli_y_en
What: /sys/.../iio:deviceX/bufferY/in_pressureY_en
What: /sys/.../iio:deviceX/bufferY/in_pressure_en
What: /sys/.../iio:deviceX/bufferY/in_rot_quaternion_en
What: /sys/.../iio:deviceX/bufferY/in_proximity_en
KernelVersion: 5.11
Contact: linux-iio@vger.kernel.org
Description:
Scan element control for triggered data capture.
@ -1185,6 +1268,23 @@ What: /sys/.../iio:deviceX/scan_elements/in_pressure_type
What: /sys/.../iio:deviceX/scan_elements/in_rot_quaternion_type
What: /sys/.../iio:deviceX/scan_elements/in_proximity_type
KernelVersion: 2.6.37
What: /sys/.../iio:deviceX/bufferY/in_accel_type
What: /sys/.../iio:deviceX/bufferY/in_anglvel_type
What: /sys/.../iio:deviceX/bufferY/in_magn_type
What: /sys/.../iio:deviceX/bufferY/in_incli_type
What: /sys/.../iio:deviceX/bufferY/in_voltageY_type
What: /sys/.../iio:deviceX/bufferY/in_voltage_type
What: /sys/.../iio:deviceX/bufferY/in_voltageY_supply_type
What: /sys/.../iio:deviceX/bufferY/in_voltageY_i_type
What: /sys/.../iio:deviceX/bufferY/in_voltageY_q_type
What: /sys/.../iio:deviceX/bufferY/in_voltage_i_type
What: /sys/.../iio:deviceX/bufferY/in_voltage_q_type
What: /sys/.../iio:deviceX/bufferY/in_timestamp_type
What: /sys/.../iio:deviceX/bufferY/in_pressureY_type
What: /sys/.../iio:deviceX/bufferY/in_pressure_type
What: /sys/.../iio:deviceX/bufferY/in_rot_quaternion_type
What: /sys/.../iio:deviceX/bufferY/in_proximity_type
KernelVersion: 5.11
Contact: linux-iio@vger.kernel.org
Description:
Description of the scan element data storage within the buffer
@ -1241,6 +1341,33 @@ What: /sys/.../iio:deviceX/scan_elements/in_pressure_index
What: /sys/.../iio:deviceX/scan_elements/in_rot_quaternion_index
What: /sys/.../iio:deviceX/scan_elements/in_proximity_index
KernelVersion: 2.6.37
What: /sys/.../iio:deviceX/bufferY/in_voltageY_index
What: /sys/.../iio:deviceX/bufferY/in_voltageY_supply_index
What: /sys/.../iio:deviceX/bufferY/in_voltageY_i_index
What: /sys/.../iio:deviceX/bufferY/in_voltageY_q_index
What: /sys/.../iio:deviceX/bufferY/in_voltage_i_index
What: /sys/.../iio:deviceX/bufferY/in_voltage_q_index
What: /sys/.../iio:deviceX/bufferY/in_accel_x_index
What: /sys/.../iio:deviceX/bufferY/in_accel_y_index
What: /sys/.../iio:deviceX/bufferY/in_accel_z_index
What: /sys/.../iio:deviceX/bufferY/in_anglvel_x_index
What: /sys/.../iio:deviceX/bufferY/in_anglvel_y_index
What: /sys/.../iio:deviceX/bufferY/in_anglvel_z_index
What: /sys/.../iio:deviceX/bufferY/in_magn_x_index
What: /sys/.../iio:deviceX/bufferY/in_magn_y_index
What: /sys/.../iio:deviceX/bufferY/in_magn_z_index
What: /sys/.../iio:deviceX/bufferY/in_rot_from_north_magnetic_index
What: /sys/.../iio:deviceX/bufferY/in_rot_from_north_true_index
What: /sys/.../iio:deviceX/bufferY/in_rot_from_north_magnetic_tilt_comp_index
What: /sys/.../iio:deviceX/bufferY/in_rot_from_north_true_tilt_comp_index
What: /sys/.../iio:deviceX/bufferY/in_incli_x_index
What: /sys/.../iio:deviceX/bufferY/in_incli_y_index
What: /sys/.../iio:deviceX/bufferY/in_timestamp_index
What: /sys/.../iio:deviceX/bufferY/in_pressureY_index
What: /sys/.../iio:deviceX/bufferY/in_pressure_index
What: /sys/.../iio:deviceX/bufferY/in_rot_quaternion_index
What: /sys/.../iio:deviceX/bufferY/in_proximity_index
KernelVersion: 5.11
Contact: linux-iio@vger.kernel.org
Description:
A single positive integer specifying the position of this
@ -1455,6 +1582,8 @@ Description:
What: /sys/bus/iio/devices/iio:deviceX/buffer/watermark
KernelVersion: 4.2
What: /sys/bus/iio/devices/iio:deviceX/bufferY/watermark
KernelVersion: 5.11
Contact: linux-iio@vger.kernel.org
Description:
A single positive integer specifying the maximum number of scan
@ -1473,6 +1602,8 @@ Description:
What: /sys/bus/iio/devices/iio:deviceX/buffer/data_available
KernelVersion: 4.16
What: /sys/bus/iio/devices/iio:deviceX/bufferY/data_available
KernelVersion: 5.11
Contact: linux-iio@vger.kernel.org
Description:
A read-only value indicating the bytes of data available in the
@ -1823,3 +1954,12 @@ Description:
hinge, keyboard, screen. It means the three channels
each correspond respectively to hinge angle, keyboard angle,
and screen angle.
What: /sys/bus/iio/devices/iio:deviceX/in_illuminance_hysteresis_relative
What: /sys/bus/iio/devices/iio:deviceX/in_intensity_hysteresis_relative
KernelVersion: 5.12
Contact: linux-iio@vger.kernel.org
Description:
Specify the percent for light sensor relative to the channel
absolute value that a data field should change before an event
is generated. Units are a percentage of the prior reading.

133
Documentation/ABI/testing/sysfs-bus-iio-counter-104-quad-8
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@ -1,133 +0,0 @@
What: /sys/bus/iio/devices/iio:deviceX/in_count_count_mode_available
What: /sys/bus/iio/devices/iio:deviceX/in_count_noise_error_available
What: /sys/bus/iio/devices/iio:deviceX/in_count_quadrature_mode_available
What: /sys/bus/iio/devices/iio:deviceX/in_index_index_polarity_available
What: /sys/bus/iio/devices/iio:deviceX/in_index_synchronous_mode_available
KernelVersion: 4.10
Contact: linux-iio@vger.kernel.org
Description:
This interface is deprecated; please use the Counter subsystem.
Discrete set of available values for the respective counter
configuration are listed in this file.
What: /sys/bus/iio/devices/iio:deviceX/in_countY_count_mode
KernelVersion: 4.10
Contact: linux-iio@vger.kernel.org
Description:
This interface is deprecated; please use the Counter subsystem.
Count mode for channel Y. Four count modes are available:
normal, range limit, non-recycle, and modulo-n. The preset value
for channel Y is used by the count mode where required.
Normal:
Counting is continuous in either direction.
Range Limit:
An upper or lower limit is set, mimicking limit switches
in the mechanical counterpart. The upper limit is set to
the preset value, while the lower limit is set to 0. The
counter freezes at count = preset when counting up, and
at count = 0 when counting down. At either of these
limits, the counting is resumed only when the count
direction is reversed.
Non-recycle:
Counter is disabled whenever a 24-bit count overflow or
underflow takes place. The counter is re-enabled when a
new count value is loaded to the counter via a preset
operation or write to raw.
Modulo-N:
A count boundary is set between 0 and the preset value.
The counter is reset to 0 at count = preset when
counting up, while the counter is set to the preset
value at count = 0 when counting down; the counter does
not freeze at the bundary points, but counts
continuously throughout.
What: /sys/bus/iio/devices/iio:deviceX/in_countY_noise_error
KernelVersion: 4.10
Contact: linux-iio@vger.kernel.org
Description:
This interface is deprecated; please use the Counter subsystem.
Read-only attribute that indicates whether excessive noise is
present at the channel Y count inputs in quadrature clock mode;
irrelevant in non-quadrature clock mode.
What: /sys/bus/iio/devices/iio:deviceX/in_countY_preset
KernelVersion: 4.10
Contact: linux-iio@vger.kernel.org
Description:
This interface is deprecated; please use the Counter subsystem.
If the counter device supports preset registers, the preset
count for channel Y is provided by this attribute.
What: /sys/bus/iio/devices/iio:deviceX/in_countY_quadrature_mode
KernelVersion: 4.10
Contact: linux-iio@vger.kernel.org
Description:
This interface is deprecated; please use the Counter subsystem.
Configure channel Y counter for non-quadrature or quadrature
clock mode. Selecting non-quadrature clock mode will disable
synchronous load mode. In quadrature clock mode, the channel Y
scale attribute selects the encoder phase division (scale of 1
selects full-cycle, scale of 0.5 selects half-cycle, scale of
0.25 selects quarter-cycle) processed by the channel Y counter.
Non-quadrature:
The filter and decoder circuit are bypassed. Encoder A
input serves as the count input and B as the UP/DOWN
direction control input, with B = 1 selecting UP Count
mode and B = 0 selecting Down Count mode.
Quadrature:
Encoder A and B inputs are digitally filtered and
decoded for UP/DN clock.
What: /sys/bus/iio/devices/iio:deviceX/in_countY_set_to_preset_on_index
KernelVersion: 4.10
Contact: linux-iio@vger.kernel.org
Description:
This interface is deprecated; please use the Counter subsystem.
Whether to set channel Y counter with channel Y preset value
when channel Y index input is active, or continuously count.
Valid attribute values are boolean.
What: /sys/bus/iio/devices/iio:deviceX/in_indexY_index_polarity
KernelVersion: 4.10
Contact: linux-iio@vger.kernel.org
Description:
This interface is deprecated; please use the Counter subsystem.
Active level of channel Y index input; irrelevant in
non-synchronous load mode.
What: /sys/bus/iio/devices/iio:deviceX/in_indexY_synchronous_mode
KernelVersion: 4.10
Contact: linux-iio@vger.kernel.org
Description:
This interface is deprecated; please use the Counter subsystem.
Configure channel Y counter for non-synchronous or synchronous
load mode. Synchronous load mode cannot be selected in
non-quadrature clock mode.
Non-synchronous:
A logic low level is the active level at this index
input. The index function (as enabled via
set_to_preset_on_index) is performed directly on the
active level of the index input.
Synchronous:
Intended for interfacing with encoder Index output in
quadrature clock mode. The active level is configured
via index_polarity. The index function (as enabled via
set_to_preset_on_index) is performed synchronously with
the quadrature clock on the active level of the index
input.

8
Documentation/ABI/testing/sysfs-bus-iio-distance-srf08
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@ -1,11 +1,3 @@
What: /sys/bus/iio/devices/iio:deviceX/sensor_sensitivity
Date: January 2017
KernelVersion: 4.11
Contact: linux-iio@vger.kernel.org
Description:
Show or set the gain boost of the amp, from 0-31 range.
default 31
What: /sys/bus/iio/devices/iio:deviceX/sensor_max_range
Date: January 2017
KernelVersion: 4.11

3
Documentation/ABI/testing/sysfs-bus-iio-humidity-hdc2010 → Documentation/ABI/testing/sysfs-bus-iio-humidity
View File

@ -6,4 +6,5 @@ Description:
Controls the heater device within the humidity sensor to get
rid of excess condensation.
Valid control values are 0 = OFF, and 1 = ON.
In some devices, this is just a switch in which case 0 = OFF,
and 1 = ON.

9
Documentation/ABI/testing/sysfs-bus-iio-humidity-hdc100x
View File

@ -1,9 +0,0 @@
What: /sys/bus/iio/devices/iio:deviceX/out_current_heater_raw
What: /sys/bus/iio/devices/iio:deviceX/out_current_heater_raw_available
KernelVersion: 4.3
Contact: linux-iio@vger.kernel.org
Description:
Controls the heater device within the humidity sensor to get
rid of excess condensation.
Valid control values are 0 = OFF, and 1 = ON.

62
Documentation/ABI/testing/sysfs-bus-iio-lptimer-stm32
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@ -1,62 +0,0 @@
What: /sys/bus/iio/devices/iio:deviceX/in_count0_preset
KernelVersion: 4.13
Contact: fabrice.gasnier@st.com
Description:
Reading returns the current preset value. Writing sets the
preset value. Encoder counts continuously from 0 to preset
value, depending on direction (up/down).
What: /sys/bus/iio/devices/iio:deviceX/in_count_quadrature_mode_available
KernelVersion: 4.13
Contact: fabrice.gasnier@st.com
Description:
Reading returns the list possible quadrature modes.
What: /sys/bus/iio/devices/iio:deviceX/in_count0_quadrature_mode
KernelVersion: 4.13
Contact: fabrice.gasnier@st.com
Description:
Configure the device counter quadrature modes:
- non-quadrature:
Encoder IN1 input servers as the count input (up
direction).
- quadrature:
Encoder IN1 and IN2 inputs are mixed to get direction
and count.
What: /sys/bus/iio/devices/iio:deviceX/in_count_polarity_available
KernelVersion: 4.13
Contact: fabrice.gasnier@st.com
Description:
Reading returns the list possible active edges.
What: /sys/bus/iio/devices/iio:deviceX/in_count0_polarity
KernelVersion: 4.13
Contact: fabrice.gasnier@st.com
Description:
Configure the device encoder/counter active edge:
- rising-edge
- falling-edge
- both-edges
In non-quadrature mode, device counts up on active edge.
In quadrature mode, encoder counting scenarios are as follows:
+---------+----------+--------------------+--------------------+
| Active | Level on | IN1 signal | IN2 signal |
| edge | opposite +----------+---------+----------+---------+
| | signal | Rising | Falling | Rising | Falling |
+---------+----------+----------+---------+----------+---------+
| Rising | High -> | Down | - | Up | - |
| edge | Low -> | Up | - | Down | - |
+---------+----------+----------+---------+----------+---------+
| Falling | High -> | - | Up | - | Down |
| edge | Low -> | - | Down | - | Up |
+---------+----------+----------+---------+----------+---------+
| Both | High -> | Down | Up | Up | Down |
| edges | Low -> | Up | Down | Down | Up |
+---------+----------+----------+---------+----------+---------+

14
Documentation/ABI/testing/sysfs-bus-iio-proximity
View File

@ -8,3 +8,17 @@ Description:
considered close to the device. If the value read from the
sensor is above or equal to the value in this file an object
should typically be considered near.
What: /sys/bus/iio/devices/iio:deviceX/sensor_sensitivity
Date: March 2014
KernelVersion: 3.15
Contact: linux-iio@vger.kernel.org
Description:
Proximity sensors sometimes have a controllable amplifier
on the signal from which time of flight measurements are
taken.
The appropriate values to take is dependent on both the
sensor and it's operating environment:
* as3935 (0-31 range)
18 = indoors (default)
14 = outdoors

9
Documentation/ABI/testing/sysfs-bus-iio-proximity-as3935
View File

@ -6,15 +6,6 @@ Description:
Get the current distance in meters of storm (1km steps)
1000-40000 = distance in meters
What: /sys/bus/iio/devices/iio:deviceX/sensor_sensitivity
Date: March 2014
KernelVersion: 3.15
Contact: Matt Ranostay <matt.ranostay@konsulko.com>
Description:
Show or set the gain boost of the amp, from 0-31 range.
18 = indoors (default)
14 = outdoors
What /sys/bus/iio/devices/iio:deviceX/noise_level_tripped
Date: May 2017
KernelVersion: 4.13

62
Documentation/devicetree/bindings/counter/interrupt-counter.yaml Normal file
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@ -0,0 +1,62 @@
# SPDX-License-Identifier: GPL-2.0
%YAML 1.2
---
$id: http://devicetree.org/schemas/counter/interrupt-counter.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Interrupt counter
maintainers:
- Oleksij Rempel <o.rempel@pengutronix.de>
description: |
A generic interrupt counter to measure interrupt frequency. It was developed
and used for agricultural devices to measure rotation speed of wheels or
other tools. Since the direction of rotation is not important, only one
signal line is needed.
Interrupts or gpios are required. If both are defined, the interrupt will
take precedence for counting interrupts.
properties:
compatible:
const: interrupt-counter
interrupts:
maxItems: 1
gpios:
maxItems: 1
required:
- compatible
anyOf:
- required: [ interrupts-extended ]
- required: [ interrupts ]
- required: [ gpios ]
additionalProperties: false
examples:
- |
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/gpio/gpio.h>
counter-0 {
compatible = "interrupt-counter";
interrupts-extended = <&gpio 0 IRQ_TYPE_EDGE_RISING>;
};
counter-1 {
compatible = "interrupt-counter";
gpios = <&gpio 2 GPIO_ACTIVE_HIGH>;
};
counter-2 {
compatible = "interrupt-counter";
interrupts-extended = <&gpio 2 IRQ_TYPE_EDGE_RISING>;
gpios = <&gpio 2 GPIO_ACTIVE_HIGH>;
};
...

68
Documentation/devicetree/bindings/iio/accel/bosch,bmi088.yaml Normal file
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@ -0,0 +1,68 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/iio/accel/bosch,bmi088.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Bosch BMI088 IMU accelerometer part
maintainers:
- Mike Looijmans <mike.looijmans@topic.nl>
description: |
Acceleration part of the IMU sensor with an SPI interface
Specifications about the sensor can be found at:
https://www.bosch-sensortec.com/media/boschsensortec/downloads/datasheets/bst-bmi088-ds001.pdf
properties:
compatible:
enum:
- bosch,bmi088-accel
reg:
maxItems: 1
spi-max-frequency: true
vdd-supply: true
vddio-supply: true
interrupts:
minItems: 1
maxItems: 2
description: |
Type should be either IRQ_TYPE_LEVEL_HIGH or IRQ_TYPE_LEVEL_LOW.
Two configurable interrupt lines exist.
interrupt-names:
description: Specify which interrupt line is in use.
items:
enum:
- INT1
- INT2
minItems: 1
maxItems: 2
required:
- compatible
- reg
additionalProperties: false
examples:
- |
#include <dt-bindings/interrupt-controller/irq.h>
spi {
#address-cells = <1>;
#size-cells = <0>;
bmi088-accel@1 {
compatible = "bosch,bmi088-accel";
reg = <1>;
spi-max-frequency = <10000000>;
interrupt-parent = <&gpio6>;
interrupts = <19 IRQ_TYPE_LEVEL_LOW>;
interrupt-names = "INT2";
};
};
...

1
Documentation/devicetree/bindings/iio/adc/mediatek,mt2701-auxadc.yaml
View File

@ -34,6 +34,7 @@ properties:
- items:
- enum:
- mediatek,mt8183-auxadc
- mediatek,mt8195-auxadc
- mediatek,mt8516-auxadc
- const: mediatek,mt8173-auxadc

181
Documentation/devicetree/bindings/iio/adc/ti,ads131e08.yaml Normal file
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@ -0,0 +1,181 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/iio/adc/ti,ads131e08.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Texas Instruments ADS131E0x 4-, 6- and 8-Channel ADCs
maintainers:
- Tomislav Denis <tomislav.denis@avl.com>
description: |
The ADS131E0x are a family of multichannel, simultaneous sampling,
24-bit, delta-sigma, analog-to-digital converters (ADCs) with a
built-in programmable gain amplifier (PGA), internal reference
and an onboard oscillator.
The communication with ADC chip is via the SPI bus (mode 1).
https://www.ti.com/lit/ds/symlink/ads131e08.pdf
properties:
compatible:
enum:
- ti,ads131e04
- ti,ads131e06
- ti,ads131e08
reg:
maxItems: 1
spi-max-frequency: true
spi-cpha: true
clocks:
description: |
Device tree identifier to the clock source (2.048 MHz).
Note: clock source is selected using CLKSEL pin.
maxItems: 1
clock-names:
items:
- const: adc-clk
interrupts:
description: |
IRQ line for the ADC data ready.
maxItems: 1
vref-supply:
description: |
Optional external voltage reference. If not supplied, internal voltage
reference is used.
ti,vref-internal:
description: |
Select the internal voltage reference value.
0: 2.4V
1: 4.0V
If this field is left empty, 2.4V is selected.
Note: internal voltage reference is used only if vref-supply is not supplied.
$ref: /schemas/types.yaml#/definitions/uint32
enum: [0, 1]
default: 0
'#address-cells':
const: 1
'#size-cells':
const: 0
required:
- compatible
- reg
- spi-cpha
- clocks
- clock-names
- interrupts
patternProperties:
"^channel@([0-7])$":
$ref: "adc.yaml"
type: object
description: |
Represents the external channels which are connected to the ADC.
properties:
reg:
description: |
The channel number.
Up to 4 channels, numbered from 0 to 3 for ti,ads131e04.
Up to 6 channels, numbered from 0 to 5 for ti,ads131e06.
Up to 8 channels, numbered from 0 to 7 for ti,ads131e08.
items:
minimum: 0
maximum: 7
ti,gain:
description: |
The PGA gain value for the channel.
If this field is left empty, PGA gain 1 is used.
$ref: /schemas/types.yaml#/definitions/uint32
enum: [1, 2, 4, 8, 12]
default: 1
ti,mux:
description: |
Channel input selection(muliplexer).
0: Normal input.
1: Input shorted to (VREFP + VREFN) / 2 (for offset or noise measurements).
3: MVDD (for supply measurement)
4: Temperature sensor
If this field is left empty, normal input is selected.
$ref: /schemas/types.yaml#/definitions/uint32
enum: [0, 1, 3, 4]
default: 0
required:
- reg
additionalProperties: false
additionalProperties: false
examples:
- |
#include <dt-bindings/interrupt-controller/irq.h>
spi {
#address-cells = <1>;
#size-cells = <0>;
adc@0 {
compatible = "ti,ads131e08";
reg = <0>;
spi-max-frequency = <1000000>;
spi-cpha;
clocks = <&clk2048k>;
clock-names = "adc-clk";
interrupt-parent = <&gpio5>;
interrupts = <28 IRQ_TYPE_EDGE_FALLING>;
vref-supply = <&adc_vref>;
#address-cells = <1>;
#size-cells = <0>;
channel@0 {
reg = <0>;
};
channel@1 {
reg = <1>;
};
channel@2 {
reg = <2>;
ti,gain = <2>;
};
channel@3 {
reg = <3>;
};
channel@4 {
reg = <4>;
};
channel@5 {
reg = <5>;
};
channel@6 {
reg = <6>;
};
channel@7 {
reg = <7>;
ti,mux = <4>;
};
};
};

9
Documentation/devicetree/bindings/iio/imu/adi,adis16475.yaml
View File

@ -71,15 +71,6 @@ properties:
minimum: 0
maximum: 3
adi,scaled-output-hz:
description:
This property must be present if the clock mode is scaled-sync through
clock-names property. In this mode, the input clock can have a range
of 1Hz to 128HZ which must be scaled to originate an allowable sample
rate. This property specifies that rate.
minimum: 1900
maximum: 2100
required:
- compatible
- reg

37
Documentation/devicetree/bindings/iio/proximity/google,cros-ec-mkbp-proximity.yaml Normal file
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@ -0,0 +1,37 @@
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/iio/proximity/google,cros-ec-mkbp-proximity.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: ChromeOS EC MKBP Proximity Sensor
maintainers:
- Stephen Boyd <swboyd@chromium.org>
- Benson Leung <bleung@chromium.org>
- Enric Balletbo i Serra <enric.balletbo@collabora.com>
description: |
Google's ChromeOS EC sometimes has the ability to detect user proximity.
This is implemented on the EC as near/far logic and exposed to the OS
via an MKBP switch bit.
properties:
compatible:
const: google,cros-ec-mkbp-proximity
label:
description: Name for proximity sensor
required:
- compatible
additionalProperties: false
examples:
- |
proximity {
compatible = "google,cros-ec-mkbp-proximity";
label = "proximity-wifi-lte";
};

1
Documentation/devicetree/bindings/iio/st,st-sensors.yaml
View File

@ -66,6 +66,7 @@ properties:
- st,lis3mdl-magn
- st,lis2mdl
- st,lsm9ds1-magn
- st,iis2mdc
# Pressure sensors
- st,lps001wp-press
- st,lps25h-press

7
Documentation/devicetree/bindings/mfd/google,cros-ec.yaml
View File

@ -94,6 +94,9 @@ properties:
keyboard-controller:
$ref: "/schemas/input/google,cros-ec-keyb.yaml#"
proximity:
$ref: "/schemas/iio/proximity/google,cros-ec-mkbp-proximity.yaml#"
codecs:
type: object
additionalProperties: false
@ -180,6 +183,10 @@ examples:
interrupts = <99 0>;
interrupt-parent = <&gpio7>;
spi-max-frequency = <5000000>;
proximity {
compatible = "google,cros-ec-mkbp-proximity";
};
};
};

3
Documentation/driver-api/driver-model/devres.rst
View File

@ -285,7 +285,8 @@ I2C
IIO
devm_iio_device_alloc()
devm_iio_device_register()
devm_iio_kfifo_allocate()
devm_iio_dmaengine_buffer_setup()
devm_iio_kfifo_buffer_setup()
devm_iio_triggered_buffer_setup()
devm_iio_trigger_alloc()
devm_iio_trigger_register()

15
Documentation/driver-api/iio/buffers.rst
View File

@ -28,24 +28,26 @@ IIO buffer setup
The meta information associated with a channel reading placed in a buffer is
called a scan element. The important bits configuring scan elements are
exposed to userspace applications via the
:file:`/sys/bus/iio/iio:device{X}/scan_elements/*` directory. This file contains
:file:`/sys/bus/iio/iio:device{X}/scan_elements/` directory. This directory contains
attributes of the following form:
* :file:`enable`, used for enabling a channel. If and only if its attribute
is non *zero*, then a triggered capture will contain data samples for this
channel.
* :file:`index`, the scan_index of the channel.
* :file:`type`, description of the scan element data storage within the buffer
and hence the form in which it is read from user space.
Format is [be|le]:[s|u]bits/storagebitsXrepeat[>>shift] .
Format is [be|le]:[s|u]bits/storagebits[Xrepeat][>>shift] .
* *be* or *le*, specifies big or little endian.
* *s* or *u*, specifies if signed (2's complement) or unsigned.
* *bits*, is the number of valid data bits.
* *storagebits*, is the number of bits (after padding) that it occupies in the
buffer.
* *shift*, if specified, is the shift that needs to be applied prior to
masking out unused bits.
buffer.
* *repeat*, specifies the number of bits/storagebits repetitions. When the
repeat element is 0 or 1, then the repeat value is omitted.
repeat element is 0 or 1, then the repeat value is omitted.
* *shift*, if specified, is the shift that needs to be applied prior to
masking out unused bits.
For example, a driver for a 3-axis accelerometer with 12 bit resolution where
data is stored in two 8-bits registers as follows::
@ -122,4 +124,3 @@ More details
.. kernel-doc:: include/linux/iio/buffer.h
.. kernel-doc:: drivers/iio/industrialio-buffer.c
:export:

3
Documentation/iio/iio_configfs.rst
View File

@ -71,7 +71,7 @@ kernel module following the interface in include/linux/iio/sw_trigger.h::
.ops = &iio_trig_sample_ops,
};
module_iio_sw_trigger_driver(iio_trig_sample);
module_iio_sw_trigger_driver(iio_trig_sample);
Each trigger type has its own directory under /config/iio/triggers. Loading
iio-trig-sample module will create 'trig-sample' trigger type directory
@ -99,3 +99,4 @@ Each trigger can have one or more attributes specific to the trigger type.
"hrtimer" trigger type doesn't have any configurable attribute from /config dir.
It does introduce the sampling_frequency attribute to trigger directory.
That attribute sets the polling frequency in Hz, with mHz precision.

1
Documentation/userspace-api/ioctl/ioctl-number.rst
View File

@ -245,6 +245,7 @@ Code Seq# Include File Comments
'i' 00-3F linux/i2o-dev.h conflict!
'i' 0B-1F linux/ipmi.h conflict!
'i' 80-8F linux/i8k.h
'i' 90-9F `linux/iio/*.h` IIO
'j' 00-3F linux/joystick.h
'k' 00-0F linux/spi/spidev.h conflict!
'k' 00-05 video/kyro.h conflict!

22
MAINTAINERS
View File

@ -300,7 +300,6 @@ M: Syed Nayyar Waris <syednwaris@gmail.com>
L: linux-iio@vger.kernel.org
S: Maintained
F: Documentation/ABI/testing/sysfs-bus-counter-104-quad-8
F: Documentation/ABI/testing/sysfs-bus-iio-counter-104-quad-8
F: drivers/counter/104-quad-8.c
ACCES PCI-IDIO-16 GPIO DRIVER
@ -8683,10 +8682,15 @@ S: Maintained
F: Documentation/devicetree/bindings/iio/multiplexer/io-channel-mux.txt
F: drivers/iio/multiplexer/iio-mux.c
IIO SCMI BASED DRIVER
M: Jyoti Bhayana <jbhayana@google.com>
L: linux-iio@vger.kernel.org
S: Maintained
F: drivers/iio/common/scmi_sensors/scmi_iio.c
IIO SUBSYSTEM AND DRIVERS
M: Jonathan Cameron <jic23@kernel.org>
R: Lars-Peter Clausen <lars@metafoo.de>
R: Peter Meerwald-Stadler <pmeerw@pmeerw.net>
L: linux-iio@vger.kernel.org
S: Maintained
T: git git://git.kernel.org/pub/scm/linux/kernel/git/jic23/iio.git
@ -9281,6 +9285,13 @@ F: include/dt-bindings/interconnect/
F: include/linux/interconnect-provider.h
F: include/linux/interconnect.h
INTERRUPT COUNTER DRIVER
M: Oleksij Rempel <o.rempel@pengutronix.de>
R: Pengutronix Kernel Team <kernel@pengutronix.de>
L: linux-iio@vger.kernel.org
F: Documentation/devicetree/bindings/counter/interrupt-counter.yaml
F: drivers/counter/interrupt-cnt.c
INVENSENSE ICM-426xx IMU DRIVER
M: Jean-Baptiste Maneyrol <jmaneyrol@invensense.com>
L: linux-iio@vger.kernel.org
@ -17820,6 +17831,13 @@ M: Robert Richter <rric@kernel.org>
S: Odd Fixes
F: drivers/gpio/gpio-thunderx.c
TI ADS131E0X ADC SERIES DRIVER
M: Tomislav Denis <tomislav.denis@avl.com>
L: linux-iio@vger.kernel.org
S: Maintained
F: Documentation/devicetree/bindings/iio/adc/ti,ads131e08.yaml
F: drivers/iio/adc/ti-ads131e08.c
TI AM437X VPFE DRIVER
M: "Lad, Prabhakar" <prabhakar.csengg@gmail.com>
L: linux-media@vger.kernel.org

653
drivers/counter/104-quad-8.c
View File

@ -9,8 +9,6 @@
#include <linux/counter.h>
#include <linux/device.h>
#include <linux/errno.h>
#include <linux/iio/iio.h>
#include <linux/iio/types.h>
#include <linux/io.h>
#include <linux/ioport.h>
#include <linux/isa.h>
@ -29,7 +27,7 @@ MODULE_PARM_DESC(base, "ACCES 104-QUAD-8 base addresses");
#define QUAD8_NUM_COUNTERS 8
/**
* struct quad8_iio - IIO device private data structure
* struct quad8 - device private data structure
* @counter: instance of the counter_device
* @fck_prescaler: array of filter clock prescaler configurations
* @preset: array of preset values
@ -41,9 +39,9 @@ MODULE_PARM_DESC(base, "ACCES 104-QUAD-8 base addresses");
* @synchronous_mode: array of index function synchronous mode configurations
* @index_polarity: array of index function polarity configurations
* @cable_fault_enable: differential encoder cable status enable configurations
* @base: base port address of the IIO device
* @base: base port address of the device
*/
struct quad8_iio {
struct quad8 {
struct mutex lock;
struct counter_device counter;
unsigned int fck_prescaler[QUAD8_NUM_COUNTERS];
@ -98,532 +96,10 @@ struct quad8_iio {
#define QUAD8_CMR_QUADRATURE_X2 0x10
#define QUAD8_CMR_QUADRATURE_X4 0x18
static int quad8_read_raw(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan, int *val, int *val2, long mask)
{
struct quad8_iio *const priv = iio_priv(indio_dev);
const int base_offset = priv->base + 2 * chan->channel;
unsigned int flags;
unsigned int borrow;
unsigned int carry;
int i;
switch (mask) {
case IIO_CHAN_INFO_RAW:
if (chan->type == IIO_INDEX) {
*val = !!(inb(priv->base + QUAD8_REG_INDEX_INPUT_LEVELS)
& BIT(chan->channel));
return IIO_VAL_INT;
}
flags = inb(base_offset + 1);
borrow = flags & QUAD8_FLAG_BT;
carry = !!(flags & QUAD8_FLAG_CT);
/* Borrow XOR Carry effectively doubles count range */
*val = (borrow ^ carry) << 24;
mutex_lock(&priv->lock);
/* Reset Byte Pointer; transfer Counter to Output Latch */
outb(QUAD8_CTR_RLD | QUAD8_RLD_RESET_BP | QUAD8_RLD_CNTR_OUT,
base_offset + 1);
for (i = 0; i < 3; i++)
*val |= (unsigned int)inb(base_offset) << (8 * i);
mutex_unlock(&priv->lock);
return IIO_VAL_INT;
case IIO_CHAN_INFO_ENABLE:
*val = priv->ab_enable[chan->channel];
return IIO_VAL_INT;
case IIO_CHAN_INFO_SCALE:
*val = 1;
*val2 = priv->quadrature_scale[chan->channel];
return IIO_VAL_FRACTIONAL_LOG2;
}
return -EINVAL;
}
static int quad8_write_raw(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan, int val, int val2, long mask)
{
struct quad8_iio *const priv = iio_priv(indio_dev);
const int base_offset = priv->base + 2 * chan->channel;
int i;
unsigned int ior_cfg;
switch (mask) {
case IIO_CHAN_INFO_RAW:
if (chan->type == IIO_INDEX)
return -EINVAL;
/* Only 24-bit values are supported */
if ((unsigned int)val > 0xFFFFFF)
return -EINVAL;
mutex_lock(&priv->lock);
/* Reset Byte Pointer */
outb(QUAD8_CTR_RLD | QUAD8_RLD_RESET_BP, base_offset + 1);
/* Counter can only be set via Preset Register */
for (i = 0; i < 3; i++)
outb(val >> (8 * i), base_offset);
/* Transfer Preset Register to Counter */
outb(QUAD8_CTR_RLD | QUAD8_RLD_PRESET_CNTR, base_offset + 1);
/* Reset Byte Pointer */
outb(QUAD8_CTR_RLD | QUAD8_RLD_RESET_BP, base_offset + 1);
/* Set Preset Register back to original value */
val = priv->preset[chan->channel];
for (i = 0; i < 3; i++)
outb(val >> (8 * i), base_offset);
/* Reset Borrow, Carry, Compare, and Sign flags */
outb(QUAD8_CTR_RLD | QUAD8_RLD_RESET_FLAGS, base_offset + 1);
/* Reset Error flag */
outb(QUAD8_CTR_RLD | QUAD8_RLD_RESET_E, base_offset + 1);
mutex_unlock(&priv->lock);
return 0;
case IIO_CHAN_INFO_ENABLE:
/* only boolean values accepted */
if (val < 0 || val > 1)
return -EINVAL;
mutex_lock(&priv->lock);
priv->ab_enable[chan->channel] = val;
ior_cfg = val | priv->preset_enable[chan->channel] << 1;
/* Load I/O control configuration */
outb(QUAD8_CTR_IOR | ior_cfg, base_offset + 1);
mutex_unlock(&priv->lock);
return 0;
case IIO_CHAN_INFO_SCALE:
mutex_lock(&priv->lock);
/* Quadrature scaling only available in quadrature mode */
if (!priv->quadrature_mode[chan->channel] &&
(val2 || val != 1)) {
mutex_unlock(&priv->lock);
return -EINVAL;
}
/* Only three gain states (1, 0.5, 0.25) */
if (val == 1 && !val2)
priv->quadrature_scale[chan->channel] = 0;
else if (!val)
switch (val2) {
case 500000:
priv->quadrature_scale[chan->channel] = 1;
break;
case 250000:
priv->quadrature_scale[chan->channel] = 2;
break;
default:
mutex_unlock(&priv->lock);
return -EINVAL;
}
else {
mutex_unlock(&priv->lock);
return -EINVAL;
}
mutex_unlock(&priv->lock);
return 0;
}
return -EINVAL;
}
static const struct iio_info quad8_info = {
.read_raw = quad8_read_raw,
.write_raw = quad8_write_raw
};
static ssize_t quad8_read_preset(struct iio_dev *indio_dev, uintptr_t private,
const struct iio_chan_spec *chan, char *buf)
{
const struct quad8_iio *const priv = iio_priv(indio_dev);
return snprintf(buf, PAGE_SIZE, "%u\n", priv->preset[chan->channel]);
}
static ssize_t quad8_write_preset(struct iio_dev *indio_dev, uintptr_t private,
const struct iio_chan_spec *chan, const char *buf, size_t len)
{
struct quad8_iio *const priv = iio_priv(indio_dev);
const int base_offset = priv->base + 2 * chan->channel;
unsigned int preset;
int ret;
int i;
ret = kstrtouint(buf, 0, &preset);
if (ret)
return ret;
/* Only 24-bit values are supported */
if (preset > 0xFFFFFF)
return -EINVAL;
mutex_lock(&priv->lock);
priv->preset[chan->channel] = preset;
/* Reset Byte Pointer */
outb(QUAD8_CTR_RLD | QUAD8_RLD_RESET_BP, base_offset + 1);
/* Set Preset Register */
for (i = 0; i < 3; i++)
outb(preset >> (8 * i), base_offset);
mutex_unlock(&priv->lock);
return len;
}
static ssize_t quad8_read_set_to_preset_on_index(struct iio_dev *indio_dev,
uintptr_t private, const struct iio_chan_spec *chan, char *buf)
{
const struct quad8_iio *const priv = iio_priv(indio_dev);
return snprintf(buf, PAGE_SIZE, "%u\n",
!priv->preset_enable[chan->channel]);
}
static ssize_t quad8_write_set_to_preset_on_index(struct iio_dev *indio_dev,
uintptr_t private, const struct iio_chan_spec *chan, const char *buf,
size_t len)
{
struct quad8_iio *const priv = iio_priv(indio_dev);
const int base_offset = priv->base + 2 * chan->channel + 1;
bool preset_enable;
int ret;
unsigned int ior_cfg;
ret = kstrtobool(buf, &preset_enable);
if (ret)
return ret;
/* Preset enable is active low in Input/Output Control register */
preset_enable = !preset_enable;
mutex_lock(&priv->lock);
priv->preset_enable[chan->channel] = preset_enable;
ior_cfg = priv->ab_enable[chan->channel] |
(unsigned int)preset_enable << 1;
/* Load I/O control configuration to Input / Output Control Register */
outb(QUAD8_CTR_IOR | ior_cfg, base_offset);
mutex_unlock(&priv->lock);
return len;
}
static const char *const quad8_noise_error_states[] = {
"No excessive noise is present at the count inputs",
"Excessive noise is present at the count inputs"
};
static int quad8_get_noise_error(struct iio_dev *indio_dev,
const struct iio_chan_spec *chan)
{
struct quad8_iio *const priv = iio_priv(indio_dev);
const int base_offset = priv->base + 2 * chan->channel + 1;
return !!(inb(base_offset) & QUAD8_FLAG_E);
}
static const struct iio_enum quad8_noise_error_enum = {
.items = quad8_noise_error_states,
.num_items = ARRAY_SIZE(quad8_noise_error_states),
.get = quad8_get_noise_error
};
static const char *const quad8_count_direction_states[] = {
"down",
"up"
};
static int quad8_get_count_direction(struct iio_dev *indio_dev,
const struct iio_chan_spec *chan)
{
struct quad8_iio *const priv = iio_priv(indio_dev);
const int base_offset = priv->base + 2 * chan->channel + 1;
return !!(inb(base_offset) & QUAD8_FLAG_UD);
}
static const struct iio_enum quad8_count_direction_enum = {
.items = quad8_count_direction_states,
.num_items = ARRAY_SIZE(quad8_count_direction_states),
.get = quad8_get_count_direction
};
static const char *const quad8_count_modes[] = {
"normal",
"range limit",
"non-recycle",
"modulo-n"
};
static int quad8_set_count_mode(struct iio_dev *indio_dev,
const struct iio_chan_spec *chan, unsigned int cnt_mode)
{
struct quad8_iio *const priv = iio_priv(indio_dev);
unsigned int mode_cfg = cnt_mode << 1;
const int base_offset = priv->base + 2 * chan->channel + 1;
mutex_lock(&priv->lock);
priv->count_mode[chan->channel] = cnt_mode;
/* Add quadrature mode configuration */
if (priv->quadrature_mode[chan->channel])
mode_cfg |= (priv->quadrature_scale[chan->channel] + 1) << 3;
/* Load mode configuration to Counter Mode Register */
outb(QUAD8_CTR_CMR | mode_cfg, base_offset);
mutex_unlock(&priv->lock);
return 0;
}
static int quad8_get_count_mode(struct iio_dev *indio_dev,
const struct iio_chan_spec *chan)
{
const struct quad8_iio *const priv = iio_priv(indio_dev);
return priv->count_mode[chan->channel];
}
static const struct iio_enum quad8_count_mode_enum = {
.items = quad8_count_modes,
.num_items = ARRAY_SIZE(quad8_count_modes),
.set = quad8_set_count_mode,
.get = quad8_get_count_mode
};
static const char *const quad8_synchronous_modes[] = {
"non-synchronous",
"synchronous"
};
static int quad8_set_synchronous_mode(struct iio_dev *indio_dev,
const struct iio_chan_spec *chan, unsigned int synchronous_mode)
{
struct quad8_iio *const priv = iio_priv(indio_dev);
const int base_offset = priv->base + 2 * chan->channel + 1;
unsigned int idr_cfg = synchronous_mode;
mutex_lock(&priv->lock);
idr_cfg |= priv->index_polarity[chan->channel] << 1;
/* Index function must be non-synchronous in non-quadrature mode */
if (synchronous_mode && !priv->quadrature_mode[chan->channel]) {
mutex_unlock(&priv->lock);
return -EINVAL;
}
priv->synchronous_mode[chan->channel] = synchronous_mode;
/* Load Index Control configuration to Index Control Register */
outb(QUAD8_CTR_IDR | idr_cfg, base_offset);
mutex_unlock(&priv->lock);
return 0;
}
static int quad8_get_synchronous_mode(struct iio_dev *indio_dev,
const struct iio_chan_spec *chan)
{
const struct quad8_iio *const priv = iio_priv(indio_dev);
return priv->synchronous_mode[chan->channel];
}
static const struct iio_enum quad8_synchronous_mode_enum = {
.items = quad8_synchronous_modes,
.num_items = ARRAY_SIZE(quad8_synchronous_modes),
.set = quad8_set_synchronous_mode,
.get = quad8_get_synchronous_mode
};
static const char *const quad8_quadrature_modes[] = {
"non-quadrature",
"quadrature"
};
static int quad8_set_quadrature_mode(struct iio_dev *indio_dev,
const struct iio_chan_spec *chan, unsigned int quadrature_mode)
{
struct quad8_iio *const priv = iio_priv(indio_dev);
const int base_offset = priv->base + 2 * chan->channel + 1;
unsigned int mode_cfg;
mutex_lock(&priv->lock);
mode_cfg = priv->count_mode[chan->channel] << 1;
if (quadrature_mode)
mode_cfg |= (priv->quadrature_scale[chan->channel] + 1) << 3;
else {
/* Quadrature scaling only available in quadrature mode */
priv->quadrature_scale[chan->channel] = 0;
/* Synchronous function not supported in non-quadrature mode */
if (priv->synchronous_mode[chan->channel])
quad8_set_synchronous_mode(indio_dev, chan, 0);
}
priv->quadrature_mode[chan->channel] = quadrature_mode;
/* Load mode configuration to Counter Mode Register */
outb(QUAD8_CTR_CMR | mode_cfg, base_offset);
mutex_unlock(&priv->lock);
return 0;
}
static int quad8_get_quadrature_mode(struct iio_dev *indio_dev,
const struct iio_chan_spec *chan)
{
const struct quad8_iio *const priv = iio_priv(indio_dev);
return priv->quadrature_mode[chan->channel];
}
static const struct iio_enum quad8_quadrature_mode_enum = {
.items = quad8_quadrature_modes,
.num_items = ARRAY_SIZE(quad8_quadrature_modes),
.set = quad8_set_quadrature_mode,
.get = quad8_get_quadrature_mode
};
static const char *const quad8_index_polarity_modes[] = {
"negative",
"positive"
};
static int quad8_set_index_polarity(struct iio_dev *indio_dev,
const struct iio_chan_spec *chan, unsigned int index_polarity)
{
struct quad8_iio *const priv = iio_priv(indio_dev);
const int base_offset = priv->base + 2 * chan->channel + 1;
unsigned int idr_cfg = index_polarity << 1;
mutex_lock(&priv->lock);
idr_cfg |= priv->synchronous_mode[chan->channel];
priv->index_polarity[chan->channel] = index_polarity;
/* Load Index Control configuration to Index Control Register */
outb(QUAD8_CTR_IDR | idr_cfg, base_offset);
mutex_unlock(&priv->lock);
return 0;
}
static int quad8_get_index_polarity(struct iio_dev *indio_dev,
const struct iio_chan_spec *chan)
{
const struct quad8_iio *const priv = iio_priv(indio_dev);
return priv->index_polarity[chan->channel];
}
static const struct iio_enum quad8_index_polarity_enum = {
.items = quad8_index_polarity_modes,
.num_items = ARRAY_SIZE(quad8_index_polarity_modes),
.set = quad8_set_index_polarity,
.get = quad8_get_index_polarity
};
static const struct iio_chan_spec_ext_info quad8_count_ext_info[] = {
{
.name = "preset",
.shared = IIO_SEPARATE,
.read = quad8_read_preset,
.write = quad8_write_preset
},
{
.name = "set_to_preset_on_index",
.shared = IIO_SEPARATE,
.read = quad8_read_set_to_preset_on_index,
.write = quad8_write_set_to_preset_on_index
},
IIO_ENUM("noise_error", IIO_SEPARATE, &quad8_noise_error_enum),
IIO_ENUM_AVAILABLE("noise_error", &quad8_noise_error_enum),
IIO_ENUM("count_direction", IIO_SEPARATE, &quad8_count_direction_enum),
IIO_ENUM_AVAILABLE("count_direction", &quad8_count_direction_enum),
IIO_ENUM("count_mode", IIO_SEPARATE, &quad8_count_mode_enum),
IIO_ENUM_AVAILABLE("count_mode", &quad8_count_mode_enum),
IIO_ENUM("quadrature_mode", IIO_SEPARATE, &quad8_quadrature_mode_enum),
IIO_ENUM_AVAILABLE("quadrature_mode", &quad8_quadrature_mode_enum),
{}
};
static const struct iio_chan_spec_ext_info quad8_index_ext_info[] = {
IIO_ENUM("synchronous_mode", IIO_SEPARATE,
&quad8_synchronous_mode_enum),
IIO_ENUM_AVAILABLE("synchronous_mode", &quad8_synchronous_mode_enum),
IIO_ENUM("index_polarity", IIO_SEPARATE, &quad8_index_polarity_enum),
IIO_ENUM_AVAILABLE("index_polarity", &quad8_index_polarity_enum),
{}
};
#define QUAD8_COUNT_CHAN(_chan) { \
.type = IIO_COUNT, \
.channel = (_chan), \
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \
BIT(IIO_CHAN_INFO_ENABLE) | BIT(IIO_CHAN_INFO_SCALE), \
.ext_info = quad8_count_ext_info, \
.indexed = 1 \
}
#define QUAD8_INDEX_CHAN(_chan) { \
.type = IIO_INDEX, \
.channel = (_chan), \
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
.ext_info = quad8_index_ext_info, \
.indexed = 1 \
}
static const struct iio_chan_spec quad8_channels[] = {
QUAD8_COUNT_CHAN(0), QUAD8_INDEX_CHAN(0),
QUAD8_COUNT_CHAN(1), QUAD8_INDEX_CHAN(1),
QUAD8_COUNT_CHAN(2), QUAD8_INDEX_CHAN(2),
QUAD8_COUNT_CHAN(3), QUAD8_INDEX_CHAN(3),
QUAD8_COUNT_CHAN(4), QUAD8_INDEX_CHAN(4),
QUAD8_COUNT_CHAN(5), QUAD8_INDEX_CHAN(5),
QUAD8_COUNT_CHAN(6), QUAD8_INDEX_CHAN(6),
QUAD8_COUNT_CHAN(7), QUAD8_INDEX_CHAN(7)
};
static int quad8_signal_read(struct counter_device *counter,
struct counter_signal *signal, enum counter_signal_value *val)
{
const struct quad8_iio *const priv = counter->priv;
const struct quad8 *const priv = counter->priv;
unsigned int state;
/* Only Index signal levels can be read */
@ -641,7 +117,7 @@ static int quad8_signal_read(struct counter_device *counter,
static int quad8_count_read(struct counter_device *counter,
struct counter_count *count, unsigned long *val)
{
struct quad8_iio *const priv = counter->priv;
struct quad8 *const priv = counter->priv;
const int base_offset = priv->base + 2 * count->id;
unsigned int flags;
unsigned int borrow;
@ -672,7 +148,7 @@ static int quad8_count_read(struct counter_device *counter,
static int quad8_count_write(struct counter_device *counter,
struct counter_count *count, unsigned long val)
{
struct quad8_iio *const priv = counter->priv;
struct quad8 *const priv = counter->priv;
const int base_offset = priv->base + 2 * count->id;
int i;
@ -727,7 +203,7 @@ static enum counter_count_function quad8_count_functions_list[] = {
static int quad8_function_get(struct counter_device *counter,
struct counter_count *count, size_t *function)
{
struct quad8_iio *const priv = counter->priv;
struct quad8 *const priv = counter->priv;
const int id = count->id;
mutex_lock(&priv->lock);
@ -755,7 +231,7 @@ static int quad8_function_get(struct counter_device *counter,
static int quad8_function_set(struct counter_device *counter,
struct counter_count *count, size_t function)
{
struct quad8_iio *const priv = counter->priv;
struct quad8 *const priv = counter->priv;
const int id = count->id;
unsigned int *const quadrature_mode = priv->quadrature_mode + id;
unsigned int *const scale = priv->quadrature_scale + id;
@ -811,7 +287,7 @@ static int quad8_function_set(struct counter_device *counter,
static void quad8_direction_get(struct counter_device *counter,
struct counter_count *count, enum counter_count_direction *direction)
{
const struct quad8_iio *const priv = counter->priv;
const struct quad8 *const priv = counter->priv;
unsigned int ud_flag;
const unsigned int flag_addr = priv->base + 2 * count->id + 1;
@ -845,7 +321,7 @@ static int quad8_action_get(struct counter_device *counter,
struct counter_count *count, struct counter_synapse *synapse,
size_t *action)
{
struct quad8_iio *const priv = counter->priv;
struct quad8 *const priv = counter->priv;
int err;
size_t function = 0;
const size_t signal_a_id = count->synapses[0].signal->id;
@ -905,10 +381,15 @@ static const struct counter_ops quad8_ops = {
.action_get = quad8_action_get
};
static const char *const quad8_index_polarity_modes[] = {
"negative",
"positive"
};
static int quad8_index_polarity_get(struct counter_device *counter,
struct counter_signal *signal, size_t *index_polarity)
{
const struct quad8_iio *const priv = counter->priv;
const struct quad8 *const priv = counter->priv;
const size_t channel_id = signal->id - 16;
*index_polarity = priv->index_polarity[channel_id];
@ -919,7 +400,7 @@ static int quad8_index_polarity_get(struct counter_device *counter,
static int quad8_index_polarity_set(struct counter_device *counter,
struct counter_signal *signal, size_t index_polarity)
{
struct quad8_iio *const priv = counter->priv;
struct quad8 *const priv = counter->priv;
const size_t channel_id = signal->id - 16;
const int base_offset = priv->base + 2 * channel_id + 1;
unsigned int idr_cfg = index_polarity << 1;
@ -945,10 +426,15 @@ static struct counter_signal_enum_ext quad8_index_pol_enum = {
.set = quad8_index_polarity_set
};
static const char *const quad8_synchronous_modes[] = {
"non-synchronous",
"synchronous"
};
static int quad8_synchronous_mode_get(struct counter_device *counter,
struct counter_signal *signal, size_t *synchronous_mode)
{
const struct quad8_iio *const priv = counter->priv;
const struct quad8 *const priv = counter->priv;
const size_t channel_id = signal->id - 16;
*synchronous_mode = priv->synchronous_mode[channel_id];
@ -959,7 +445,7 @@ static int quad8_synchronous_mode_get(struct counter_device *counter,
static int quad8_synchronous_mode_set(struct counter_device *counter,
struct counter_signal *signal, size_t synchronous_mode)
{
struct quad8_iio *const priv = counter->priv;
struct quad8 *const priv = counter->priv;
const size_t channel_id = signal->id - 16;
const int base_offset = priv->base + 2 * channel_id + 1;
unsigned int idr_cfg = synchronous_mode;
@ -1001,7 +487,7 @@ static ssize_t quad8_count_floor_read(struct counter_device *counter,
static int quad8_count_mode_get(struct counter_device *counter,
struct counter_count *count, size_t *cnt_mode)
{
const struct quad8_iio *const priv = counter->priv;
const struct quad8 *const priv = counter->priv;
/* Map 104-QUAD-8 count mode to Generic Counter count mode */
switch (priv->count_mode[count->id]) {
@ -1025,7 +511,7 @@ static int quad8_count_mode_get(struct counter_device *counter,
static int quad8_count_mode_set(struct counter_device *counter,
struct counter_count *count, size_t cnt_mode)
{
struct quad8_iio *const priv = counter->priv;
struct quad8 *const priv = counter->priv;
unsigned int mode_cfg;
const int base_offset = priv->base + 2 * count->id + 1;
@ -1084,7 +570,7 @@ static ssize_t quad8_count_direction_read(struct counter_device *counter,
static ssize_t quad8_count_enable_read(struct counter_device *counter,
struct counter_count *count, void *private, char *buf)
{
const struct quad8_iio *const priv = counter->priv;
const struct quad8 *const priv = counter->priv;
return sprintf(buf, "%u\n", priv->ab_enable[count->id]);
}
@ -1092,7 +578,7 @@ static ssize_t quad8_count_enable_read(struct counter_device *counter,
static ssize_t quad8_count_enable_write(struct counter_device *counter,
struct counter_count *count, void *private, const char *buf, size_t len)
{
struct quad8_iio *const priv = counter->priv;
struct quad8 *const priv = counter->priv;
const int base_offset = priv->base + 2 * count->id;
int err;
bool ab_enable;
@ -1116,10 +602,15 @@ static ssize_t quad8_count_enable_write(struct counter_device *counter,
return len;
}
static const char *const quad8_noise_error_states[] = {
"No excessive noise is present at the count inputs",
"Excessive noise is present at the count inputs"
};
static int quad8_error_noise_get(struct counter_device *counter,
struct counter_count *count, size_t *noise_error)
{
const struct quad8_iio *const priv = counter->priv;
const struct quad8 *const priv = counter->priv;
const int base_offset = priv->base + 2 * count->id + 1;
*noise_error = !!(inb(base_offset) & QUAD8_FLAG_E);
@ -1136,18 +627,18 @@ static struct counter_count_enum_ext quad8_error_noise_enum = {
static ssize_t quad8_count_preset_read(struct counter_device *counter,
struct counter_count *count, void *private, char *buf)
{
const struct quad8_iio *const priv = counter->priv;
const struct quad8 *const priv = counter->priv;
return sprintf(buf, "%u\n", priv->preset[count->id]);
}
static void quad8_preset_register_set(struct quad8_iio *quad8iio, int id,
unsigned int preset)
static void quad8_preset_register_set(struct quad8 *priv, int id,
unsigned int preset)
{
const unsigned int base_offset = quad8iio->base + 2 * id;
const unsigned int base_offset = priv->base + 2 * id;
int i;
quad8iio->preset[id] = preset;
priv->preset[id] = preset;
/* Reset Byte Pointer */
outb(QUAD8_CTR_RLD | QUAD8_RLD_RESET_BP, base_offset + 1);
@ -1160,7 +651,7 @@ static void quad8_preset_register_set(struct quad8_iio *quad8iio, int id,
static ssize_t quad8_count_preset_write(struct counter_device *counter,
struct counter_count *count, void *private, const char *buf, size_t len)
{
struct quad8_iio *const priv = counter->priv;
struct quad8 *const priv = counter->priv;
unsigned int preset;
int ret;
@ -1184,7 +675,7 @@ static ssize_t quad8_count_preset_write(struct counter_device *counter,
static ssize_t quad8_count_ceiling_read(struct counter_device *counter,
struct counter_count *count, void *private, char *buf)
{
struct quad8_iio *const priv = counter->priv;
struct quad8 *const priv = counter->priv;
mutex_lock(&priv->lock);
@ -1205,7 +696,7 @@ static ssize_t quad8_count_ceiling_read(struct counter_device *counter,
static ssize_t quad8_count_ceiling_write(struct counter_device *counter,
struct counter_count *count, void *private, const char *buf, size_t len)
{
struct quad8_iio *const priv = counter->priv;
struct quad8 *const priv = counter->priv;
unsigned int ceiling;
int ret;
@ -1235,7 +726,7 @@ static ssize_t quad8_count_ceiling_write(struct counter_device *counter,
static ssize_t quad8_count_preset_enable_read(struct counter_device *counter,
struct counter_count *count, void *private, char *buf)
{
const struct quad8_iio *const priv = counter->priv;
const struct quad8 *const priv = counter->priv;
return sprintf(buf, "%u\n", !priv->preset_enable[count->id]);
}
@ -1243,7 +734,7 @@ static ssize_t quad8_count_preset_enable_read(struct counter_device *counter,
static ssize_t quad8_count_preset_enable_write(struct counter_device *counter,
struct counter_count *count, void *private, const char *buf, size_t len)
{
struct quad8_iio *const priv = counter->priv;
struct quad8 *const priv = counter->priv;
const int base_offset = priv->base + 2 * count->id + 1;
bool preset_enable;
int ret;
@ -1274,7 +765,7 @@ static ssize_t quad8_signal_cable_fault_read(struct counter_device *counter,
struct counter_signal *signal,
void *private, char *buf)
{
struct quad8_iio *const priv = counter->priv;
struct quad8 *const priv = counter->priv;
const size_t channel_id = signal->id / 2;
bool disabled;
unsigned int status;
@ -1304,7 +795,7 @@ static ssize_t quad8_signal_cable_fault_enable_read(
struct counter_device *counter, struct counter_signal *signal,
void *private, char *buf)
{
const struct quad8_iio *const priv = counter->priv;
const struct quad8 *const priv = counter->priv;
const size_t channel_id = signal->id / 2;
const unsigned int enb = !!(priv->cable_fault_enable & BIT(channel_id));
@ -1315,7 +806,7 @@ static ssize_t quad8_signal_cable_fault_enable_write(
struct counter_device *counter, struct counter_signal *signal,
void *private, const char *buf, size_t len)
{
struct quad8_iio *const priv = counter->priv;
struct quad8 *const priv = counter->priv;
const size_t channel_id = signal->id / 2;
bool enable;
int ret;
@ -1345,7 +836,7 @@ static ssize_t quad8_signal_cable_fault_enable_write(
static ssize_t quad8_signal_fck_prescaler_read(struct counter_device *counter,
struct counter_signal *signal, void *private, char *buf)
{
const struct quad8_iio *const priv = counter->priv;
const struct quad8 *const priv = counter->priv;
const size_t channel_id = signal->id / 2;
return sprintf(buf, "%u\n", priv->fck_prescaler[channel_id]);
@ -1355,7 +846,7 @@ static ssize_t quad8_signal_fck_prescaler_write(struct counter_device *counter,
struct counter_signal *signal, void *private, const char *buf,
size_t len)
{
struct quad8_iio *const priv = counter->priv;
struct quad8 *const priv = counter->priv;
const size_t channel_id = signal->id / 2;
const int base_offset = priv->base + 2 * channel_id;
u8 prescaler;
@ -1531,11 +1022,9 @@ static struct counter_count quad8_counts[] = {
static int quad8_probe(struct device *dev, unsigned int id)
{
struct iio_dev *indio_dev;
struct quad8_iio *quad8iio;
struct quad8 *priv;
int i, j;
unsigned int base_offset;
int err;
if (!devm_request_region(dev, base[id], QUAD8_EXTENT, dev_name(dev))) {
dev_err(dev, "Unable to lock port addresses (0x%X-0x%X)\n",
@ -1543,32 +1032,23 @@ static int quad8_probe(struct device *dev, unsigned int id)
return -EBUSY;
}
/* Allocate IIO device; this also allocates driver data structure */
indio_dev = devm_iio_device_alloc(dev, sizeof(*quad8iio));
if (!indio_dev)
priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
if (!priv)
return -ENOMEM;
/* Initialize IIO device */
indio_dev->info = &quad8_info;
indio_dev->modes = INDIO_DIRECT_MODE;
indio_dev->num_channels = ARRAY_SIZE(quad8_channels);
indio_dev->channels = quad8_channels;
indio_dev->name = dev_name(dev);
/* Initialize Counter device and driver data */
quad8iio = iio_priv(indio_dev);
quad8iio->counter.name = dev_name(dev);
quad8iio->counter.parent = dev;
quad8iio->counter.ops = &quad8_ops;
quad8iio->counter.counts = quad8_counts;
quad8iio->counter.num_counts = ARRAY_SIZE(quad8_counts);
quad8iio->counter.signals = quad8_signals;
quad8iio->counter.num_signals = ARRAY_SIZE(quad8_signals);
quad8iio->counter.priv = quad8iio;
quad8iio->base = base[id];
priv->counter.name = dev_name(dev);
priv->counter.parent = dev;
priv->counter.ops = &quad8_ops;
priv->counter.counts = quad8_counts;
priv->counter.num_counts = ARRAY_SIZE(quad8_counts);
priv->counter.signals = quad8_signals;
priv->counter.num_signals = ARRAY_SIZE(quad8_signals);
priv->counter.priv = priv;
priv->base = base[id];
/* Initialize mutex */
mutex_init(&quad8iio->lock);
mutex_init(&priv->lock);
/* Reset all counters and disable interrupt function */
outb(QUAD8_CHAN_OP_RESET_COUNTERS, base[id] + QUAD8_REG_CHAN_OP);
@ -1602,13 +1082,8 @@ static int quad8_probe(struct device *dev, unsigned int id)
/* Enable all counters */
outb(QUAD8_CHAN_OP_ENABLE_COUNTERS, base[id] + QUAD8_REG_CHAN_OP);
/* Register IIO device */
err = devm_iio_device_register(dev, indio_dev);
if (err)
return err;
/* Register Counter device */
return devm_counter_register(dev, &quad8iio->counter);
return devm_counter_register(dev, &priv->counter);
}
static struct isa_driver quad8_driver = {
@ -1621,5 +1096,5 @@ static struct isa_driver quad8_driver = {
module_isa_driver(quad8_driver, num_quad8);
MODULE_AUTHOR("William Breathitt Gray <vilhelm.gray@gmail.com>");
MODULE_DESCRIPTION("ACCES 104-QUAD-8 IIO driver");
MODULE_DESCRIPTION("ACCES 104-QUAD-8 driver");
MODULE_LICENSE("GPL v2");

14
drivers/counter/Kconfig
View File

@ -14,7 +14,7 @@ if COUNTER
config 104_QUAD_8
tristate "ACCES 104-QUAD-8 driver"
depends on PC104 && X86 && IIO
depends on PC104 && X86
select ISA_BUS_API
help
Say yes here to build support for the ACCES 104-QUAD-8 quadrature
@ -29,6 +29,16 @@ config 104_QUAD_8
The base port addresses for the devices may be configured via the base
array module parameter.
config INTERRUPT_CNT
tristate "Interrupt counter driver"
depends on GPIOLIB
help
Select this option to enable interrupt counter driver. Any interrupt
source can be used by this driver as the event source.
To compile this driver as a module, choose M here: the
module will be called interrupt-cnt.
config STM32_TIMER_CNT
tristate "STM32 Timer encoder counter driver"
depends on MFD_STM32_TIMERS || COMPILE_TEST
@ -41,7 +51,7 @@ config STM32_TIMER_CNT
config STM32_LPTIMER_CNT
tristate "STM32 LP Timer encoder counter driver"
depends on (MFD_STM32_LPTIMER || COMPILE_TEST) && IIO
depends on MFD_STM32_LPTIMER || COMPILE_TEST
help
Select this option to enable STM32 Low-Power Timer quadrature encoder
and counter driver.

1
drivers/counter/Makefile
View File

@ -6,6 +6,7 @@
obj-$(CONFIG_COUNTER) += counter.o
obj-$(CONFIG_104_QUAD_8) += 104-quad-8.o
obj-$(CONFIG_INTERRUPT_CNT) += interrupt-cnt.o
obj-$(CONFIG_STM32_TIMER_CNT) += stm32-timer-cnt.o
obj-$(CONFIG_STM32_LPTIMER_CNT) += stm32-lptimer-cnt.o
obj-$(CONFIG_TI_EQEP) += ti-eqep.o

244
drivers/counter/interrupt-cnt.c Normal file
View File

@ -0,0 +1,244 @@
// SPDX-License-Identifier: GPL-2.0
/*
* Copyright (c) 2021 Pengutronix, Oleksij Rempel <kernel@pengutronix.de>
*/
#include <linux/counter.h>
#include <linux/gpio/consumer.h>
#include <linux/interrupt.h>
#include <linux/irq.h>
#include <linux/mod_devicetable.h>
#include <linux/module.h>
#include <linux/platform_device.h>
#define INTERRUPT_CNT_NAME "interrupt-cnt"
struct interrupt_cnt_priv {
atomic_t count;
struct counter_device counter;
struct gpio_desc *gpio;
int irq;
bool enabled;
struct counter_signal signals;
struct counter_synapse synapses;
struct counter_count cnts;
};
static irqreturn_t interrupt_cnt_isr(int irq, void *dev_id)
{
struct interrupt_cnt_priv *priv = dev_id;
atomic_inc(&priv->count);
return IRQ_HANDLED;
}
static ssize_t interrupt_cnt_enable_read(struct counter_device *counter,
struct counter_count *count,
void *private, char *buf)
{
struct interrupt_cnt_priv *priv = counter->priv;
return sysfs_emit(buf, "%d\n", priv->enabled);
}
static ssize_t interrupt_cnt_enable_write(struct counter_device *counter,
struct counter_count *count,
void *private, const char *buf,
size_t len)
{
struct interrupt_cnt_priv *priv = counter->priv;
bool enable;
ssize_t ret;
ret = kstrtobool(buf, &enable);
if (ret)
return ret;
if (priv->enabled == enable)
return len;
if (enable) {
priv->enabled = true;
enable_irq(priv->irq);
} else {
disable_irq(priv->irq);
priv->enabled = false;
}
return len;
}
static const struct counter_count_ext interrupt_cnt_ext[] = {
{
.name = "enable",
.read = interrupt_cnt_enable_read,
.write = interrupt_cnt_enable_write,
},
};
static enum counter_synapse_action interrupt_cnt_synapse_actionss[] = {
COUNTER_SYNAPSE_ACTION_RISING_EDGE,
};
static int interrupt_cnt_action_get(struct counter_device *counter,
struct counter_count *count,
struct counter_synapse *synapse,
size_t *action)
{
*action = 0;
return 0;
}
static int interrupt_cnt_read(struct counter_device *counter,
struct counter_count *count, unsigned long *val)
{
struct interrupt_cnt_priv *priv = counter->priv;
*val = atomic_read(&priv->count);
return 0;
}
static int interrupt_cnt_write(struct counter_device *counter,
struct counter_count *count,
const unsigned long val)
{
struct interrupt_cnt_priv *priv = counter->priv;
atomic_set(&priv->count, val);
return 0;
}
static enum counter_count_function interrupt_cnt_functions[] = {
COUNTER_COUNT_FUNCTION_INCREASE,
};
static int interrupt_cnt_function_get(struct counter_device *counter,
struct counter_count *count,
size_t *function)
{
*function = 0;
return 0;
}
static int interrupt_cnt_signal_read(struct counter_device *counter,
struct counter_signal *signal,
enum counter_signal_value *val)
{
struct interrupt_cnt_priv *priv = counter->priv;
int ret;
if (!priv->gpio)
return -EINVAL;
ret = gpiod_get_value(priv->gpio);
if (ret < 0)
return ret;
*val = ret ? COUNTER_SIGNAL_HIGH : COUNTER_SIGNAL_LOW;
return 0;
}
static const struct counter_ops interrupt_cnt_ops = {
.action_get = interrupt_cnt_action_get,
.count_read = interrupt_cnt_read,
.count_write = interrupt_cnt_write,
.function_get = interrupt_cnt_function_get,
.signal_read = interrupt_cnt_signal_read,
};
static int interrupt_cnt_probe(struct platform_device *pdev)
{
struct device *dev = &pdev->dev;
struct interrupt_cnt_priv *priv;
int ret;
priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
if (!priv)
return -ENOMEM;
priv->irq = platform_get_irq_optional(pdev, 0);
if (priv->irq == -ENXIO)
priv->irq = 0;
else if (priv->irq < 0)
return dev_err_probe(dev, priv->irq, "failed to get IRQ\n");
priv->gpio = devm_gpiod_get_optional(dev, NULL, GPIOD_IN);
if (IS_ERR(priv->gpio))
return dev_err_probe(dev, PTR_ERR(priv->gpio), "failed to get GPIO\n");
if (!priv->irq && !priv->gpio) {
dev_err(dev, "IRQ and GPIO are not found. At least one source should be provided\n");
return -ENODEV;
}
if (!priv->irq) {
int irq = gpiod_to_irq(priv->gpio);
if (irq < 0)
return dev_err_probe(dev, irq, "failed to get IRQ from GPIO\n");
priv->irq = irq;
}
priv->signals.name = devm_kasprintf(dev, GFP_KERNEL, "IRQ %d",
priv->irq);
if (!priv->signals.name)
return -ENOMEM;
priv->counter.signals = &priv->signals;
priv->counter.num_signals = 1;
priv->synapses.actions_list = interrupt_cnt_synapse_actionss;
priv->synapses.num_actions = ARRAY_SIZE(interrupt_cnt_synapse_actionss);
priv->synapses.signal = &priv->signals;
priv->cnts.name = "Channel 0 Count";
priv->cnts.functions_list = interrupt_cnt_functions;
priv->cnts.num_functions = ARRAY_SIZE(interrupt_cnt_functions);
priv->cnts.synapses = &priv->synapses;
priv->cnts.num_synapses = 1;
priv->cnts.ext = interrupt_cnt_ext;
priv->cnts.num_ext = ARRAY_SIZE(interrupt_cnt_ext);
priv->counter.priv = priv;
priv->counter.name = dev_name(dev);
priv->counter.parent = dev;
priv->counter.ops = &interrupt_cnt_ops;
priv->counter.counts = &priv->cnts;
priv->counter.num_counts = 1;
irq_set_status_flags(priv->irq, IRQ_NOAUTOEN);
ret = devm_request_irq(dev, priv->irq, interrupt_cnt_isr,
IRQF_TRIGGER_RISING | IRQF_NO_THREAD,
dev_name(dev), priv);
if (ret)
return ret;
return devm_counter_register(dev, &priv->counter);
}
static const struct of_device_id interrupt_cnt_of_match[] = {
{ .compatible = "interrupt-counter", },
{}
};
MODULE_DEVICE_TABLE(of, interrupt_cnt_of_match);
static struct platform_driver interrupt_cnt_driver = {
.probe = interrupt_cnt_probe,
.driver = {
.name = INTERRUPT_CNT_NAME,
.of_match_table = interrupt_cnt_of_match,
},
};
module_platform_driver(interrupt_cnt_driver);
MODULE_ALIAS("platform:interrupt-counter");
MODULE_AUTHOR("Oleksij Rempel <o.rempel@pengutronix.de>");
MODULE_DESCRIPTION("Interrupt counter driver");
MODULE_LICENSE("GPL v2");

297
drivers/counter/stm32-lptimer-cnt.c
View File

@ -12,8 +12,8 @@
#include <linux/bitfield.h>
#include <linux/counter.h>
#include <linux/iio/iio.h>
#include <linux/mfd/stm32-lptimer.h>
#include <linux/mod_devicetable.h>
#include <linux/module.h>
#include <linux/pinctrl/consumer.h>
#include <linux/platform_device.h>
@ -107,249 +107,27 @@ static int stm32_lptim_setup(struct stm32_lptim_cnt *priv, int enable)
return regmap_update_bits(priv->regmap, STM32_LPTIM_CFGR, mask, val);
}
static int stm32_lptim_write_raw(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan,
int val, int val2, long mask)
{
struct stm32_lptim_cnt *priv = iio_priv(indio_dev);
int ret;
switch (mask) {
case IIO_CHAN_INFO_ENABLE:
if (val < 0 || val > 1)
return -EINVAL;
/* Check nobody uses the timer, or already disabled/enabled */
ret = stm32_lptim_is_enabled(priv);
if ((ret < 0) || (!ret && !val))
return ret;
if (val && ret)
return -EBUSY;
ret = stm32_lptim_setup(priv, val);
if (ret)
return ret;
return stm32_lptim_set_enable_state(priv, val);
default:
return -EINVAL;
}
}
static int stm32_lptim_read_raw(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan,
int *val, int *val2, long mask)
{
struct stm32_lptim_cnt *priv = iio_priv(indio_dev);
u32 dat;
int ret;
switch (mask) {
case IIO_CHAN_INFO_RAW:
ret = regmap_read(priv->regmap, STM32_LPTIM_CNT, &dat);
if (ret)
return ret;
*val = dat;
return IIO_VAL_INT;
case IIO_CHAN_INFO_ENABLE:
ret = stm32_lptim_is_enabled(priv);
if (ret < 0)
return ret;
*val = ret;
return IIO_VAL_INT;
case IIO_CHAN_INFO_SCALE:
/* Non-quadrature mode: scale = 1 */
*val = 1;
*val2 = 0;
if (priv->quadrature_mode) {
/*
* Quadrature encoder mode:
* - both edges, quarter cycle, scale is 0.25
* - either rising/falling edge scale is 0.5
*/
if (priv->polarity > 1)
*val2 = 2;
else
*val2 = 1;
}
return IIO_VAL_FRACTIONAL_LOG2;
default:
return -EINVAL;
}
}
static const struct iio_info stm32_lptim_cnt_iio_info = {
.read_raw = stm32_lptim_read_raw,
.write_raw = stm32_lptim_write_raw,
};
static const char *const stm32_lptim_quadrature_modes[] = {
"non-quadrature",
"quadrature",
};
static int stm32_lptim_get_quadrature_mode(struct iio_dev *indio_dev,
const struct iio_chan_spec *chan)
{
struct stm32_lptim_cnt *priv = iio_priv(indio_dev);
return priv->quadrature_mode;
}
static int stm32_lptim_set_quadrature_mode(struct iio_dev *indio_dev,
const struct iio_chan_spec *chan,
unsigned int type)
{
struct stm32_lptim_cnt *priv = iio_priv(indio_dev);
if (stm32_lptim_is_enabled(priv))
return -EBUSY;
priv->quadrature_mode = type;
return 0;
}
static const struct iio_enum stm32_lptim_quadrature_mode_en = {
.items = stm32_lptim_quadrature_modes,
.num_items = ARRAY_SIZE(stm32_lptim_quadrature_modes),
.get = stm32_lptim_get_quadrature_mode,
.set = stm32_lptim_set_quadrature_mode,
};
static const char * const stm32_lptim_cnt_polarity[] = {
"rising-edge", "falling-edge", "both-edges",
};
static int stm32_lptim_cnt_get_polarity(struct iio_dev *indio_dev,
const struct iio_chan_spec *chan)
{
struct stm32_lptim_cnt *priv = iio_priv(indio_dev);
return priv->polarity;
}
static int stm32_lptim_cnt_set_polarity(struct iio_dev *indio_dev,
const struct iio_chan_spec *chan,
unsigned int type)
{
struct stm32_lptim_cnt *priv = iio_priv(indio_dev);
if (stm32_lptim_is_enabled(priv))
return -EBUSY;
priv->polarity = type;
return 0;
}
static const struct iio_enum stm32_lptim_cnt_polarity_en = {
.items = stm32_lptim_cnt_polarity,
.num_items = ARRAY_SIZE(stm32_lptim_cnt_polarity),
.get = stm32_lptim_cnt_get_polarity,
.set = stm32_lptim_cnt_set_polarity,
};
static ssize_t stm32_lptim_cnt_get_ceiling(struct stm32_lptim_cnt *priv,
char *buf)
{
return snprintf(buf, PAGE_SIZE, "%u\n", priv->ceiling);
}
static ssize_t stm32_lptim_cnt_set_ceiling(struct stm32_lptim_cnt *priv,
const char *buf, size_t len)
{
int ret;
if (stm32_lptim_is_enabled(priv))
return -EBUSY;
ret = kstrtouint(buf, 0, &priv->ceiling);
if (ret)
return ret;
if (priv->ceiling > STM32_LPTIM_MAX_ARR)
return -EINVAL;
return len;
}
static ssize_t stm32_lptim_cnt_get_preset_iio(struct iio_dev *indio_dev,
uintptr_t private,
const struct iio_chan_spec *chan,
char *buf)
{
struct stm32_lptim_cnt *priv = iio_priv(indio_dev);
return stm32_lptim_cnt_get_ceiling(priv, buf);
}
static ssize_t stm32_lptim_cnt_set_preset_iio(struct iio_dev *indio_dev,
uintptr_t private,
const struct iio_chan_spec *chan,
const char *buf, size_t len)
{
struct stm32_lptim_cnt *priv = iio_priv(indio_dev);
return stm32_lptim_cnt_set_ceiling(priv, buf, len);
}
/* LP timer with encoder */
static const struct iio_chan_spec_ext_info stm32_lptim_enc_ext_info[] = {
{
.name = "preset",
.shared = IIO_SEPARATE,
.read = stm32_lptim_cnt_get_preset_iio,
.write = stm32_lptim_cnt_set_preset_iio,
},
IIO_ENUM("polarity", IIO_SEPARATE, &stm32_lptim_cnt_polarity_en),
IIO_ENUM_AVAILABLE("polarity", &stm32_lptim_cnt_polarity_en),
IIO_ENUM("quadrature_mode", IIO_SEPARATE,
&stm32_lptim_quadrature_mode_en),
IIO_ENUM_AVAILABLE("quadrature_mode", &stm32_lptim_quadrature_mode_en),
{}
};
static const struct iio_chan_spec stm32_lptim_enc_channels = {
.type = IIO_COUNT,
.channel = 0,
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
BIT(IIO_CHAN_INFO_ENABLE) |
BIT(IIO_CHAN_INFO_SCALE),
.ext_info = stm32_lptim_enc_ext_info,
.indexed = 1,
};
/* LP timer without encoder (counter only) */
static const struct iio_chan_spec_ext_info stm32_lptim_cnt_ext_info[] = {
{
.name = "preset",
.shared = IIO_SEPARATE,
.read = stm32_lptim_cnt_get_preset_iio,
.write = stm32_lptim_cnt_set_preset_iio,
},
IIO_ENUM("polarity", IIO_SEPARATE, &stm32_lptim_cnt_polarity_en),
IIO_ENUM_AVAILABLE("polarity", &stm32_lptim_cnt_polarity_en),
{}
};
static const struct iio_chan_spec stm32_lptim_cnt_channels = {
.type = IIO_COUNT,
.channel = 0,
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
BIT(IIO_CHAN_INFO_ENABLE) |
BIT(IIO_CHAN_INFO_SCALE),
.ext_info = stm32_lptim_cnt_ext_info,
.indexed = 1,
};
/**
* enum stm32_lptim_cnt_function - enumerates LPTimer counter & encoder modes
* @STM32_LPTIM_COUNTER_INCREASE: up count on IN1 rising, falling or both edges
* @STM32_LPTIM_ENCODER_BOTH_EDGE: count on both edges (IN1 & IN2 quadrature)
*
* In non-quadrature mode, device counts up on active edge.
* In quadrature mode, encoder counting scenarios are as follows:
* +---------+----------+--------------------+--------------------+
* | Active | Level on | IN1 signal | IN2 signal |
* | edge | opposite +----------+---------+----------+---------+
* | | signal | Rising | Falling | Rising | Falling |
* +---------+----------+----------+---------+----------+---------+
* | Rising | High -> | Down | - | Up | - |
* | edge | Low -> | Up | - | Down | - |
* +---------+----------+----------+---------+----------+---------+
* | Falling | High -> | - | Up | - | Down |
* | edge | Low -> | - | Down | - | Up |
* +---------+----------+----------+---------+----------+---------+
* | Both | High -> | Down | Up | Up | Down |
* | edges | Low -> | Up | Down | Down | Up |
* +---------+----------+----------+---------+----------+---------+
*/
enum stm32_lptim_cnt_function {
STM32_LPTIM_COUNTER_INCREASE,
@ -484,7 +262,7 @@ static ssize_t stm32_lptim_cnt_ceiling_read(struct counter_device *counter,
{
struct stm32_lptim_cnt *const priv = counter->priv;
return stm32_lptim_cnt_get_ceiling(priv, buf);
return snprintf(buf, PAGE_SIZE, "%u\n", priv->ceiling);
}
static ssize_t stm32_lptim_cnt_ceiling_write(struct counter_device *counter,
@ -493,8 +271,22 @@ static ssize_t stm32_lptim_cnt_ceiling_write(struct counter_device *counter,
const char *buf, size_t len)
{
struct stm32_lptim_cnt *const priv = counter->priv;
unsigned int ceiling;
int ret;
return stm32_lptim_cnt_set_ceiling(priv, buf, len);
if (stm32_lptim_is_enabled(priv))
return -EBUSY;
ret = kstrtouint(buf, 0, &ceiling);
if (ret)
return ret;
if (ceiling > STM32_LPTIM_MAX_ARR)
return -EINVAL;
priv->ceiling = ceiling;
return len;
}
static const struct counter_count_ext stm32_lptim_cnt_ext[] = {
@ -630,32 +422,19 @@ static int stm32_lptim_cnt_probe(struct platform_device *pdev)
{
struct stm32_lptimer *ddata = dev_get_drvdata(pdev->dev.parent);
struct stm32_lptim_cnt *priv;
struct iio_dev *indio_dev;
int ret;
if (IS_ERR_OR_NULL(ddata))
return -EINVAL;
indio_dev = devm_iio_device_alloc(&pdev->dev, sizeof(*priv));
if (!indio_dev)
priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
if (!priv)
return -ENOMEM;
priv = iio_priv(indio_dev);
priv->dev = &pdev->dev;
priv->regmap = ddata->regmap;
priv->clk = ddata->clk;
priv->ceiling = STM32_LPTIM_MAX_ARR;
/* Initialize IIO device */
indio_dev->name = dev_name(&pdev->dev);
indio_dev->dev.of_node = pdev->dev.of_node;
indio_dev->info = &stm32_lptim_cnt_iio_info;
if (ddata->has_encoder)
indio_dev->channels = &stm32_lptim_enc_channels;
else
indio_dev->channels = &stm32_lptim_cnt_channels;
indio_dev->num_channels = 1;
/* Initialize Counter device */
priv->counter.name = dev_name(&pdev->dev);
priv->counter.parent = &pdev->dev;
@ -673,10 +452,6 @@ static int stm32_lptim_cnt_probe(struct platform_device *pdev)
platform_set_drvdata(pdev, priv);
ret = devm_iio_device_register(&pdev->dev, indio_dev);
if (ret)
return ret;
return devm_counter_register(&pdev->dev, &priv->counter);
}

2
drivers/firmware/arm_scmi/driver.c
View File

@ -741,7 +741,7 @@ static struct scmi_prot_devnames devnames[] = {
{ SCMI_PROTOCOL_SYSTEM, { "syspower" },},
{ SCMI_PROTOCOL_PERF, { "cpufreq" },},
{ SCMI_PROTOCOL_CLOCK, { "clocks" },},
{ SCMI_PROTOCOL_SENSOR, { "hwmon" },},
{ SCMI_PROTOCOL_SENSOR, { "hwmon", "iiodev" },},
{ SCMI_PROTOCOL_RESET, { "reset" },},
{ SCMI_PROTOCOL_VOLTAGE, { "regulator" },},
};

27
drivers/hwmon/ntc_thermistor.c
View File

@ -326,18 +326,27 @@ struct ntc_data {
static int ntc_adc_iio_read(struct ntc_thermistor_platform_data *pdata)
{
struct iio_channel *channel = pdata->chan;
int raw, uv, ret;
int uv, ret;
ret = iio_read_channel_raw(channel, &raw);
ret = iio_read_channel_processed_scale(channel, &uv, 1000);
if (ret < 0) {
pr_err("read channel() error: %d\n", ret);
return ret;
}
int raw;
ret = iio_convert_raw_to_processed(channel, raw, &uv, 1000);
if (ret < 0) {
/* Assume 12 bit ADC with vref at pullup_uv */
uv = (pdata->pullup_uv * (s64)raw) >> 12;
/*
* This fallback uses a raw read and then
* assumes the ADC is 12 bits, scaling with
* a factor 1000 to get to microvolts.
*/
ret = iio_read_channel_raw(channel, &raw);
if (ret < 0) {
pr_err("read channel() error: %d\n", ret);
return ret;
}
ret = iio_convert_raw_to_processed(channel, raw, &uv, 1000);
if (ret < 0) {
/* Assume 12 bit ADC with vref at pullup_uv */
uv = (pdata->pullup_uv * (s64)raw) >> 12;
}
}
return uv;

1
drivers/iio/Kconfig
View File

@ -85,6 +85,7 @@ source "drivers/iio/light/Kconfig"
source "drivers/iio/magnetometer/Kconfig"
source "drivers/iio/multiplexer/Kconfig"
source "drivers/iio/orientation/Kconfig"
source "drivers/iio/test/Kconfig"
if IIO_TRIGGER
source "drivers/iio/trigger/Kconfig"
endif #IIO_TRIGGER

1
drivers/iio/Makefile
View File

@ -38,4 +38,5 @@ obj-y += pressure/
obj-y += proximity/
obj-y += resolver/
obj-y += temperature/
obj-y += test/
obj-y += trigger/

18
drivers/iio/accel/Kconfig
View File

@ -157,6 +157,24 @@ config BMC150_ACCEL_SPI
tristate
select REGMAP_SPI
config BMI088_ACCEL
tristate "Bosch BMI088 Accelerometer Driver"
depends on SPI
select IIO_BUFFER
select IIO_TRIGGERED_BUFFER
select REGMAP
select BMI088_ACCEL_SPI
help
Say yes here to build support for the Bosch BMI088 accelerometer.
This is a combo module with both accelerometer and gyroscope. This
driver only implements the accelerometer part, which has its own
address and register map. BMG160 provides the gyroscope driver.
config BMI088_ACCEL_SPI
tristate
select REGMAP_SPI
config DA280
tristate "MiraMEMS DA280 3-axis 14-bit digital accelerometer driver"
depends on I2C

2
drivers/iio/accel/Makefile
View File

@ -20,6 +20,8 @@ obj-$(CONFIG_BMA400_SPI) += bma400_spi.o
obj-$(CONFIG_BMC150_ACCEL) += bmc150-accel-core.o
obj-$(CONFIG_BMC150_ACCEL_I2C) += bmc150-accel-i2c.o
obj-$(CONFIG_BMC150_ACCEL_SPI) += bmc150-accel-spi.o
obj-$(CONFIG_BMI088_ACCEL) += bmi088-accel-core.o
obj-$(CONFIG_BMI088_ACCEL_SPI) += bmi088-accel-spi.o
obj-$(CONFIG_DA280) += da280.o
obj-$(CONFIG_DA311) += da311.o
obj-$(CONFIG_DMARD06) += dmard06.o

2
drivers/iio/accel/adxl372.c
View File

@ -1236,8 +1236,6 @@ int adxl372_probe(struct device *dev, struct regmap *regmap,
st->dready_trig->ops = &adxl372_trigger_ops;
st->peak_datardy_trig->ops = &adxl372_peak_data_trigger_ops;
st->dready_trig->dev.parent = dev;
st->peak_datardy_trig->dev.parent = dev;
iio_trigger_set_drvdata(st->dready_trig, indio_dev);
iio_trigger_set_drvdata(st->peak_datardy_trig, indio_dev);
ret = devm_iio_trigger_register(dev, st->dready_trig);

3
drivers/iio/accel/bma180.c
View File

@ -1044,7 +1044,7 @@ static int bma180_probe(struct i2c_client *client,
indio_dev->info = &bma180_info;
if (client->irq > 0) {
data->trig = iio_trigger_alloc("%s-dev%d", indio_dev->name,
data->trig = iio_trigger_alloc(dev, "%s-dev%d", indio_dev->name,
indio_dev->id);
if (!data->trig) {
ret = -ENOMEM;
@ -1059,7 +1059,6 @@ static int bma180_probe(struct i2c_client *client,
goto err_trigger_free;
}
data->trig->dev.parent = dev;
data->trig->ops = &bma180_trigger_ops;
iio_trigger_set_drvdata(data->trig, indio_dev);
indio_dev->trig = iio_trigger_get(data->trig);

2
drivers/iio/accel/bma220_spi.c
View File

@ -1,5 +1,5 @@
// SPDX-License-Identifier: GPL-2.0-only
/**
/*
* BMA220 Digital triaxial acceleration sensor driver
*
* Copyright (c) 2016,2020 Intel Corporation.

19
drivers/iio/accel/bmc150-accel-core.c
View File

@ -443,26 +443,32 @@ static bool bmc150_apply_acpi_orientation(struct device *dev,
struct iio_mount_matrix *orientation)
{
struct acpi_buffer buffer = { ACPI_ALLOCATE_BUFFER, NULL };
struct iio_dev *indio_dev = dev_get_drvdata(dev);
struct acpi_device *adev = ACPI_COMPANION(dev);
char *name, *alt_name, *label, *str;
union acpi_object *obj, *elements;
char *name, *alt_name, *str;
acpi_status status;
int i, j, val[3];
if (!adev || !acpi_dev_hid_uid_match(adev, "BOSC0200", NULL))
return false;
if (strcmp(dev_name(dev), "i2c-BOSC0200:base") == 0)
if (strcmp(dev_name(dev), "i2c-BOSC0200:base") == 0) {
alt_name = "ROMK";
else
label = "accel-base";
} else {
alt_name = "ROMS";
label = "accel-display";
}
if (acpi_has_method(adev->handle, "ROTM"))
if (acpi_has_method(adev->handle, "ROTM")) {
name = "ROTM";
else if (acpi_has_method(adev->handle, alt_name))
} else if (acpi_has_method(adev->handle, alt_name)) {
name = alt_name;
else
indio_dev->label = label;
} else {
return false;
}
status = acpi_evaluate_object(adev->handle, name, NULL, &buffer);
if (ACPI_FAILURE(status)) {
@ -1472,7 +1478,6 @@ static int bmc150_accel_triggers_setup(struct iio_dev *indio_dev,
break;
}
t->indio_trig->dev.parent = dev;
t->indio_trig->ops = &bmc150_accel_trigger_ops;
t->intr = bmc150_accel_triggers[i].intr;
t->data = data;

567
drivers/iio/accel/bmi088-accel-core.c Normal file
View File

@ -0,0 +1,567 @@
// SPDX-License-Identifier: GPL-2.0
/*
* 3-axis accelerometer driver supporting following Bosch-Sensortec chips:
* - BMI088
*
* Copyright (c) 2018-2021, Topic Embedded Products
*/
#include <linux/delay.h>
#include <linux/iio/iio.h>
#include <linux/iio/sysfs.h>
#include <linux/interrupt.h>
#include <linux/module.h>
#include <linux/pm.h>
#include <linux/pm_runtime.h>
#include <linux/regmap.h>
#include <linux/slab.h>
#include <asm/unaligned.h>
#include "bmi088-accel.h"
#define BMI088_ACCEL_REG_CHIP_ID 0x00
#define BMI088_ACCEL_REG_ERROR 0x02
#define BMI088_ACCEL_REG_INT_STATUS 0x1D
#define BMI088_ACCEL_INT_STATUS_BIT_DRDY BIT(7)
#define BMI088_ACCEL_REG_RESET 0x7E
#define BMI088_ACCEL_RESET_VAL 0xB6
#define BMI088_ACCEL_REG_PWR_CTRL 0x7D
#define BMI088_ACCEL_REG_PWR_CONF 0x7C
#define BMI088_ACCEL_REG_INT_MAP_DATA 0x58
#define BMI088_ACCEL_INT_MAP_DATA_BIT_INT1_DRDY BIT(2)
#define BMI088_ACCEL_INT_MAP_DATA_BIT_INT2_FWM BIT(5)
#define BMI088_ACCEL_REG_INT1_IO_CONF 0x53
#define BMI088_ACCEL_INT1_IO_CONF_BIT_ENABLE_OUT BIT(3)
#define BMI088_ACCEL_INT1_IO_CONF_BIT_LVL BIT(1)
#define BMI088_ACCEL_REG_INT2_IO_CONF 0x54
#define BMI088_ACCEL_INT2_IO_CONF_BIT_ENABLE_OUT BIT(3)
#define BMI088_ACCEL_INT2_IO_CONF_BIT_LVL BIT(1)
#define BMI088_ACCEL_REG_ACC_CONF 0x40
#define BMI088_ACCEL_MODE_ODR_MASK 0x0f
#define BMI088_ACCEL_REG_ACC_RANGE 0x41
#define BMI088_ACCEL_RANGE_3G 0x00
#define BMI088_ACCEL_RANGE_6G 0x01
#define BMI088_ACCEL_RANGE_12G 0x02
#define BMI088_ACCEL_RANGE_24G 0x03
#define BMI088_ACCEL_REG_TEMP 0x22
#define BMI088_ACCEL_REG_TEMP_SHIFT 5
#define BMI088_ACCEL_TEMP_UNIT 125
#define BMI088_ACCEL_TEMP_OFFSET 23000
#define BMI088_ACCEL_REG_XOUT_L 0x12
#define BMI088_ACCEL_AXIS_TO_REG(axis) \
(BMI088_ACCEL_REG_XOUT_L + (axis * 2))
#define BMI088_ACCEL_MAX_STARTUP_TIME_US 1000
#define BMI088_AUTO_SUSPEND_DELAY_MS 2000
#define BMI088_ACCEL_REG_FIFO_STATUS 0x0E
#define BMI088_ACCEL_REG_FIFO_CONFIG0 0x48
#define BMI088_ACCEL_REG_FIFO_CONFIG1 0x49
#define BMI088_ACCEL_REG_FIFO_DATA 0x3F
#define BMI088_ACCEL_FIFO_LENGTH 100
#define BMI088_ACCEL_FIFO_MODE_FIFO 0x40
#define BMI088_ACCEL_FIFO_MODE_STREAM 0x80
enum bmi088_accel_axis {
AXIS_X,
AXIS_Y,
AXIS_Z,
};
static const int bmi088_sample_freqs[] = {
12, 500000,
25, 0,
50, 0,
100, 0,
200, 0,
400, 0,
800, 0,
1600, 0,
};
/* Available OSR (over sampling rate) sets the 3dB cut-off frequency */
enum bmi088_osr_modes {
BMI088_ACCEL_MODE_OSR_NORMAL = 0xA,
BMI088_ACCEL_MODE_OSR_2 = 0x9,
BMI088_ACCEL_MODE_OSR_4 = 0x8,
};
/* Available ODR (output data rates) in Hz */
enum bmi088_odr_modes {
BMI088_ACCEL_MODE_ODR_12_5 = 0x5,
BMI088_ACCEL_MODE_ODR_25 = 0x6,
BMI088_ACCEL_MODE_ODR_50 = 0x7,
BMI088_ACCEL_MODE_ODR_100 = 0x8,
BMI088_ACCEL_MODE_ODR_200 = 0x9,
BMI088_ACCEL_MODE_ODR_400 = 0xa,
BMI088_ACCEL_MODE_ODR_800 = 0xb,
BMI088_ACCEL_MODE_ODR_1600 = 0xc,
};
struct bmi088_scale_info {
int scale;
u8 reg_range;
};
struct bmi088_accel_chip_info {
const char *name;
u8 chip_id;
const struct iio_chan_spec *channels;
int num_channels;
};
struct bmi088_accel_data {
struct regmap *regmap;
const struct bmi088_accel_chip_info *chip_info;
u8 buffer[2] ____cacheline_aligned; /* shared DMA safe buffer */
};
static const struct regmap_range bmi088_volatile_ranges[] = {
/* All registers below 0x40 are volatile, except the CHIP ID. */
regmap_reg_range(BMI088_ACCEL_REG_ERROR, 0x3f),
/* Mark the RESET as volatile too, it is self-clearing */
regmap_reg_range(BMI088_ACCEL_REG_RESET, BMI088_ACCEL_REG_RESET),
};
static const struct regmap_access_table bmi088_volatile_table = {
.yes_ranges = bmi088_volatile_ranges,
.n_yes_ranges = ARRAY_SIZE(bmi088_volatile_ranges),
};
const struct regmap_config bmi088_regmap_conf = {
.reg_bits = 8,
.val_bits = 8,
.max_register = 0x7E,
.volatile_table = &bmi088_volatile_table,
.cache_type = REGCACHE_RBTREE,
};
EXPORT_SYMBOL_GPL(bmi088_regmap_conf);
static int bmi088_accel_power_up(struct bmi088_accel_data *data)
{
int ret;
/* Enable accelerometer and temperature sensor */
ret = regmap_write(data->regmap, BMI088_ACCEL_REG_PWR_CTRL, 0x4);
if (ret)
return ret;
/* Datasheet recommends to wait at least 5ms before communication */
usleep_range(5000, 6000);
/* Disable suspend mode */
ret = regmap_write(data->regmap, BMI088_ACCEL_REG_PWR_CONF, 0x0);
if (ret)
return ret;
/* Recommended at least 1ms before further communication */
usleep_range(1000, 1200);
return 0;
}
static int bmi088_accel_power_down(struct bmi088_accel_data *data)
{
int ret;
/* Enable suspend mode */
ret = regmap_write(data->regmap, BMI088_ACCEL_REG_PWR_CONF, 0x3);
if (ret)
return ret;
/* Recommended at least 1ms before further communication */
usleep_range(1000, 1200);
/* Disable accelerometer and temperature sensor */
ret = regmap_write(data->regmap, BMI088_ACCEL_REG_PWR_CTRL, 0x0);
if (ret)
return ret;
/* Datasheet recommends to wait at least 5ms before communication */
usleep_range(5000, 6000);
return 0;
}
static int bmi088_accel_get_sample_freq(struct bmi088_accel_data *data,
int *val, int *val2)
{
unsigned int value;
int ret;
ret = regmap_read(data->regmap, BMI088_ACCEL_REG_ACC_CONF,
&value);
if (ret)
return ret;
value &= BMI088_ACCEL_MODE_ODR_MASK;
value -= BMI088_ACCEL_MODE_ODR_12_5;
value <<= 1;
if (value >= ARRAY_SIZE(bmi088_sample_freqs) - 1)
return -EINVAL;
*val = bmi088_sample_freqs[value];
*val2 = bmi088_sample_freqs[value + 1];
return IIO_VAL_INT_PLUS_MICRO;
}
static int bmi088_accel_set_sample_freq(struct bmi088_accel_data *data, int val)
{
unsigned int regval;
int index = 0;
while (index < ARRAY_SIZE(bmi088_sample_freqs) &&
bmi088_sample_freqs[index] != val)
index += 2;
if (index >= ARRAY_SIZE(bmi088_sample_freqs))
return -EINVAL;
regval = (index >> 1) + BMI088_ACCEL_MODE_ODR_12_5;
return regmap_update_bits(data->regmap, BMI088_ACCEL_REG_ACC_CONF,
BMI088_ACCEL_MODE_ODR_MASK, regval);
}
static int bmi088_accel_get_temp(struct bmi088_accel_data *data, int *val)
{
int ret;
s16 temp;
ret = regmap_bulk_read(data->regmap, BMI088_ACCEL_REG_TEMP,
&data->buffer, sizeof(__be16));
if (ret)
return ret;
/* data->buffer is cacheline aligned */
temp = be16_to_cpu(*(__be16 *)data->buffer);
*val = temp >> BMI088_ACCEL_REG_TEMP_SHIFT;
return IIO_VAL_INT;
}
static int bmi088_accel_get_axis(struct bmi088_accel_data *data,
struct iio_chan_spec const *chan,
int *val)
{
int ret;
s16 raw_val;
ret = regmap_bulk_read(data->regmap,
BMI088_ACCEL_AXIS_TO_REG(chan->scan_index),
data->buffer, sizeof(__le16));
if (ret)
return ret;
raw_val = le16_to_cpu(*(__le16 *)data->buffer);
*val = raw_val;
return IIO_VAL_INT;
}
static int bmi088_accel_read_raw(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan,
int *val, int *val2, long mask)
{
struct bmi088_accel_data *data = iio_priv(indio_dev);
struct device *dev = regmap_get_device(data->regmap);
int ret;
switch (mask) {
case IIO_CHAN_INFO_RAW:
switch (chan->type) {
case IIO_TEMP:
pm_runtime_get_sync(dev);
ret = bmi088_accel_get_temp(data, val);
goto out_read_raw_pm_put;
case IIO_ACCEL:
pm_runtime_get_sync(dev);
ret = iio_device_claim_direct_mode(indio_dev);
if (ret)
goto out_read_raw_pm_put;
ret = bmi088_accel_get_axis(data, chan, val);
iio_device_release_direct_mode(indio_dev);
if (!ret)
ret = IIO_VAL_INT;
goto out_read_raw_pm_put;
default:
return -EINVAL;
}
case IIO_CHAN_INFO_OFFSET:
switch (chan->type) {
case IIO_TEMP:
/* Offset applies before scale */
*val = BMI088_ACCEL_TEMP_OFFSET/BMI088_ACCEL_TEMP_UNIT;
return IIO_VAL_INT;
default:
return -EINVAL;
}
case IIO_CHAN_INFO_SCALE:
switch (chan->type) {
case IIO_TEMP:
/* 0.125 degrees per LSB */
*val = BMI088_ACCEL_TEMP_UNIT;
return IIO_VAL_INT;
case IIO_ACCEL:
pm_runtime_get_sync(dev);
ret = regmap_read(data->regmap,
BMI088_ACCEL_REG_ACC_RANGE, val);
if (ret)
goto out_read_raw_pm_put;
*val2 = 15 - (*val & 0x3);
*val = 3 * 980;
ret = IIO_VAL_FRACTIONAL_LOG2;
goto out_read_raw_pm_put;
default:
return -EINVAL;
}
case IIO_CHAN_INFO_SAMP_FREQ:
pm_runtime_get_sync(dev);
ret = bmi088_accel_get_sample_freq(data, val, val2);
goto out_read_raw_pm_put;
default:
break;
}
return -EINVAL;
out_read_raw_pm_put:
pm_runtime_mark_last_busy(dev);
pm_runtime_put_autosuspend(dev);
return ret;
}
static int bmi088_accel_read_avail(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan,
const int **vals, int *type, int *length,
long mask)
{
switch (mask) {
case IIO_CHAN_INFO_SAMP_FREQ:
*type = IIO_VAL_INT_PLUS_MICRO;
*vals = bmi088_sample_freqs;
*length = ARRAY_SIZE(bmi088_sample_freqs);
return IIO_AVAIL_LIST;
default:
return -EINVAL;
}
}
static int bmi088_accel_write_raw(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan,
int val, int val2, long mask)
{
struct bmi088_accel_data *data = iio_priv(indio_dev);
struct device *dev = regmap_get_device(data->regmap);
int ret;
switch (mask) {
case IIO_CHAN_INFO_SAMP_FREQ:
pm_runtime_get_sync(dev);
ret = bmi088_accel_set_sample_freq(data, val);
pm_runtime_mark_last_busy(dev);
pm_runtime_put_autosuspend(dev);
return ret;
default:
return -EINVAL;
}
}
#define BMI088_ACCEL_CHANNEL(_axis) { \
.type = IIO_ACCEL, \
.modified = 1, \
.channel2 = IIO_MOD_##_axis, \
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) | \
BIT(IIO_CHAN_INFO_SAMP_FREQ), \
.info_mask_shared_by_type_available = BIT(IIO_CHAN_INFO_SAMP_FREQ), \
.scan_index = AXIS_##_axis, \
}
static const struct iio_chan_spec bmi088_accel_channels[] = {
{
.type = IIO_TEMP,
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
BIT(IIO_CHAN_INFO_SCALE) |
BIT(IIO_CHAN_INFO_OFFSET),
.scan_index = -1,
},
BMI088_ACCEL_CHANNEL(X),
BMI088_ACCEL_CHANNEL(Y),
BMI088_ACCEL_CHANNEL(Z),
IIO_CHAN_SOFT_TIMESTAMP(3),
};
static const struct bmi088_accel_chip_info bmi088_accel_chip_info_tbl[] = {
[0] = {
.name = "bmi088a",
.chip_id = 0x1E,
.channels = bmi088_accel_channels,
.num_channels = ARRAY_SIZE(bmi088_accel_channels),
},
};
static const struct iio_info bmi088_accel_info = {
.read_raw = bmi088_accel_read_raw,
.write_raw = bmi088_accel_write_raw,
.read_avail = bmi088_accel_read_avail,
};
static const unsigned long bmi088_accel_scan_masks[] = {
BIT(AXIS_X) | BIT(AXIS_Y) | BIT(AXIS_Z),
0
};
static int bmi088_accel_chip_init(struct bmi088_accel_data *data)
{
struct device *dev = regmap_get_device(data->regmap);
int ret, i;
unsigned int val;
/* Do a dummy read to enable SPI interface, won't harm I2C */
regmap_read(data->regmap, BMI088_ACCEL_REG_INT_STATUS, &val);
/*
* Reset chip to get it in a known good state. A delay of 1ms after
* reset is required according to the data sheet
*/
ret = regmap_write(data->regmap, BMI088_ACCEL_REG_RESET,
BMI088_ACCEL_RESET_VAL);
if (ret)
return ret;
usleep_range(1000, 2000);
/* Do a dummy read again after a reset to enable the SPI interface */
regmap_read(data->regmap, BMI088_ACCEL_REG_INT_STATUS, &val);
/* Read chip ID */
ret = regmap_read(data->regmap, BMI088_ACCEL_REG_CHIP_ID, &val);
if (ret) {
dev_err(dev, "Error: Reading chip id\n");
return ret;
}
/* Validate chip ID */
for (i = 0; i < ARRAY_SIZE(bmi088_accel_chip_info_tbl); i++) {
if (bmi088_accel_chip_info_tbl[i].chip_id == val) {
data->chip_info = &bmi088_accel_chip_info_tbl[i];
break;
}
}
if (i == ARRAY_SIZE(bmi088_accel_chip_info_tbl)) {
dev_err(dev, "Invalid chip %x\n", val);
return -ENODEV;
}
return 0;
}
int bmi088_accel_core_probe(struct device *dev, struct regmap *regmap,
int irq, const char *name, bool block_supported)
{
struct bmi088_accel_data *data;
struct iio_dev *indio_dev;
int ret;
indio_dev = devm_iio_device_alloc(dev, sizeof(*data));
if (!indio_dev)
return -ENOMEM;
data = iio_priv(indio_dev);
dev_set_drvdata(dev, indio_dev);
data->regmap = regmap;
ret = bmi088_accel_chip_init(data);
if (ret)
return ret;
indio_dev->dev.parent = dev;
indio_dev->channels = data->chip_info->channels;
indio_dev->num_channels = data->chip_info->num_channels;
indio_dev->name = name ? name : data->chip_info->name;
indio_dev->available_scan_masks = bmi088_accel_scan_masks;
indio_dev->modes = INDIO_DIRECT_MODE;
indio_dev->info = &bmi088_accel_info;
/* Enable runtime PM */
pm_runtime_get_noresume(dev);
pm_runtime_set_suspended(dev);
pm_runtime_enable(dev);
/* We need ~6ms to startup, so set the delay to 6 seconds */
pm_runtime_set_autosuspend_delay(dev, 6000);
pm_runtime_use_autosuspend(dev);
pm_runtime_put(dev);
ret = iio_device_register(indio_dev);
if (ret)
dev_err(dev, "Unable to register iio device\n");
return ret;
}
EXPORT_SYMBOL_GPL(bmi088_accel_core_probe);
int bmi088_accel_core_remove(struct device *dev)
{
struct iio_dev *indio_dev = dev_get_drvdata(dev);
struct bmi088_accel_data *data = iio_priv(indio_dev);
iio_device_unregister(indio_dev);
pm_runtime_disable(dev);
pm_runtime_set_suspended(dev);
pm_runtime_put_noidle(dev);
bmi088_accel_power_down(data);
return 0;
}
EXPORT_SYMBOL_GPL(bmi088_accel_core_remove);
static int __maybe_unused bmi088_accel_runtime_suspend(struct device *dev)
{
struct iio_dev *indio_dev = dev_get_drvdata(dev);
struct bmi088_accel_data *data = iio_priv(indio_dev);
return bmi088_accel_power_down(data);
}
static int __maybe_unused bmi088_accel_runtime_resume(struct device *dev)
{
struct iio_dev *indio_dev = dev_get_drvdata(dev);
struct bmi088_accel_data *data = iio_priv(indio_dev);
return bmi088_accel_power_up(data);
}
const struct dev_pm_ops bmi088_accel_pm_ops = {
SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend,
pm_runtime_force_resume)
SET_RUNTIME_PM_OPS(bmi088_accel_runtime_suspend,
bmi088_accel_runtime_resume, NULL)
};
EXPORT_SYMBOL_GPL(bmi088_accel_pm_ops);
MODULE_AUTHOR("Niek van Agt <niek.van.agt@topicproducts.com>");
MODULE_LICENSE("GPL v2");
MODULE_DESCRIPTION("BMI088 accelerometer driver (core)");

83
drivers/iio/accel/bmi088-accel-spi.c Normal file
View File

@ -0,0 +1,83 @@
// SPDX-License-Identifier: GPL-2.0
/*
* 3-axis accelerometer driver supporting following Bosch-Sensortec chips:
* - BMI088
*
* Copyright (c) 2018-2020, Topic Embedded Products
*/
#include <linux/module.h>
#include <linux/regmap.h>
#include <linux/slab.h>
#include <linux/spi/spi.h>
#include "bmi088-accel.h"
static int bmi088_regmap_spi_write(void *context, const void *data, size_t count)
{
struct spi_device *spi = context;
/* Write register is same as generic SPI */
return spi_write(spi, data, count);
}
static int bmi088_regmap_spi_read(void *context, const void *reg,
size_t reg_size, void *val, size_t val_size)
{
struct spi_device *spi = context;
u8 addr[2];
addr[0] = *(u8 *)reg;
addr[0] |= BIT(7); /* Set RW = '1' */
addr[1] = 0; /* Read requires a dummy byte transfer */
return spi_write_then_read(spi, addr, sizeof(addr), val, val_size);
}
static struct regmap_bus bmi088_regmap_bus = {
.write = bmi088_regmap_spi_write,
.read = bmi088_regmap_spi_read,
};
static int bmi088_accel_probe(struct spi_device *spi)
{
struct regmap *regmap;
const struct spi_device_id *id = spi_get_device_id(spi);
regmap = devm_regmap_init(&spi->dev, &bmi088_regmap_bus,
spi, &bmi088_regmap_conf);
if (IS_ERR(regmap)) {
dev_err(&spi->dev, "Failed to initialize spi regmap\n");
return PTR_ERR(regmap);
}
return bmi088_accel_core_probe(&spi->dev, regmap, spi->irq, id->name,
true);
}
static int bmi088_accel_remove(struct spi_device *spi)
{
return bmi088_accel_core_remove(&spi->dev);
}
static const struct spi_device_id bmi088_accel_id[] = {
{"bmi088-accel", },
{}
};
MODULE_DEVICE_TABLE(spi, bmi088_accel_id);
static struct spi_driver bmi088_accel_driver = {
.driver = {
.name = "bmi088_accel_spi",
.pm = &bmi088_accel_pm_ops,
},
.probe = bmi088_accel_probe,
.remove = bmi088_accel_remove,
.id_table = bmi088_accel_id,
};
module_spi_driver(bmi088_accel_driver);
MODULE_AUTHOR("Niek van Agt <niek.van.agt@topicproducts.com>");
MODULE_LICENSE("GPL v2");
MODULE_DESCRIPTION("BMI088 accelerometer driver (SPI)");

18
drivers/iio/accel/bmi088-accel.h Normal file
View File

@ -0,0 +1,18 @@
/* SPDX-License-Identifier: GPL-2.0 */
#ifndef BMI088_ACCEL_H
#define BMI088_ACCEL_H
#include <linux/pm.h>
#include <linux/regmap.h>
#include <linux/types.h>
struct device;
extern const struct regmap_config bmi088_regmap_conf;
extern const struct dev_pm_ops bmi088_accel_pm_ops;
int bmi088_accel_core_probe(struct device *dev, struct regmap *regmap, int irq,
const char *name, bool block_supported);
int bmi088_accel_core_remove(struct device *dev);
#endif /* BMI088_ACCEL_H */

2
drivers/iio/accel/cros_ec_accel_legacy.c
View File

@ -215,7 +215,7 @@ static int cros_ec_accel_legacy_probe(struct platform_device *pdev)
return -ENOMEM;
ret = cros_ec_sensors_core_init(pdev, indio_dev, true,
cros_ec_sensors_capture, NULL, false);
cros_ec_sensors_capture, NULL);
if (ret)
return ret;

2
drivers/iio/accel/da280.c
View File

@ -1,5 +1,5 @@
// SPDX-License-Identifier: GPL-2.0-only
/**
/*
* IIO driver for the MiraMEMS DA280 3-axis accelerometer and
* IIO driver for the MiraMEMS DA226 2-axis accelerometer
*

2
drivers/iio/accel/da311.c
View File

@ -1,5 +1,5 @@
// SPDX-License-Identifier: GPL-2.0-only
/**
/*
* IIO driver for the MiraMEMS DA311 3-axis accelerometer
*
* Copyright (c) 2016 Hans de Goede <hdegoede@redhat.com>

2
drivers/iio/accel/dmard10.c
View File

@ -1,5 +1,5 @@
// SPDX-License-Identifier: GPL-2.0-only
/**
/*
* IIO driver for the 3-axis accelerometer Domintech ARD10.
*
* Copyright (c) 2016 Hans de Goede <hdegoede@redhat.com>

23
drivers/iio/accel/hid-sensor-accel-3d.c
View File

@ -43,6 +43,10 @@ static const u32 accel_3d_addresses[ACCEL_3D_CHANNEL_MAX] = {
HID_USAGE_SENSOR_ACCEL_Z_AXIS
};
static const u32 accel_3d_sensitivity_addresses[] = {
HID_USAGE_SENSOR_DATA_ACCELERATION,
};
/* Channel definitions */
static const struct iio_chan_spec accel_3d_channels[] = {
{
@ -317,18 +321,6 @@ static int accel_3d_parse_report(struct platform_device *pdev,
&st->accel[CHANNEL_SCAN_INDEX_X],
&st->scale_pre_decml, &st->scale_post_decml);
/* Set Sensitivity field ids, when there is no individual modifier */
if (st->common_attributes.sensitivity.index < 0) {
sensor_hub_input_get_attribute_info(hsdev,
HID_FEATURE_REPORT, usage_id,
HID_USAGE_SENSOR_DATA_MOD_CHANGE_SENSITIVITY_ABS |
HID_USAGE_SENSOR_DATA_ACCELERATION,
&st->common_attributes.sensitivity);
dev_dbg(&pdev->dev, "Sensitivity index:report %d:%d\n",
st->common_attributes.sensitivity.index,
st->common_attributes.sensitivity.report_id);
}
return ret;
}
@ -366,8 +358,11 @@ static int hid_accel_3d_probe(struct platform_device *pdev)
channel_size = sizeof(gravity_channels);
indio_dev->num_channels = ARRAY_SIZE(gravity_channels);
}
ret = hid_sensor_parse_common_attributes(hsdev, hsdev->usage,
&accel_state->common_attributes);
ret = hid_sensor_parse_common_attributes(hsdev,
hsdev->usage,
&accel_state->common_attributes,
accel_3d_sensitivity_addresses,
ARRAY_SIZE(accel_3d_sensitivity_addresses));
if (ret) {
dev_err(&pdev->dev, "failed to setup common attributes\n");
return ret;

16
drivers/iio/accel/kxcjk-1013.c
View File

@ -1284,7 +1284,8 @@ static irqreturn_t kxcjk1013_data_rdy_trig_poll(int irq, void *private)
static const char *kxcjk1013_match_acpi_device(struct device *dev,
enum kx_chipset *chipset,
enum kx_acpi_type *acpi_type)
enum kx_acpi_type *acpi_type,
const char **label)
{
const struct acpi_device_id *id;
@ -1292,10 +1293,14 @@ static const char *kxcjk1013_match_acpi_device(struct device *dev,
if (!id)
return NULL;
if (strcmp(id->id, "SMO8500") == 0)
if (strcmp(id->id, "SMO8500") == 0) {
*acpi_type = ACPI_SMO8500;
else if (strcmp(id->id, "KIOX010A") == 0)
} else if (strcmp(id->id, "KIOX010A") == 0) {
*acpi_type = ACPI_KIOX010A;
*label = "accel-display";
} else if (strcmp(id->id, "KIOX020A") == 0) {
*label = "accel-base";
}
*chipset = (enum kx_chipset)id->driver_data;
@ -1368,7 +1373,8 @@ static int kxcjk1013_probe(struct i2c_client *client,
} else if (ACPI_HANDLE(&client->dev)) {
name = kxcjk1013_match_acpi_device(&client->dev,
&data->chipset,
&data->acpi_type);
&data->acpi_type,
&indio_dev->label);
} else
return -ENODEV;
@ -1413,7 +1419,6 @@ static int kxcjk1013_probe(struct i2c_client *client,
goto err_poweroff;
}
data->dready_trig->dev.parent = &client->dev;
data->dready_trig->ops = &kxcjk1013_trigger_ops;
iio_trigger_set_drvdata(data->dready_trig, indio_dev);
indio_dev->trig = data->dready_trig;
@ -1422,7 +1427,6 @@ static int kxcjk1013_probe(struct i2c_client *client,
if (ret)
goto err_poweroff;
data->motion_trig->dev.parent = &client->dev;
data->motion_trig->ops = &kxcjk1013_trigger_ops;
iio_trigger_set_drvdata(data->motion_trig, indio_dev);
ret = iio_trigger_register(data->motion_trig);

2
drivers/iio/accel/mc3230.c
View File

@ -1,5 +1,5 @@
// SPDX-License-Identifier: GPL-2.0-or-later
/**
/*
* mCube MC3230 3-Axis Accelerometer
*
* Copyright (c) 2016 Hans de Goede <hdegoede@redhat.com>

2
drivers/iio/accel/mma7660.c
View File

@ -1,5 +1,5 @@
// SPDX-License-Identifier: GPL-2.0-only
/**
/*
* Freescale MMA7660FC 3-Axis Accelerometer
*
* Copyright (c) 2016, Intel Corporation.

47
drivers/iio/accel/mma8452.c
View File

@ -58,7 +58,7 @@
#define MMA8452_FF_MT_THS 0x17
#define MMA8452_FF_MT_THS_MASK 0x7f
#define MMA8452_FF_MT_COUNT 0x18
#define MMA8452_FF_MT_CHAN_SHIFT 3
#define MMA8452_FF_MT_CHAN_SHIFT 3
#define MMA8452_TRANSIENT_CFG 0x1d
#define MMA8452_TRANSIENT_CFG_CHAN(chan) BIT(chan + 1)
#define MMA8452_TRANSIENT_CFG_HPF_BYP BIT(0)
@ -70,7 +70,7 @@
#define MMA8452_TRANSIENT_THS 0x1f
#define MMA8452_TRANSIENT_THS_MASK GENMASK(6, 0)
#define MMA8452_TRANSIENT_COUNT 0x20
#define MMA8452_TRANSIENT_CHAN_SHIFT 1
#define MMA8452_TRANSIENT_CHAN_SHIFT 1
#define MMA8452_CTRL_REG1 0x2a
#define MMA8452_CTRL_ACTIVE BIT(0)
#define MMA8452_CTRL_DR_MASK GENMASK(5, 3)
@ -134,33 +134,33 @@ struct mma8452_data {
* used for different chips and the relevant registers are included here.
*/
struct mma8452_event_regs {
u8 ev_cfg;
u8 ev_cfg_ele;
u8 ev_cfg_chan_shift;
u8 ev_src;
u8 ev_ths;
u8 ev_ths_mask;
u8 ev_count;
u8 ev_cfg;
u8 ev_cfg_ele;
u8 ev_cfg_chan_shift;
u8 ev_src;
u8 ev_ths;
u8 ev_ths_mask;
u8 ev_count;
};
static const struct mma8452_event_regs ff_mt_ev_regs = {
.ev_cfg = MMA8452_FF_MT_CFG,
.ev_cfg_ele = MMA8452_FF_MT_CFG_ELE,
.ev_cfg_chan_shift = MMA8452_FF_MT_CHAN_SHIFT,
.ev_src = MMA8452_FF_MT_SRC,
.ev_ths = MMA8452_FF_MT_THS,
.ev_ths_mask = MMA8452_FF_MT_THS_MASK,
.ev_count = MMA8452_FF_MT_COUNT
.ev_cfg = MMA8452_FF_MT_CFG,
.ev_cfg_ele = MMA8452_FF_MT_CFG_ELE,
.ev_cfg_chan_shift = MMA8452_FF_MT_CHAN_SHIFT,
.ev_src = MMA8452_FF_MT_SRC,
.ev_ths = MMA8452_FF_MT_THS,
.ev_ths_mask = MMA8452_FF_MT_THS_MASK,
.ev_count = MMA8452_FF_MT_COUNT
};
static const struct mma8452_event_regs trans_ev_regs = {
.ev_cfg = MMA8452_TRANSIENT_CFG,
.ev_cfg_ele = MMA8452_TRANSIENT_CFG_ELE,
.ev_cfg_chan_shift = MMA8452_TRANSIENT_CHAN_SHIFT,
.ev_src = MMA8452_TRANSIENT_SRC,
.ev_ths = MMA8452_TRANSIENT_THS,
.ev_ths_mask = MMA8452_TRANSIENT_THS_MASK,
.ev_count = MMA8452_TRANSIENT_COUNT,
.ev_cfg = MMA8452_TRANSIENT_CFG,
.ev_cfg_ele = MMA8452_TRANSIENT_CFG_ELE,
.ev_cfg_chan_shift = MMA8452_TRANSIENT_CHAN_SHIFT,
.ev_src = MMA8452_TRANSIENT_SRC,
.ev_ths = MMA8452_TRANSIENT_THS,
.ev_ths_mask = MMA8452_TRANSIENT_THS_MASK,
.ev_count = MMA8452_TRANSIENT_COUNT,
};
/**
@ -1465,7 +1465,6 @@ static int mma8452_trigger_setup(struct iio_dev *indio_dev)
if (!trig)
return -ENOMEM;
trig->dev.parent = &data->client->dev;
trig->ops = &mma8452_trigger_ops;
iio_trigger_set_drvdata(trig, indio_dev);

1
drivers/iio/accel/mxc4005.c
View File

@ -450,7 +450,6 @@ static int mxc4005_probe(struct i2c_client *client,
return ret;
}
data->dready_trig->dev.parent = &client->dev;
data->dready_trig->ops = &mxc4005_trigger_ops;
iio_trigger_set_drvdata(data->dready_trig, indio_dev);
indio_dev->trig = data->dready_trig;

27
drivers/iio/accel/sca3000.c
View File

@ -351,7 +351,7 @@ static int __sca3000_unlock_reg_lock(struct sca3000_state *st)
}
/**
* sca3000_write_ctrl_reg() write to a lock protect ctrl register
* sca3000_write_ctrl_reg() - write to a lock protect ctrl register
* @st: Driver specific device instance data.
* @sel: selects which registers we wish to write to
* @val: the value to be written
@ -389,7 +389,7 @@ error_ret:
}
/**
* sca3000_read_ctrl_reg() read from lock protected control register.
* sca3000_read_ctrl_reg() - read from lock protected control register.
* @st: Driver specific device instance data.
* @ctrl_reg: Which ctrl register do we want to read.
*
@ -421,7 +421,7 @@ error_ret:
}
/**
* sca3000_show_rev() - sysfs interface to read the chip revision number
* sca3000_print_rev() - sysfs interface to read the chip revision number
* @indio_dev: Device instance specific generic IIO data.
* Driver specific device instance data can be obtained via
* via iio_priv(indio_dev)
@ -902,7 +902,7 @@ static int sca3000_read_event_value(struct iio_dev *indio_dev,
}
/**
* sca3000_write_value() - control of threshold and period
* sca3000_write_event_value() - control of threshold and period
* @indio_dev: Device instance specific IIO information.
* @chan: Description of the channel for which the event is being
* configured.
@ -1272,20 +1272,6 @@ static int sca3000_write_event_config(struct iio_dev *indio_dev,
return ret;
}
static int sca3000_configure_ring(struct iio_dev *indio_dev)
{
struct iio_buffer *buffer;
buffer = devm_iio_kfifo_allocate(&indio_dev->dev);
if (!buffer)
return -ENOMEM;
iio_device_attach_buffer(indio_dev, buffer);
indio_dev->modes |= INDIO_BUFFER_SOFTWARE;
return 0;
}
static inline
int __sca3000_hw_ring_state_set(struct iio_dev *indio_dev, bool state)
{
@ -1479,7 +1465,9 @@ static int sca3000_probe(struct spi_device *spi)
}
indio_dev->modes = INDIO_DIRECT_MODE;
ret = sca3000_configure_ring(indio_dev);
ret = devm_iio_kfifo_buffer_setup(&spi->dev, indio_dev,
INDIO_BUFFER_SOFTWARE,
&sca3000_ring_setup_ops);
if (ret)
return ret;
@ -1493,7 +1481,6 @@ static int sca3000_probe(struct spi_device *spi)
if (ret)
return ret;
}
indio_dev->setup_ops = &sca3000_ring_setup_ops;
ret = sca3000_clean_setup(st);
if (ret)
goto error_free_irq;

14
drivers/iio/accel/ssp_accel_sensor.c
View File

@ -96,7 +96,6 @@ static int ssp_accel_probe(struct platform_device *pdev)
int ret;
struct iio_dev *indio_dev;
struct ssp_sensor_data *spd;
struct iio_buffer *buffer;
indio_dev = devm_iio_device_alloc(&pdev->dev, sizeof(*spd));
if (!indio_dev)
@ -109,18 +108,15 @@ static int ssp_accel_probe(struct platform_device *pdev)
indio_dev->name = ssp_accel_device_name;
indio_dev->info = &ssp_accel_iio_info;
indio_dev->modes = INDIO_BUFFER_SOFTWARE;
indio_dev->channels = ssp_acc_channels;
indio_dev->num_channels = ARRAY_SIZE(ssp_acc_channels);
indio_dev->available_scan_masks = ssp_accel_scan_mask;
buffer = devm_iio_kfifo_allocate(&pdev->dev);
if (!buffer)
return -ENOMEM;
iio_device_attach_buffer(indio_dev, buffer);
indio_dev->setup_ops = &ssp_accel_buffer_ops;
ret = devm_iio_kfifo_buffer_setup(&pdev->dev, indio_dev,
INDIO_BUFFER_SOFTWARE,
&ssp_accel_buffer_ops);
if (ret)
return ret;
platform_set_drvdata(pdev, indio_dev);

3
drivers/iio/accel/stk8312.c
View File

@ -1,5 +1,5 @@
// SPDX-License-Identifier: GPL-2.0-only
/**
/*
* Sensortek STK8312 3-Axis Accelerometer
*
* Copyright (c) 2015, Intel Corporation.
@ -558,7 +558,6 @@ static int stk8312_probe(struct i2c_client *client,
goto err_power_off;
}
data->dready_trig->dev.parent = &client->dev;
data->dready_trig->ops = &stk8312_trigger_ops;
iio_trigger_set_drvdata(data->dready_trig, indio_dev);
ret = iio_trigger_register(data->dready_trig);

3
drivers/iio/accel/stk8ba50.c
View File

@ -1,5 +1,5 @@
// SPDX-License-Identifier: GPL-2.0-only
/**
/*
* Sensortek STK8BA50 3-Axis Accelerometer
*
* Copyright (c) 2015, Intel Corporation.
@ -454,7 +454,6 @@ static int stk8ba50_probe(struct i2c_client *client,
goto err_power_off;
}
data->dready_trig->dev.parent = &client->dev;
data->dready_trig->ops = &stk8ba50_trigger_ops;
iio_trigger_set_drvdata(data->dready_trig, indio_dev);
ret = iio_trigger_register(data->dready_trig);

12
drivers/iio/adc/Kconfig
View File

@ -1154,6 +1154,18 @@ config TI_ADS124S08
This driver can also be built as a module. If so, the module will be
called ti-ads124s08.
config TI_ADS131E08
tristate "Texas Instruments ADS131E08"
depends on SPI
select IIO_BUFFER
select IIO_TRIGGERED_BUFFER
help
Say yes here to get support for Texas Instruments ADS131E04, ADS131E06
and ADS131E08 chips.
This driver can also be built as a module. If so, the module will be
called ti-ads131e08.
config TI_AM335X_ADC
tristate "TI's AM335X ADC driver"
depends on MFD_TI_AM335X_TSCADC && HAS_DMA

1
drivers/iio/adc/Makefile
View File

@ -103,6 +103,7 @@ obj-$(CONFIG_TI_ADS7950) += ti-ads7950.o
obj-$(CONFIG_TI_ADS8344) += ti-ads8344.o
obj-$(CONFIG_TI_ADS8688) += ti-ads8688.o
obj-$(CONFIG_TI_ADS124S08) += ti-ads124s08.o
obj-$(CONFIG_TI_ADS131E08) += ti-ads131e08.o
obj-$(CONFIG_TI_AM335X_ADC) += ti_am335x_adc.o
obj-$(CONFIG_TI_TLC4541) += ti-tlc4541.o
obj-$(CONFIG_TWL4030_MADC) += twl4030-madc.o

461
drivers/iio/adc/ad7124.c
View File

@ -5,12 +5,14 @@
* Copyright 2018 Analog Devices Inc.
*/
#include <linux/bitfield.h>
#include <linux/bitops.h>
#include <linux/clk.h>
#include <linux/delay.h>
#include <linux/device.h>
#include <linux/err.h>
#include <linux/interrupt.h>
#include <linux/kernel.h>
#include <linux/kfifo.h>
#include <linux/module.h>
#include <linux/of_device.h>
#include <linux/regulator/consumer.h>
@ -86,6 +88,10 @@
#define AD7124_SINC3_FILTER 2
#define AD7124_SINC4_FILTER 0
#define AD7124_CONF_ADDR_OFFSET 20
#define AD7124_MAX_CONFIGS 8
#define AD7124_MAX_CHANNELS 16
enum ad7124_ids {
ID_AD7124_4,
ID_AD7124_8,
@ -136,25 +142,37 @@ struct ad7124_chip_info {
};
struct ad7124_channel_config {
bool live;
unsigned int cfg_slot;
enum ad7124_ref_sel refsel;
bool bipolar;
bool buf_positive;
bool buf_negative;
unsigned int ain;
unsigned int vref_mv;
unsigned int pga_bits;
unsigned int odr;
unsigned int odr_sel_bits;
unsigned int filter_type;
};
struct ad7124_channel {
unsigned int nr;
struct ad7124_channel_config cfg;
unsigned int ain;
unsigned int slot;
};
struct ad7124_state {
const struct ad7124_chip_info *chip_info;
struct ad_sigma_delta sd;
struct ad7124_channel_config *channel_config;
struct ad7124_channel *channels;
struct regulator *vref[4];
struct clk *mclk;
unsigned int adc_control;
unsigned int num_channels;
struct mutex cfgs_lock; /* lock for configs access */
unsigned long cfg_slots_status; /* bitmap with slot status (1 means it is used) */
DECLARE_KFIFO(live_cfgs_fifo, struct ad7124_channel_config *, AD7124_MAX_CONFIGS);
};
static const struct iio_chan_spec ad7124_channel_template = {
@ -238,33 +256,9 @@ static int ad7124_set_mode(struct ad_sigma_delta *sd,
return ad_sd_write_reg(&st->sd, AD7124_ADC_CONTROL, 2, st->adc_control);
}
static int ad7124_set_channel(struct ad_sigma_delta *sd, unsigned int channel)
{
struct ad7124_state *st = container_of(sd, struct ad7124_state, sd);
unsigned int val;
val = st->channel_config[channel].ain | AD7124_CHANNEL_EN(1) |
AD7124_CHANNEL_SETUP(channel);
return ad_sd_write_reg(&st->sd, AD7124_CHANNEL(channel), 2, val);
}
static const struct ad_sigma_delta_info ad7124_sigma_delta_info = {
.set_channel = ad7124_set_channel,
.set_mode = ad7124_set_mode,
.has_registers = true,
.addr_shift = 0,
.read_mask = BIT(6),
.data_reg = AD7124_DATA,
.irq_flags = IRQF_TRIGGER_FALLING,
};
static int ad7124_set_channel_odr(struct ad7124_state *st,
unsigned int channel,
unsigned int odr)
static void ad7124_set_channel_odr(struct ad7124_state *st, unsigned int channel, unsigned int odr)
{
unsigned int fclk, odr_sel_bits;
int ret;
fclk = clk_get_rate(st->mclk);
/*
@ -280,36 +274,12 @@ static int ad7124_set_channel_odr(struct ad7124_state *st,
else if (odr_sel_bits > 2047)
odr_sel_bits = 2047;
ret = ad7124_spi_write_mask(st, AD7124_FILTER(channel),
AD7124_FILTER_FS_MSK,
AD7124_FILTER_FS(odr_sel_bits), 3);
if (ret < 0)
return ret;
if (odr_sel_bits != st->channels[channel].cfg.odr_sel_bits)
st->channels[channel].cfg.live = false;
/* fADC = fCLK / (FS[10:0] x 32) */
st->channel_config[channel].odr =
DIV_ROUND_CLOSEST(fclk, odr_sel_bits * 32);
return 0;
}
static int ad7124_set_channel_gain(struct ad7124_state *st,
unsigned int channel,
unsigned int gain)
{
unsigned int res;
int ret;
res = ad7124_find_closest_match(ad7124_gain,
ARRAY_SIZE(ad7124_gain), gain);
ret = ad7124_spi_write_mask(st, AD7124_CONFIG(channel),
AD7124_CONFIG_PGA_MSK,
AD7124_CONFIG_PGA(res), 2);
if (ret < 0)
return ret;
st->channel_config[channel].pga_bits = res;
return 0;
st->channels[channel].cfg.odr = DIV_ROUND_CLOSEST(fclk, odr_sel_bits * 32);
st->channels[channel].cfg.odr_sel_bits = odr_sel_bits;
}
static int ad7124_get_3db_filter_freq(struct ad7124_state *st,
@ -317,9 +287,9 @@ static int ad7124_get_3db_filter_freq(struct ad7124_state *st,
{
unsigned int fadc;
fadc = st->channel_config[channel].odr;
fadc = st->channels[channel].cfg.odr;
switch (st->channel_config[channel].filter_type) {
switch (st->channels[channel].cfg.filter_type) {
case AD7124_SINC3_FILTER:
return DIV_ROUND_CLOSEST(fadc * 230, 1000);
case AD7124_SINC4_FILTER:
@ -329,9 +299,8 @@ static int ad7124_get_3db_filter_freq(struct ad7124_state *st,
}
}
static int ad7124_set_3db_filter_freq(struct ad7124_state *st,
unsigned int channel,
unsigned int freq)
static void ad7124_set_3db_filter_freq(struct ad7124_state *st, unsigned int channel,
unsigned int freq)
{
unsigned int sinc4_3db_odr;
unsigned int sinc3_3db_odr;
@ -349,21 +318,211 @@ static int ad7124_set_3db_filter_freq(struct ad7124_state *st,
new_odr = sinc3_3db_odr;
}
if (st->channel_config[channel].filter_type != new_filter) {
int ret;
if (new_odr != st->channels[channel].cfg.odr)
st->channels[channel].cfg.live = false;
st->channel_config[channel].filter_type = new_filter;
ret = ad7124_spi_write_mask(st, AD7124_FILTER(channel),
AD7124_FILTER_TYPE_MSK,
AD7124_FILTER_TYPE_SEL(new_filter),
3);
if (ret < 0)
return ret;
st->channels[channel].cfg.filter_type = new_filter;
st->channels[channel].cfg.odr = new_odr;
}
static struct ad7124_channel_config *ad7124_find_similar_live_cfg(struct ad7124_state *st,
struct ad7124_channel_config *cfg)
{
struct ad7124_channel_config *cfg_aux;
ptrdiff_t cmp_size;
int i;
cmp_size = (u8 *)&cfg->live - (u8 *)cfg;
for (i = 0; i < st->num_channels; i++) {
cfg_aux = &st->channels[i].cfg;
if (cfg_aux->live && !memcmp(cfg, cfg_aux, cmp_size))
return cfg_aux;
}
return ad7124_set_channel_odr(st, channel, new_odr);
return NULL;
}
static int ad7124_find_free_config_slot(struct ad7124_state *st)
{
unsigned int free_cfg_slot;
free_cfg_slot = find_next_zero_bit(&st->cfg_slots_status, AD7124_MAX_CONFIGS, 0);
if (free_cfg_slot == AD7124_MAX_CONFIGS)
return -1;
return free_cfg_slot;
}
static int ad7124_init_config_vref(struct ad7124_state *st, struct ad7124_channel_config *cfg)
{
unsigned int refsel = cfg->refsel;
switch (refsel) {
case AD7124_REFIN1:
case AD7124_REFIN2:
case AD7124_AVDD_REF:
if (IS_ERR(st->vref[refsel])) {
dev_err(&st->sd.spi->dev,
"Error, trying to use external voltage reference without a %s regulator.\n",
ad7124_ref_names[refsel]);
return PTR_ERR(st->vref[refsel]);
}
cfg->vref_mv = regulator_get_voltage(st->vref[refsel]);
/* Conversion from uV to mV */
cfg->vref_mv /= 1000;
return 0;
case AD7124_INT_REF:
cfg->vref_mv = 2500;
st->adc_control &= ~AD7124_ADC_CTRL_REF_EN_MSK;
st->adc_control |= AD7124_ADC_CTRL_REF_EN(1);
return ad_sd_write_reg(&st->sd, AD7124_ADC_CONTROL,
2, st->adc_control);
default:
dev_err(&st->sd.spi->dev, "Invalid reference %d\n", refsel);
return -EINVAL;
}
}
static int ad7124_write_config(struct ad7124_state *st, struct ad7124_channel_config *cfg,
unsigned int cfg_slot)
{
unsigned int tmp;
unsigned int val;
int ret;
cfg->cfg_slot = cfg_slot;
tmp = (cfg->buf_positive << 1) + cfg->buf_negative;
val = AD7124_CONFIG_BIPOLAR(cfg->bipolar) | AD7124_CONFIG_REF_SEL(cfg->refsel) |
AD7124_CONFIG_IN_BUFF(tmp);
ret = ad_sd_write_reg(&st->sd, AD7124_CONFIG(cfg->cfg_slot), 2, val);
if (ret < 0)
return ret;
tmp = AD7124_FILTER_TYPE_SEL(cfg->filter_type);
ret = ad7124_spi_write_mask(st, AD7124_FILTER(cfg->cfg_slot), AD7124_FILTER_TYPE_MSK,
tmp, 3);
if (ret < 0)
return ret;
ret = ad7124_spi_write_mask(st, AD7124_FILTER(cfg->cfg_slot), AD7124_FILTER_FS_MSK,
AD7124_FILTER_FS(cfg->odr_sel_bits), 3);
if (ret < 0)
return ret;
return ad7124_spi_write_mask(st, AD7124_CONFIG(cfg->cfg_slot), AD7124_CONFIG_PGA_MSK,
AD7124_CONFIG_PGA(cfg->pga_bits), 2);
}
static struct ad7124_channel_config *ad7124_pop_config(struct ad7124_state *st)
{
struct ad7124_channel_config *lru_cfg;
struct ad7124_channel_config *cfg;
int ret;
int i;
/*
* Pop least recently used config from the fifo
* in order to make room for the new one
*/
ret = kfifo_get(&st->live_cfgs_fifo, &lru_cfg);
if (ret <= 0)
return NULL;
lru_cfg->live = false;
/* mark slot as free */
assign_bit(lru_cfg->cfg_slot, &st->cfg_slots_status, 0);
/* invalidate all other configs that pointed to this one */
for (i = 0; i < st->num_channels; i++) {
cfg = &st->channels[i].cfg;
if (cfg->cfg_slot == lru_cfg->cfg_slot)
cfg->live = false;
}
return lru_cfg;
}
static int ad7124_push_config(struct ad7124_state *st, struct ad7124_channel_config *cfg)
{
struct ad7124_channel_config *lru_cfg;
int free_cfg_slot;
free_cfg_slot = ad7124_find_free_config_slot(st);
if (free_cfg_slot >= 0) {
/* push the new config in configs queue */
kfifo_put(&st->live_cfgs_fifo, cfg);
} else {
/* pop one config to make room for the new one */
lru_cfg = ad7124_pop_config(st);
if (!lru_cfg)
return -EINVAL;
/* push the new config in configs queue */
free_cfg_slot = lru_cfg->cfg_slot;
kfifo_put(&st->live_cfgs_fifo, cfg);
}
/* mark slot as used */
assign_bit(free_cfg_slot, &st->cfg_slots_status, 1);
return ad7124_write_config(st, cfg, free_cfg_slot);
}
static int ad7124_enable_channel(struct ad7124_state *st, struct ad7124_channel *ch)
{
ch->cfg.live = true;
return ad_sd_write_reg(&st->sd, AD7124_CHANNEL(ch->nr), 2, ch->ain |
AD7124_CHANNEL_SETUP(ch->cfg.cfg_slot) | AD7124_CHANNEL_EN(1));
}
static int ad7124_prepare_read(struct ad7124_state *st, int address)
{
struct ad7124_channel_config *cfg = &st->channels[address].cfg;
struct ad7124_channel_config *live_cfg;
/*
* Before doing any reads assign the channel a configuration.
* Check if channel's config is on the device
*/
if (!cfg->live) {
/* check if config matches another one */
live_cfg = ad7124_find_similar_live_cfg(st, cfg);
if (!live_cfg)
ad7124_push_config(st, cfg);
else
cfg->cfg_slot = live_cfg->cfg_slot;
}
/* point channel to the config slot and enable */
return ad7124_enable_channel(st, &st->channels[address]);
}
static int ad7124_set_channel(struct ad_sigma_delta *sd, unsigned int channel)
{
struct ad7124_state *st = container_of(sd, struct ad7124_state, sd);
int ret;
mutex_lock(&st->cfgs_lock);
ret = ad7124_prepare_read(st, channel);
mutex_unlock(&st->cfgs_lock);
return ret;
}
static const struct ad_sigma_delta_info ad7124_sigma_delta_info = {
.set_channel = ad7124_set_channel,
.set_mode = ad7124_set_mode,
.has_registers = true,
.addr_shift = 0,
.read_mask = BIT(6),
.data_reg = AD7124_DATA,
.irq_flags = IRQF_TRIGGER_FALLING
};
static int ad7124_read_raw(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan,
int *val, int *val2, long info)
@ -378,36 +537,44 @@ static int ad7124_read_raw(struct iio_dev *indio_dev,
return ret;
/* After the conversion is performed, disable the channel */
ret = ad_sd_write_reg(&st->sd,
AD7124_CHANNEL(chan->address), 2,
st->channel_config[chan->address].ain |
AD7124_CHANNEL_EN(0));
ret = ad_sd_write_reg(&st->sd, AD7124_CHANNEL(chan->address), 2,
st->channels[chan->address].ain | AD7124_CHANNEL_EN(0));
if (ret < 0)
return ret;
return IIO_VAL_INT;
case IIO_CHAN_INFO_SCALE:
idx = st->channel_config[chan->address].pga_bits;
*val = st->channel_config[chan->address].vref_mv;
if (st->channel_config[chan->address].bipolar)
mutex_lock(&st->cfgs_lock);
idx = st->channels[chan->address].cfg.pga_bits;
*val = st->channels[chan->address].cfg.vref_mv;
if (st->channels[chan->address].cfg.bipolar)
*val2 = chan->scan_type.realbits - 1 + idx;
else
*val2 = chan->scan_type.realbits + idx;
mutex_unlock(&st->cfgs_lock);
return IIO_VAL_FRACTIONAL_LOG2;
case IIO_CHAN_INFO_OFFSET:
if (st->channel_config[chan->address].bipolar)
mutex_lock(&st->cfgs_lock);
if (st->channels[chan->address].cfg.bipolar)
*val = -(1 << (chan->scan_type.realbits - 1));
else
*val = 0;
mutex_unlock(&st->cfgs_lock);
return IIO_VAL_INT;
case IIO_CHAN_INFO_SAMP_FREQ:
*val = st->channel_config[chan->address].odr;
mutex_lock(&st->cfgs_lock);
*val = st->channels[chan->address].cfg.odr;
mutex_unlock(&st->cfgs_lock);
return IIO_VAL_INT;
case IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY:
mutex_lock(&st->cfgs_lock);
*val = ad7124_get_3db_filter_freq(st, chan->scan_index);
mutex_unlock(&st->cfgs_lock);
return IIO_VAL_INT;
default:
return -EINVAL;
@ -420,35 +587,54 @@ static int ad7124_write_raw(struct iio_dev *indio_dev,
{
struct ad7124_state *st = iio_priv(indio_dev);
unsigned int res, gain, full_scale, vref;
int ret = 0;
mutex_lock(&st->cfgs_lock);
switch (info) {
case IIO_CHAN_INFO_SAMP_FREQ:
if (val2 != 0)
return -EINVAL;
if (val2 != 0) {
ret = -EINVAL;
break;
}
return ad7124_set_channel_odr(st, chan->address, val);
ad7124_set_channel_odr(st, chan->address, val);
break;
case IIO_CHAN_INFO_SCALE:
if (val != 0)
return -EINVAL;
if (val != 0) {
ret = -EINVAL;
break;
}
if (st->channel_config[chan->address].bipolar)
if (st->channels[chan->address].cfg.bipolar)
full_scale = 1 << (chan->scan_type.realbits - 1);
else
full_scale = 1 << chan->scan_type.realbits;
vref = st->channel_config[chan->address].vref_mv * 1000000LL;
vref = st->channels[chan->address].cfg.vref_mv * 1000000LL;
res = DIV_ROUND_CLOSEST(vref, full_scale);
gain = DIV_ROUND_CLOSEST(res, val2);
res = ad7124_find_closest_match(ad7124_gain, ARRAY_SIZE(ad7124_gain), gain);
return ad7124_set_channel_gain(st, chan->address, gain);
if (st->channels[chan->address].cfg.pga_bits != res)
st->channels[chan->address].cfg.live = false;
st->channels[chan->address].cfg.pga_bits = res;
break;
case IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY:
if (val2 != 0)
return -EINVAL;
if (val2 != 0) {
ret = -EINVAL;
break;
}
return ad7124_set_3db_filter_freq(st, chan->address, val);
ad7124_set_3db_filter_freq(st, chan->address, val);
break;
default:
return -EINVAL;
ret = -EINVAL;
}
mutex_unlock(&st->cfgs_lock);
return ret;
}
static int ad7124_reg_access(struct iio_dev *indio_dev,
@ -547,47 +733,14 @@ static int ad7124_check_chip_id(struct ad7124_state *st)
return 0;
}
static int ad7124_init_channel_vref(struct ad7124_state *st,
unsigned int channel_number)
{
unsigned int refsel = st->channel_config[channel_number].refsel;
switch (refsel) {
case AD7124_REFIN1:
case AD7124_REFIN2:
case AD7124_AVDD_REF:
if (IS_ERR(st->vref[refsel])) {
dev_err(&st->sd.spi->dev,
"Error, trying to use external voltage reference without a %s regulator.\n",
ad7124_ref_names[refsel]);
return PTR_ERR(st->vref[refsel]);
}
st->channel_config[channel_number].vref_mv =
regulator_get_voltage(st->vref[refsel]);
/* Conversion from uV to mV */
st->channel_config[channel_number].vref_mv /= 1000;
break;
case AD7124_INT_REF:
st->channel_config[channel_number].vref_mv = 2500;
st->adc_control &= ~AD7124_ADC_CTRL_REF_EN_MSK;
st->adc_control |= AD7124_ADC_CTRL_REF_EN(1);
return ad_sd_write_reg(&st->sd, AD7124_ADC_CONTROL,
2, st->adc_control);
default:
dev_err(&st->sd.spi->dev, "Invalid reference %d\n", refsel);
return -EINVAL;
}
return 0;
}
static int ad7124_of_parse_channel_config(struct iio_dev *indio_dev,
struct device_node *np)
{
struct ad7124_state *st = iio_priv(indio_dev);
struct ad7124_channel_config *cfg;
struct ad7124_channel *channels;
struct device_node *child;
struct iio_chan_spec *chan;
struct ad7124_channel_config *chan_config;
unsigned int ain[2], channel = 0, tmp;
int ret;
@ -602,16 +755,18 @@ static int ad7124_of_parse_channel_config(struct iio_dev *indio_dev,
if (!chan)
return -ENOMEM;
chan_config = devm_kcalloc(indio_dev->dev.parent, st->num_channels,
sizeof(*chan_config), GFP_KERNEL);
if (!chan_config)
channels = devm_kcalloc(indio_dev->dev.parent, st->num_channels, sizeof(*channels),
GFP_KERNEL);
if (!channels)
return -ENOMEM;
indio_dev->channels = chan;
indio_dev->num_channels = st->num_channels;
st->channel_config = chan_config;
st->channels = channels;
for_each_available_child_of_node(np, child) {
cfg = &st->channels[channel].cfg;
ret = of_property_read_u32(child, "reg", &channel);
if (ret)
goto err;
@ -621,21 +776,20 @@ static int ad7124_of_parse_channel_config(struct iio_dev *indio_dev,
if (ret)
goto err;
st->channel_config[channel].ain = AD7124_CHANNEL_AINP(ain[0]) |
st->channels[channel].nr = channel;
st->channels[channel].ain = AD7124_CHANNEL_AINP(ain[0]) |
AD7124_CHANNEL_AINM(ain[1]);
st->channel_config[channel].bipolar =
of_property_read_bool(child, "bipolar");
cfg->bipolar = of_property_read_bool(child, "bipolar");
ret = of_property_read_u32(child, "adi,reference-select", &tmp);
if (ret)
st->channel_config[channel].refsel = AD7124_INT_REF;
cfg->refsel = AD7124_INT_REF;
else
st->channel_config[channel].refsel = tmp;
cfg->refsel = tmp;
st->channel_config[channel].buf_positive =
of_property_read_bool(child, "adi,buffered-positive");
st->channel_config[channel].buf_negative =
of_property_read_bool(child, "adi,buffered-negative");
cfg->buf_positive = of_property_read_bool(child, "adi,buffered-positive");
cfg->buf_negative = of_property_read_bool(child, "adi,buffered-negative");
chan[channel] = ad7124_channel_template;
chan[channel].address = channel;
@ -653,8 +807,8 @@ err:
static int ad7124_setup(struct ad7124_state *st)
{
unsigned int val, fclk, power_mode;
int i, ret, tmp;
unsigned int fclk, power_mode;
int i, ret;
fclk = clk_get_rate(st->mclk);
if (!fclk)
@ -677,31 +831,20 @@ static int ad7124_setup(struct ad7124_state *st)
if (ret < 0)
return ret;
mutex_init(&st->cfgs_lock);
INIT_KFIFO(st->live_cfgs_fifo);
for (i = 0; i < st->num_channels; i++) {
val = st->channel_config[i].ain | AD7124_CHANNEL_SETUP(i);
ret = ad_sd_write_reg(&st->sd, AD7124_CHANNEL(i), 2, val);
ret = ad7124_init_config_vref(st, &st->channels[i].cfg);
if (ret < 0)
return ret;
ret = ad7124_init_channel_vref(st, i);
if (ret < 0)
return ret;
tmp = (st->channel_config[i].buf_positive << 1) +
st->channel_config[i].buf_negative;
val = AD7124_CONFIG_BIPOLAR(st->channel_config[i].bipolar) |
AD7124_CONFIG_REF_SEL(st->channel_config[i].refsel) |
AD7124_CONFIG_IN_BUFF(tmp);
ret = ad_sd_write_reg(&st->sd, AD7124_CONFIG(i), 2, val);
if (ret < 0)
return ret;
/*
* 9.38 SPS is the minimum output data rate supported
* regardless of the selected power mode. Round it up to 10 and
* set all the enabled channels to this default value.
* set all channels to this default value.
*/
ret = ad7124_set_channel_odr(st, i, 10);
ad7124_set_channel_odr(st, i, 10);
}
return ret;

2
drivers/iio/adc/ad7292.c
View File

@ -260,7 +260,7 @@ static int ad7292_probe(struct spi_device *spi)
struct ad7292_state *st;
struct iio_dev *indio_dev;
struct device_node *child;
bool diff_channels = 0;
bool diff_channels = false;
int ret;
indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st));

1
drivers/iio/adc/ad7606.c
View File

@ -668,7 +668,6 @@ int ad7606_probe(struct device *dev, int irq, void __iomem *base_address,
return -ENOMEM;
st->trig->ops = &ad7606_trigger_ops;
st->trig->dev.parent = dev;
iio_trigger_set_drvdata(st->trig, indio_dev);
ret = devm_iio_trigger_register(dev, st->trig);
if (ret)

1
drivers/iio/adc/ad7766.c
View File

@ -253,7 +253,6 @@ static int ad7766_probe(struct spi_device *spi)
return -ENOMEM;
ad7766->trig->ops = &ad7766_trigger_ops;
ad7766->trig->dev.parent = &spi->dev;
iio_trigger_set_drvdata(ad7766->trig, ad7766);
ret = devm_request_irq(&spi->dev, spi->irq, ad7766_irq,

1
drivers/iio/adc/ad7768-1.c
View File

@ -631,7 +631,6 @@ static int ad7768_probe(struct spi_device *spi)
return -ENOMEM;
st->trig->ops = &ad7768_trigger_ops;
st->trig->dev.parent = &spi->dev;
iio_trigger_set_drvdata(st->trig, indio_dev);
ret = devm_iio_trigger_register(&spi->dev, st->trig);
if (ret)

6
drivers/iio/adc/ad_sigma_delta.c
View File

@ -475,8 +475,9 @@ static int ad_sd_probe_trigger(struct iio_dev *indio_dev)
struct ad_sigma_delta *sigma_delta = iio_device_get_drvdata(indio_dev);
int ret;
sigma_delta->trig = iio_trigger_alloc("%s-dev%d", indio_dev->name,
indio_dev->id);
sigma_delta->trig = iio_trigger_alloc(&sigma_delta->spi->dev,
"%s-dev%d", indio_dev->name,
indio_dev->id);
if (sigma_delta->trig == NULL) {
ret = -ENOMEM;
goto error_ret;
@ -496,7 +497,6 @@ static int ad_sd_probe_trigger(struct iio_dev *indio_dev)
sigma_delta->irq_dis = true;
disable_irq_nosync(sigma_delta->spi->irq);
}
sigma_delta->trig->dev.parent = &sigma_delta->spi->dev;
iio_trigger_set_drvdata(sigma_delta->trig, sigma_delta);
ret = iio_trigger_register(sigma_delta->trig);

14
drivers/iio/adc/adi-axi-adc.c
View File

@ -23,7 +23,7 @@
#include <linux/fpga/adi-axi-common.h>
#include <linux/iio/adc/adi-axi-adc.h>
/**
/*
* Register definitions:
* https://wiki.analog.com/resources/fpga/docs/axi_adc_ip#register_map
*/
@ -104,7 +104,6 @@ static unsigned int adi_axi_adc_read(struct adi_axi_adc_state *st,
static int adi_axi_adc_config_dma_buffer(struct device *dev,
struct iio_dev *indio_dev)
{
struct iio_buffer *buffer;
const char *dma_name;
if (!device_property_present(dev, "dmas"))
@ -113,15 +112,8 @@ static int adi_axi_adc_config_dma_buffer(struct device *dev,
if (device_property_read_string(dev, "dma-names", &dma_name))
dma_name = "rx";
buffer = devm_iio_dmaengine_buffer_alloc(indio_dev->dev.parent,
dma_name);
if (IS_ERR(buffer))
return PTR_ERR(buffer);
indio_dev->modes |= INDIO_BUFFER_HARDWARE;
iio_device_attach_buffer(indio_dev, buffer);
return 0;
return devm_iio_dmaengine_buffer_setup(indio_dev->dev.parent,
indio_dev, dma_name);
}
static int adi_axi_adc_read_raw(struct iio_dev *indio_dev,

3
drivers/iio/adc/at91_adc.c
View File

@ -625,12 +625,11 @@ static struct iio_trigger *at91_adc_allocate_trigger(struct iio_dev *idev,
struct iio_trigger *trig;
int ret;
trig = iio_trigger_alloc("%s-dev%d-%s", idev->name,
trig = iio_trigger_alloc(idev->dev.parent, "%s-dev%d-%s", idev->name,
idev->id, trigger->name);
if (trig == NULL)
return NULL;
trig->dev.parent = idev->dev.parent;
iio_trigger_set_drvdata(trig, idev);
trig->ops = &at91_adc_trigger_ops;

2
drivers/iio/adc/cpcap-adc.c
View File

@ -100,7 +100,7 @@ struct cpcap_adc_ato {
};
/**
* struct cpcap-adc - cpcap adc device driver data
* struct cpcap_adc - cpcap adc device driver data
* @reg: cpcap regmap
* @dev: struct device
* @vendor: cpcap vendor

14
drivers/iio/adc/ina2xx-adc.c
View File

@ -953,7 +953,6 @@ static int ina2xx_probe(struct i2c_client *client,
{
struct ina2xx_chip_info *chip;
struct iio_dev *indio_dev;
struct iio_buffer *buffer;
unsigned int val;
enum ina2xx_ids type;
int ret;
@ -1017,7 +1016,7 @@ static int ina2xx_probe(struct i2c_client *client,
return ret;
}
indio_dev->modes = INDIO_DIRECT_MODE | INDIO_BUFFER_SOFTWARE;
indio_dev->modes = INDIO_DIRECT_MODE;
if (id->driver_data == ina226) {
indio_dev->channels = ina226_channels;
indio_dev->num_channels = ARRAY_SIZE(ina226_channels);
@ -1028,13 +1027,12 @@ static int ina2xx_probe(struct i2c_client *client,
indio_dev->info = &ina219_info;
}
indio_dev->name = id->name;
indio_dev->setup_ops = &ina2xx_setup_ops;
buffer = devm_iio_kfifo_allocate(&indio_dev->dev);
if (!buffer)
return -ENOMEM;
iio_device_attach_buffer(indio_dev, buffer);
ret = devm_iio_kfifo_buffer_setup(&client->dev, indio_dev,
INDIO_BUFFER_SOFTWARE,
&ina2xx_setup_ops);
if (ret)
return ret;
return iio_device_register(indio_dev);
}

1
drivers/iio/adc/max1027.c
View File

@ -473,7 +473,6 @@ static int max1027_probe(struct spi_device *spi)
}
st->trig->ops = &max1027_trigger_ops;
st->trig->dev.parent = &spi->dev;
iio_trigger_set_drvdata(st->trig, indio_dev);
ret = devm_iio_trigger_register(&indio_dev->dev,
st->trig);

3
drivers/iio/adc/mt6360-adc.c
View File

@ -9,13 +9,14 @@
#include <linux/mutex.h>
#include <linux/platform_device.h>
#include <linux/regmap.h>
#include <linux/unaligned/be_byteshift.h>
#include <linux/iio/buffer.h>
#include <linux/iio/iio.h>
#include <linux/iio/trigger_consumer.h>
#include <linux/iio/triggered_buffer.h>
#include <asm/unaligned.h>
#define MT6360_REG_PMUCHGCTRL3 0x313
#define MT6360_REG_PMUADCCFG 0x356
#define MT6360_REG_PMUADCIDLET 0x358

15
drivers/iio/adc/npcm_adc.c
View File

@ -25,6 +25,15 @@ struct npcm_adc {
wait_queue_head_t wq;
struct regulator *vref;
struct reset_control *reset;
/*
* Lock to protect the device state during a potential concurrent
* read access from userspace. Reading a raw value requires a sequence
* of register writes, then a wait for a event and finally a register
* read, during which userspace could issue another read request.
* This lock protects a read access from ocurring before another one
* has finished.
*/
struct mutex lock;
};
/* ADC registers */
@ -135,9 +144,9 @@ static int npcm_adc_read_raw(struct iio_dev *indio_dev,
switch (mask) {
case IIO_CHAN_INFO_RAW:
mutex_lock(&indio_dev->mlock);
mutex_lock(&info->lock);
ret = npcm_adc_read(info, val, chan->channel);
mutex_unlock(&indio_dev->mlock);
mutex_unlock(&info->lock);
if (ret) {
dev_err(info->dev, "NPCM ADC read failed\n");
return ret;
@ -187,6 +196,8 @@ static int npcm_adc_probe(struct platform_device *pdev)
return -ENOMEM;
info = iio_priv(indio_dev);
mutex_init(&info->lock);
info->dev = &pdev->dev;
info->regs = devm_platform_ioremap_resource(pdev, 0);

18
drivers/iio/adc/palmas_gpadc.c
View File

@ -90,6 +90,12 @@ static struct palmas_gpadc_info palmas_gpadc_info[] = {
* 3: 800 uA
* @extended_delay: enable the gpadc extended delay mode
* @auto_conversion_period: define the auto_conversion_period
* @lock: Lock to protect the device state during a potential concurrent
* read access from userspace. Reading a raw value requires a sequence
* of register writes, then a wait for a completion callback,
* and finally a register read, during which userspace could issue
* another read request. This lock protects a read access from
* ocurring before another one has finished.
*
* This is the palmas_gpadc structure to store run-time information
* and pointers for this driver instance.
@ -110,6 +116,7 @@ struct palmas_gpadc {
bool wakeup1_enable;
bool wakeup2_enable;
int auto_conversion_period;
struct mutex lock;
};
/*
@ -388,7 +395,7 @@ static int palmas_gpadc_read_raw(struct iio_dev *indio_dev,
if (adc_chan > PALMAS_ADC_CH_MAX)
return -EINVAL;
mutex_lock(&indio_dev->mlock);
mutex_lock(&adc->lock);
switch (mask) {
case IIO_CHAN_INFO_RAW:
@ -414,12 +421,12 @@ static int palmas_gpadc_read_raw(struct iio_dev *indio_dev,
goto out;
}
mutex_unlock(&indio_dev->mlock);
mutex_unlock(&adc->lock);
return ret;
out:
palmas_gpadc_read_done(adc, adc_chan);
mutex_unlock(&indio_dev->mlock);
mutex_unlock(&adc->lock);
return ret;
}
@ -516,8 +523,11 @@ static int palmas_gpadc_probe(struct platform_device *pdev)
adc->dev = &pdev->dev;
adc->palmas = dev_get_drvdata(pdev->dev.parent);
adc->adc_info = palmas_gpadc_info;
mutex_init(&adc->lock);
init_completion(&adc->conv_completion);
dev_set_drvdata(&pdev->dev, indio_dev);
platform_set_drvdata(pdev, indio_dev);
adc->auto_conversion_period = gpadc_pdata->auto_conversion_period_ms;
adc->irq = palmas_irq_get_virq(adc->palmas, PALMAS_GPADC_EOC_SW_IRQ);

20
drivers/iio/adc/spear_adc.c
View File

@ -75,6 +75,15 @@ struct spear_adc_state {
struct adc_regs_spear6xx __iomem *adc_base_spear6xx;
struct clk *clk;
struct completion completion;
/*
* Lock to protect the device state during a potential concurrent
* read access from userspace. Reading a raw value requires a sequence
* of register writes, then a wait for a completion callback,
* and finally a register read, during which userspace could issue
* another read request. This lock protects a read access from
* ocurring before another one has finished.
*/
struct mutex lock;
u32 current_clk;
u32 sampling_freq;
u32 avg_samples;
@ -146,7 +155,7 @@ static int spear_adc_read_raw(struct iio_dev *indio_dev,
switch (mask) {
case IIO_CHAN_INFO_RAW:
mutex_lock(&indio_dev->mlock);
mutex_lock(&st->lock);
status = SPEAR_ADC_STATUS_CHANNEL_NUM(chan->channel) |
SPEAR_ADC_STATUS_AVG_SAMPLE(st->avg_samples) |
@ -159,7 +168,7 @@ static int spear_adc_read_raw(struct iio_dev *indio_dev,
wait_for_completion(&st->completion); /* set by ISR */
*val = st->value;
mutex_unlock(&indio_dev->mlock);
mutex_unlock(&st->lock);
return IIO_VAL_INT;
@ -187,7 +196,7 @@ static int spear_adc_write_raw(struct iio_dev *indio_dev,
if (mask != IIO_CHAN_INFO_SAMP_FREQ)
return -EINVAL;
mutex_lock(&indio_dev->mlock);
mutex_lock(&st->lock);
if ((val < SPEAR_ADC_CLK_MIN) ||
(val > SPEAR_ADC_CLK_MAX) ||
@ -199,7 +208,7 @@ static int spear_adc_write_raw(struct iio_dev *indio_dev,
spear_adc_set_clk(st, val);
out:
mutex_unlock(&indio_dev->mlock);
mutex_unlock(&st->lock);
return ret;
}
@ -271,6 +280,9 @@ static int spear_adc_probe(struct platform_device *pdev)
}
st = iio_priv(indio_dev);
mutex_init(&st->lock);
st->np = np;
/*

39
drivers/iio/adc/stm32-adc.c
View File

@ -177,7 +177,7 @@ struct stm32_adc_cfg {
* @offset: ADC instance register offset in ADC block
* @cfg: compatible configuration data
* @completion: end of single conversion completion
* @buffer: data buffer
* @buffer: data buffer + 8 bytes for timestamp if enabled
* @clk: clock for this adc instance
* @irq: interrupt for this adc instance
* @lock: spinlock
@ -200,7 +200,7 @@ struct stm32_adc {
u32 offset;
const struct stm32_adc_cfg *cfg;
struct completion completion;
u16 buffer[STM32_ADC_MAX_SQ];
u16 buffer[STM32_ADC_MAX_SQ + 4] __aligned(8);
struct clk *clk;
int irq;
spinlock_t lock; /* interrupt lock */
@ -1714,7 +1714,7 @@ static void stm32_adc_chan_init_one(struct iio_dev *indio_dev,
}
}
static int stm32_adc_chan_of_init(struct iio_dev *indio_dev)
static int stm32_adc_chan_of_init(struct iio_dev *indio_dev, bool timestamping)
{
struct device_node *node = indio_dev->dev.of_node;
struct stm32_adc *adc = iio_priv(indio_dev);
@ -1762,6 +1762,9 @@ static int stm32_adc_chan_of_init(struct iio_dev *indio_dev)
return -EINVAL;
}
if (timestamping)
num_channels++;
channels = devm_kcalloc(&indio_dev->dev, num_channels,
sizeof(struct iio_chan_spec), GFP_KERNEL);
if (!channels)
@ -1812,6 +1815,19 @@ static int stm32_adc_chan_of_init(struct iio_dev *indio_dev)
stm32_adc_smpr_init(adc, channels[i].channel, smp);
}
if (timestamping) {
struct iio_chan_spec *timestamp = &channels[scan_index];
timestamp->type = IIO_TIMESTAMP;
timestamp->channel = -1;
timestamp->scan_index = scan_index;
timestamp->scan_type.sign = 's';
timestamp->scan_type.realbits = 64;
timestamp->scan_type.storagebits = 64;
scan_index++;
}
indio_dev->num_channels = scan_index;
indio_dev->channels = channels;
@ -1871,6 +1887,7 @@ static int stm32_adc_probe(struct platform_device *pdev)
struct device *dev = &pdev->dev;
irqreturn_t (*handler)(int irq, void *p) = NULL;
struct stm32_adc *adc;
bool timestamping = false;
int ret;
if (!pdev->dev.of_node)
@ -1927,16 +1944,22 @@ static int stm32_adc_probe(struct platform_device *pdev)
if (ret < 0)
return ret;
ret = stm32_adc_chan_of_init(indio_dev);
if (ret < 0)
return ret;
ret = stm32_adc_dma_request(dev, indio_dev);
if (ret < 0)
return ret;
if (!adc->dma_chan)
if (!adc->dma_chan) {
/* For PIO mode only, iio_pollfunc_store_time stores a timestamp
* in the primary trigger IRQ handler and stm32_adc_trigger_handler
* runs in the IRQ thread to push out buffer along with timestamp.
*/
handler = &stm32_adc_trigger_handler;
timestamping = true;
}
ret = stm32_adc_chan_of_init(indio_dev, timestamping);
if (ret < 0)
goto err_dma_disable;
ret = iio_triggered_buffer_setup(indio_dev,
&iio_pollfunc_store_time, handler,

6
drivers/iio/adc/ti-adc084s021.c
View File

@ -1,5 +1,5 @@
// SPDX-License-Identifier: GPL-2.0-only
/**
/*
* Copyright (C) 2017 Axis Communications AB
*
* Driver for Texas Instruments' ADC084S021 ADC chip.
@ -65,7 +65,7 @@ static const struct iio_chan_spec adc084s021_channels[] = {
};
/**
* Read an ADC channel and return its value.
* adc084s021_adc_conversion() - Read an ADC channel and return its value.
*
* @adc: The ADC SPI data.
* @data: Buffer for converted data.
@ -136,7 +136,7 @@ static int adc084s021_read_raw(struct iio_dev *indio_dev,
}
/**
* Read enabled ADC channels and push data to the buffer.
* adc084s021_buffer_trigger_handler() - Read ADC channels and push to buffer.
*
* @irq: The interrupt number (not used).
* @pollfunc: Pointer to the poll func.

948
drivers/iio/adc/ti-ads131e08.c Normal file
View File

@ -0,0 +1,948 @@
// SPDX-License-Identifier: GPL-2.0
/*
* Texas Instruments ADS131E0x 4-, 6- and 8-Channel ADCs
*
* Copyright (c) 2020 AVL DiTEST GmbH
* Tomislav Denis <tomislav.denis@avl.com>
*
* Datasheet: https://www.ti.com/lit/ds/symlink/ads131e08.pdf
*/
#include <linux/bitfield.h>
#include <linux/clk.h>
#include <linux/delay.h>
#include <linux/module.h>
#include <linux/iio/buffer.h>
#include <linux/iio/iio.h>
#include <linux/iio/sysfs.h>
#include <linux/iio/trigger.h>
#include <linux/iio/trigger_consumer.h>
#include <linux/iio/triggered_buffer.h>
#include <linux/regulator/consumer.h>
#include <linux/spi/spi.h>
#include <asm/unaligned.h>
/* Commands */
#define ADS131E08_CMD_RESET 0x06
#define ADS131E08_CMD_START 0x08
#define ADS131E08_CMD_STOP 0x0A
#define ADS131E08_CMD_OFFSETCAL 0x1A
#define ADS131E08_CMD_SDATAC 0x11
#define ADS131E08_CMD_RDATA 0x12
#define ADS131E08_CMD_RREG(r) (BIT(5) | (r & GENMASK(4, 0)))
#define ADS131E08_CMD_WREG(r) (BIT(6) | (r & GENMASK(4, 0)))
/* Registers */
#define ADS131E08_ADR_CFG1R 0x01
#define ADS131E08_ADR_CFG3R 0x03
#define ADS131E08_ADR_CH0R 0x05
/* Configuration register 1 */
#define ADS131E08_CFG1R_DR_MASK GENMASK(2, 0)
/* Configuration register 3 */
#define ADS131E08_CFG3R_PDB_REFBUF_MASK BIT(7)
#define ADS131E08_CFG3R_VREF_4V_MASK BIT(5)
/* Channel settings register */
#define ADS131E08_CHR_GAIN_MASK GENMASK(6, 4)
#define ADS131E08_CHR_MUX_MASK GENMASK(2, 0)
#define ADS131E08_CHR_PWD_MASK BIT(7)
/* ADC misc */
#define ADS131E08_DEFAULT_DATA_RATE 1
#define ADS131E08_DEFAULT_PGA_GAIN 1
#define ADS131E08_DEFAULT_MUX 0
#define ADS131E08_VREF_2V4_mV 2400
#define ADS131E08_VREF_4V_mV 4000
#define ADS131E08_WAIT_RESET_CYCLES 18
#define ADS131E08_WAIT_SDECODE_CYCLES 4
#define ADS131E08_WAIT_OFFSETCAL_MS 153
#define ADS131E08_MAX_SETTLING_TIME_MS 6
#define ADS131E08_NUM_STATUS_BYTES 3
#define ADS131E08_NUM_DATA_BYTES_MAX 24
#define ADS131E08_NUM_DATA_BYTES(dr) (((dr) >= 32) ? 2 : 3)
#define ADS131E08_NUM_DATA_BITS(dr) (ADS131E08_NUM_DATA_BYTES(dr) * 8)
#define ADS131E08_NUM_STORAGE_BYTES 4
enum ads131e08_ids {
ads131e04,
ads131e06,
ads131e08,
};
struct ads131e08_info {
unsigned int max_channels;
const char *name;
};
struct ads131e08_channel_config {
unsigned int pga_gain;
unsigned int mux;
};
struct ads131e08_state {
const struct ads131e08_info *info;
struct spi_device *spi;
struct iio_trigger *trig;
struct clk *adc_clk;
struct regulator *vref_reg;
struct ads131e08_channel_config *channel_config;
unsigned int data_rate;
unsigned int vref_mv;
unsigned int sdecode_delay_us;
unsigned int reset_delay_us;
unsigned int readback_len;
struct completion completion;
struct {
u8 data[ADS131E08_NUM_DATA_BYTES_MAX];
s64 ts __aligned(8);
} tmp_buf;
u8 tx_buf[3] ____cacheline_aligned;
/*
* Add extra one padding byte to be able to access the last channel
* value using u32 pointer
*/
u8 rx_buf[ADS131E08_NUM_STATUS_BYTES +
ADS131E08_NUM_DATA_BYTES_MAX + 1];
};
static const struct ads131e08_info ads131e08_info_tbl[] = {
[ads131e04] = {
.max_channels = 4,
.name = "ads131e04",
},
[ads131e06] = {
.max_channels = 6,
.name = "ads131e06",
},
[ads131e08] = {
.max_channels = 8,
.name = "ads131e08",
},
};
struct ads131e08_data_rate_desc {
unsigned int rate; /* data rate in kSPS */
u8 reg; /* reg value */
};
static const struct ads131e08_data_rate_desc ads131e08_data_rate_tbl[] = {
{ .rate = 64, .reg = 0x00 },
{ .rate = 32, .reg = 0x01 },
{ .rate = 16, .reg = 0x02 },
{ .rate = 8, .reg = 0x03 },
{ .rate = 4, .reg = 0x04 },
{ .rate = 2, .reg = 0x05 },
{ .rate = 1, .reg = 0x06 },
};
struct ads131e08_pga_gain_desc {
unsigned int gain; /* PGA gain value */
u8 reg; /* field value */
};
static const struct ads131e08_pga_gain_desc ads131e08_pga_gain_tbl[] = {
{ .gain = 1, .reg = 0x01 },
{ .gain = 2, .reg = 0x02 },
{ .gain = 4, .reg = 0x04 },
{ .gain = 8, .reg = 0x05 },
{ .gain = 12, .reg = 0x06 },
};
static const u8 ads131e08_valid_channel_mux_values[] = { 0, 1, 3, 4 };
static int ads131e08_exec_cmd(struct ads131e08_state *st, u8 cmd)
{
int ret;
ret = spi_write_then_read(st->spi, &cmd, 1, NULL, 0);
if (ret)
dev_err(&st->spi->dev, "Exec cmd(%02x) failed\n", cmd);
return ret;
}
static int ads131e08_read_reg(struct ads131e08_state *st, u8 reg)
{
int ret;
struct spi_transfer transfer[] = {
{
.tx_buf = &st->tx_buf,
.len = 2,
.delay_usecs = st->sdecode_delay_us,
}, {
.rx_buf = &st->rx_buf,
.len = 1,
},
};
st->tx_buf[0] = ADS131E08_CMD_RREG(reg);
st->tx_buf[1] = 0;
ret = spi_sync_transfer(st->spi, transfer, ARRAY_SIZE(transfer));
if (ret) {
dev_err(&st->spi->dev, "Read register failed\n");
return ret;
}
return st->rx_buf[0];
}
static int ads131e08_write_reg(struct ads131e08_state *st, u8 reg, u8 value)
{
int ret;
struct spi_transfer transfer[] = {
{
.tx_buf = &st->tx_buf,
.len = 3,
.delay_usecs = st->sdecode_delay_us,
}
};
st->tx_buf[0] = ADS131E08_CMD_WREG(reg);
st->tx_buf[1] = 0;
st->tx_buf[2] = value;
ret = spi_sync_transfer(st->spi, transfer, ARRAY_SIZE(transfer));
if (ret)
dev_err(&st->spi->dev, "Write register failed\n");
return ret;
}
static int ads131e08_read_data(struct ads131e08_state *st, int rx_len)
{
int ret;
struct spi_transfer transfer[] = {
{
.tx_buf = &st->tx_buf,
.len = 1,
}, {
.rx_buf = &st->rx_buf,
.len = rx_len,
},
};
st->tx_buf[0] = ADS131E08_CMD_RDATA;
ret = spi_sync_transfer(st->spi, transfer, ARRAY_SIZE(transfer));
if (ret)
dev_err(&st->spi->dev, "Read data failed\n");
return ret;
}
static int ads131e08_set_data_rate(struct ads131e08_state *st, int data_rate)
{
int i, reg, ret;
for (i = 0; i < ARRAY_SIZE(ads131e08_data_rate_tbl); i++) {
if (ads131e08_data_rate_tbl[i].rate == data_rate)
break;
}
if (i == ARRAY_SIZE(ads131e08_data_rate_tbl)) {
dev_err(&st->spi->dev, "invalid data rate value\n");
return -EINVAL;
}
reg = ads131e08_read_reg(st, ADS131E08_ADR_CFG1R);
if (reg < 0)
return reg;
reg &= ~ADS131E08_CFG1R_DR_MASK;
reg |= FIELD_PREP(ADS131E08_CFG1R_DR_MASK,
ads131e08_data_rate_tbl[i].reg);
ret = ads131e08_write_reg(st, ADS131E08_ADR_CFG1R, reg);
if (ret)
return ret;
st->data_rate = data_rate;
st->readback_len = ADS131E08_NUM_STATUS_BYTES +
ADS131E08_NUM_DATA_BYTES(st->data_rate) *
st->info->max_channels;
return 0;
}
static int ads131e08_pga_gain_to_field_value(struct ads131e08_state *st,
unsigned int pga_gain)
{
int i;
for (i = 0; i < ARRAY_SIZE(ads131e08_pga_gain_tbl); i++) {
if (ads131e08_pga_gain_tbl[i].gain == pga_gain)
break;
}
if (i == ARRAY_SIZE(ads131e08_pga_gain_tbl)) {
dev_err(&st->spi->dev, "invalid PGA gain value\n");
return -EINVAL;
}
return ads131e08_pga_gain_tbl[i].reg;
}
static int ads131e08_set_pga_gain(struct ads131e08_state *st,
unsigned int channel, unsigned int pga_gain)
{
int field_value, reg;
field_value = ads131e08_pga_gain_to_field_value(st, pga_gain);
if (field_value < 0)
return field_value;
reg = ads131e08_read_reg(st, ADS131E08_ADR_CH0R + channel);
if (reg < 0)
return reg;
reg &= ~ADS131E08_CHR_GAIN_MASK;
reg |= FIELD_PREP(ADS131E08_CHR_GAIN_MASK, field_value);
return ads131e08_write_reg(st, ADS131E08_ADR_CH0R + channel, reg);
}
static int ads131e08_validate_channel_mux(struct ads131e08_state *st,
unsigned int mux)
{
int i;
for (i = 0; i < ARRAY_SIZE(ads131e08_valid_channel_mux_values); i++) {
if (ads131e08_valid_channel_mux_values[i] == mux)
break;
}
if (i == ARRAY_SIZE(ads131e08_valid_channel_mux_values)) {
dev_err(&st->spi->dev, "invalid channel mux value\n");
return -EINVAL;
}
return 0;
}
static int ads131e08_set_channel_mux(struct ads131e08_state *st,
unsigned int channel, unsigned int mux)
{
int reg;
reg = ads131e08_read_reg(st, ADS131E08_ADR_CH0R + channel);
if (reg < 0)
return reg;
reg &= ~ADS131E08_CHR_MUX_MASK;
reg |= FIELD_PREP(ADS131E08_CHR_MUX_MASK, mux);
return ads131e08_write_reg(st, ADS131E08_ADR_CH0R + channel, reg);
}
static int ads131e08_power_down_channel(struct ads131e08_state *st,
unsigned int channel, bool value)
{
int reg;
reg = ads131e08_read_reg(st, ADS131E08_ADR_CH0R + channel);
if (reg < 0)
return reg;
reg &= ~ADS131E08_CHR_PWD_MASK;
reg |= FIELD_PREP(ADS131E08_CHR_PWD_MASK, value);
return ads131e08_write_reg(st, ADS131E08_ADR_CH0R + channel, reg);
}
static int ads131e08_config_reference_voltage(struct ads131e08_state *st)
{
int reg;
reg = ads131e08_read_reg(st, ADS131E08_ADR_CFG3R);
if (reg < 0)
return reg;
reg &= ~ADS131E08_CFG3R_PDB_REFBUF_MASK;
if (!st->vref_reg) {
reg |= FIELD_PREP(ADS131E08_CFG3R_PDB_REFBUF_MASK, 1);
reg &= ~ADS131E08_CFG3R_VREF_4V_MASK;
reg |= FIELD_PREP(ADS131E08_CFG3R_VREF_4V_MASK,
st->vref_mv == ADS131E08_VREF_4V_mV);
}
return ads131e08_write_reg(st, ADS131E08_ADR_CFG3R, reg);
}
static int ads131e08_initial_config(struct iio_dev *indio_dev)
{
const struct iio_chan_spec *channel = indio_dev->channels;
struct ads131e08_state *st = iio_priv(indio_dev);
unsigned long active_channels = 0;
int ret, i;
ret = ads131e08_exec_cmd(st, ADS131E08_CMD_RESET);
if (ret)
return ret;
udelay(st->reset_delay_us);
/* Disable read data in continuous mode (enabled by default) */
ret = ads131e08_exec_cmd(st, ADS131E08_CMD_SDATAC);
if (ret)
return ret;
ret = ads131e08_set_data_rate(st, ADS131E08_DEFAULT_DATA_RATE);
if (ret)
return ret;
ret = ads131e08_config_reference_voltage(st);
if (ret)
return ret;
for (i = 0; i < indio_dev->num_channels; i++) {
ret = ads131e08_set_pga_gain(st, channel->channel,
st->channel_config[i].pga_gain);
if (ret)
return ret;
ret = ads131e08_set_channel_mux(st, channel->channel,
st->channel_config[i].mux);
if (ret)
return ret;
active_channels |= BIT(channel->channel);
channel++;
}
/* Power down unused channels */
for_each_clear_bit(i, &active_channels, st->info->max_channels) {
ret = ads131e08_power_down_channel(st, i, true);
if (ret)
return ret;
}
/* Request channel offset calibration */
ret = ads131e08_exec_cmd(st, ADS131E08_CMD_OFFSETCAL);
if (ret)
return ret;
/*
* Channel offset calibration is triggered with the first START
* command. Since calibration takes more time than settling operation,
* this causes timeout error when command START is sent first
* time (e.g. first call of the ads131e08_read_direct method).
* To avoid this problem offset calibration is triggered here.
*/
ret = ads131e08_exec_cmd(st, ADS131E08_CMD_START);
if (ret)
return ret;
msleep(ADS131E08_WAIT_OFFSETCAL_MS);
return ads131e08_exec_cmd(st, ADS131E08_CMD_STOP);
}
static int ads131e08_pool_data(struct ads131e08_state *st)
{
unsigned long timeout;
int ret;
reinit_completion(&st->completion);
ret = ads131e08_exec_cmd(st, ADS131E08_CMD_START);
if (ret)
return ret;
timeout = msecs_to_jiffies(ADS131E08_MAX_SETTLING_TIME_MS);
ret = wait_for_completion_timeout(&st->completion, timeout);
if (!ret)
return -ETIMEDOUT;
ret = ads131e08_read_data(st, st->readback_len);
if (ret)
return ret;
return ads131e08_exec_cmd(st, ADS131E08_CMD_STOP);
}
static int ads131e08_read_direct(struct iio_dev *indio_dev,
struct iio_chan_spec const *channel, int *value)
{
struct ads131e08_state *st = iio_priv(indio_dev);
u8 num_bits, *src;
int ret;
ret = ads131e08_pool_data(st);
if (ret)
return ret;
src = st->rx_buf + ADS131E08_NUM_STATUS_BYTES +
channel->channel * ADS131E08_NUM_DATA_BYTES(st->data_rate);
num_bits = ADS131E08_NUM_DATA_BITS(st->data_rate);
*value = sign_extend32(get_unaligned_be32(src) >> (32 - num_bits), num_bits - 1);
return 0;
}
static int ads131e08_read_raw(struct iio_dev *indio_dev,
struct iio_chan_spec const *channel, int *value,
int *value2, long mask)
{
struct ads131e08_state *st = iio_priv(indio_dev);
int ret;
switch (mask) {
case IIO_CHAN_INFO_RAW:
ret = iio_device_claim_direct_mode(indio_dev);
if (ret)
return ret;
ret = ads131e08_read_direct(indio_dev, channel, value);
iio_device_release_direct_mode(indio_dev);
if (ret)
return ret;
return IIO_VAL_INT;
case IIO_CHAN_INFO_SCALE:
if (st->vref_reg) {
ret = regulator_get_voltage(st->vref_reg);
if (ret < 0)
return ret;
*value = ret / 1000;
} else {
*value = st->vref_mv;
}
*value /= st->channel_config[channel->address].pga_gain;
*value2 = ADS131E08_NUM_DATA_BITS(st->data_rate) - 1;
return IIO_VAL_FRACTIONAL_LOG2;
case IIO_CHAN_INFO_SAMP_FREQ:
*value = st->data_rate;
return IIO_VAL_INT;
default:
return -EINVAL;
}
}
static int ads131e08_write_raw(struct iio_dev *indio_dev,
struct iio_chan_spec const *channel, int value,
int value2, long mask)
{
struct ads131e08_state *st = iio_priv(indio_dev);
int ret;
switch (mask) {
case IIO_CHAN_INFO_SAMP_FREQ:
ret = iio_device_claim_direct_mode(indio_dev);
if (ret)
return ret;
ret = ads131e08_set_data_rate(st, value);
iio_device_release_direct_mode(indio_dev);
return ret;
default:
return -EINVAL;
}
}
static IIO_CONST_ATTR_SAMP_FREQ_AVAIL("1 2 4 8 16 32 64");
static struct attribute *ads131e08_attributes[] = {
&iio_const_attr_sampling_frequency_available.dev_attr.attr,
NULL
};
static const struct attribute_group ads131e08_attribute_group = {
.attrs = ads131e08_attributes,
};
static int ads131e08_debugfs_reg_access(struct iio_dev *indio_dev,
unsigned int reg, unsigned int writeval, unsigned int *readval)
{
struct ads131e08_state *st = iio_priv(indio_dev);
if (readval) {
int ret = ads131e08_read_reg(st, reg);
*readval = ret;
return ret;
}
return ads131e08_write_reg(st, reg, writeval);
}
static const struct iio_info ads131e08_iio_info = {
.read_raw = ads131e08_read_raw,
.write_raw = ads131e08_write_raw,
.attrs = &ads131e08_attribute_group,
.debugfs_reg_access = &ads131e08_debugfs_reg_access,
};
static int ads131e08_set_trigger_state(struct iio_trigger *trig, bool state)
{
struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig);
struct ads131e08_state *st = iio_priv(indio_dev);
u8 cmd = state ? ADS131E08_CMD_START : ADS131E08_CMD_STOP;
return ads131e08_exec_cmd(st, cmd);
}
static const struct iio_trigger_ops ads131e08_trigger_ops = {
.set_trigger_state = &ads131e08_set_trigger_state,
.validate_device = &iio_trigger_validate_own_device,
};
static irqreturn_t ads131e08_trigger_handler(int irq, void *private)
{
struct iio_poll_func *pf = private;
struct iio_dev *indio_dev = pf->indio_dev;
struct ads131e08_state *st = iio_priv(indio_dev);
unsigned int chn, i = 0;
u8 *src, *dest;
int ret;
/*
* The number of data bits per channel depends on the data rate.
* For 32 and 64 ksps data rates, number of data bits per channel
* is 16. This case is not compliant with used (fixed) scan element
* type (be:s24/32>>8). So we use a little tweak to pack properly
* 16 bits of data into the buffer.
*/
unsigned int num_bytes = ADS131E08_NUM_DATA_BYTES(st->data_rate);
u8 tweek_offset = num_bytes == 2 ? 1 : 0;
if (iio_trigger_using_own(indio_dev))
ret = ads131e08_read_data(st, st->readback_len);
else
ret = ads131e08_pool_data(st);
if (ret)
goto out;
for_each_set_bit(chn, indio_dev->active_scan_mask, indio_dev->masklength) {
src = st->rx_buf + ADS131E08_NUM_STATUS_BYTES + chn * num_bytes;
dest = st->tmp_buf.data + i * ADS131E08_NUM_STORAGE_BYTES;
/*
* Tweek offset is 0:
* +---+---+---+---+
* |D0 |D1 |D2 | X | (3 data bytes)
* +---+---+---+---+
* a+0 a+1 a+2 a+3
*
* Tweek offset is 1:
* +---+---+---+---+
* |P0 |D0 |D1 | X | (one padding byte and 2 data bytes)
* +---+---+---+---+
* a+0 a+1 a+2 a+3
*/
memcpy(dest + tweek_offset, src, num_bytes);
/*
* Data conversion from 16 bits of data to 24 bits of data
* is done by sign extension (properly filling padding byte).
*/
if (tweek_offset)
*dest = *src & BIT(7) ? 0xff : 0x00;
i++;
}
iio_push_to_buffers_with_timestamp(indio_dev, st->tmp_buf.data,
iio_get_time_ns(indio_dev));
out:
iio_trigger_notify_done(indio_dev->trig);
return IRQ_HANDLED;
}
static irqreturn_t ads131e08_interrupt(int irq, void *private)
{
struct iio_dev *indio_dev = private;
struct ads131e08_state *st = iio_priv(indio_dev);
if (iio_buffer_enabled(indio_dev) && iio_trigger_using_own(indio_dev))
iio_trigger_poll(st->trig);
else
complete(&st->completion);
return IRQ_HANDLED;
}
static int ads131e08_alloc_channels(struct iio_dev *indio_dev)
{
struct ads131e08_state *st = iio_priv(indio_dev);
struct ads131e08_channel_config *channel_config;
struct device *dev = &st->spi->dev;
struct iio_chan_spec *channels;
struct fwnode_handle *node;
unsigned int channel, tmp;
int num_channels, i, ret;
ret = device_property_read_u32(dev, "ti,vref-internal", &tmp);
if (ret)
tmp = 0;
switch (tmp) {
case 0:
st->vref_mv = ADS131E08_VREF_2V4_mV;
break;
case 1:
st->vref_mv = ADS131E08_VREF_4V_mV;
break;
default:
dev_err(&st->spi->dev, "invalid internal voltage reference\n");
return -EINVAL;
}
num_channels = device_get_child_node_count(dev);
if (num_channels == 0) {
dev_err(&st->spi->dev, "no channel children\n");
return -ENODEV;
}
if (num_channels > st->info->max_channels) {
dev_err(&st->spi->dev, "num of channel children out of range\n");
return -EINVAL;
}
channels = devm_kcalloc(&st->spi->dev, num_channels,
sizeof(*channels), GFP_KERNEL);
if (!channels)
return -ENOMEM;
channel_config = devm_kcalloc(&st->spi->dev, num_channels,
sizeof(*channel_config), GFP_KERNEL);
if (!channel_config)
return -ENOMEM;
i = 0;
device_for_each_child_node(dev, node) {
ret = fwnode_property_read_u32(node, "reg", &channel);
if (ret)
return ret;
ret = fwnode_property_read_u32(node, "ti,gain", &tmp);
if (ret) {
channel_config[i].pga_gain = ADS131E08_DEFAULT_PGA_GAIN;
} else {
ret = ads131e08_pga_gain_to_field_value(st, tmp);
if (ret < 0)
return ret;
channel_config[i].pga_gain = tmp;
}
ret = fwnode_property_read_u32(node, "ti,mux", &tmp);
if (ret) {
channel_config[i].mux = ADS131E08_DEFAULT_MUX;
} else {
ret = ads131e08_validate_channel_mux(st, tmp);
if (ret)
return ret;
channel_config[i].mux = tmp;
}
channels[i].type = IIO_VOLTAGE;
channels[i].indexed = 1;
channels[i].channel = channel;
channels[i].address = i;
channels[i].info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
BIT(IIO_CHAN_INFO_SCALE);
channels[i].info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SAMP_FREQ);
channels[i].scan_index = channel;
channels[i].scan_type.sign = 's';
channels[i].scan_type.realbits = 24;
channels[i].scan_type.storagebits = 32;
channels[i].scan_type.shift = 8;
channels[i].scan_type.endianness = IIO_BE;
i++;
}
indio_dev->channels = channels;
indio_dev->num_channels = num_channels;
st->channel_config = channel_config;
return 0;
}
static void ads131e08_regulator_disable(void *data)
{
struct ads131e08_state *st = data;
regulator_disable(st->vref_reg);
}
static void ads131e08_clk_disable(void *data)
{
struct ads131e08_state *st = data;
clk_disable_unprepare(st->adc_clk);
}
static int ads131e08_probe(struct spi_device *spi)
{
const struct ads131e08_info *info;
struct ads131e08_state *st;
struct iio_dev *indio_dev;
unsigned long adc_clk_hz;
unsigned long adc_clk_ns;
int ret;
info = device_get_match_data(&spi->dev);
if (!info) {
dev_err(&spi->dev, "failed to get match data\n");
return -ENODEV;
}
indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st));
if (!indio_dev) {
dev_err(&spi->dev, "failed to allocate IIO device\n");
return -ENOMEM;
}
st = iio_priv(indio_dev);
st->info = info;
st->spi = spi;
ret = ads131e08_alloc_channels(indio_dev);
if (ret)
return ret;
indio_dev->name = st->info->name;
indio_dev->dev.parent = &spi->dev;
indio_dev->info = &ads131e08_iio_info;
indio_dev->modes = INDIO_DIRECT_MODE;
init_completion(&st->completion);
if (spi->irq) {
ret = devm_request_irq(&spi->dev, spi->irq,
ads131e08_interrupt,
IRQF_TRIGGER_FALLING | IRQF_ONESHOT,
spi->dev.driver->name, indio_dev);
if (ret)
return dev_err_probe(&spi->dev, ret,
"request irq failed\n");
} else {
dev_err(&spi->dev, "data ready IRQ missing\n");
return -ENODEV;
}
st->trig = devm_iio_trigger_alloc(&spi->dev, "%s-dev%d",
indio_dev->name, indio_dev->id);
if (!st->trig) {
dev_err(&spi->dev, "failed to allocate IIO trigger\n");
return -ENOMEM;
}
st->trig->ops = &ads131e08_trigger_ops;
st->trig->dev.parent = &spi->dev;
iio_trigger_set_drvdata(st->trig, indio_dev);
ret = devm_iio_trigger_register(&spi->dev, st->trig);
if (ret) {
dev_err(&spi->dev, "failed to register IIO trigger\n");
return -ENOMEM;
}
indio_dev->trig = iio_trigger_get(st->trig);
ret = devm_iio_triggered_buffer_setup(&spi->dev, indio_dev,
NULL, &ads131e08_trigger_handler, NULL);
if (ret) {
dev_err(&spi->dev, "failed to setup IIO buffer\n");
return ret;
}
st->vref_reg = devm_regulator_get_optional(&spi->dev, "vref");
if (!IS_ERR(st->vref_reg)) {
ret = regulator_enable(st->vref_reg);
if (ret) {
dev_err(&spi->dev,
"failed to enable external vref supply\n");
return ret;
}
ret = devm_add_action_or_reset(&spi->dev, ads131e08_regulator_disable, st);
if (ret)
return ret;
} else {
if (PTR_ERR(st->vref_reg) != -ENODEV)
return PTR_ERR(st->vref_reg);
st->vref_reg = NULL;
}
st->adc_clk = devm_clk_get(&spi->dev, "adc-clk");
if (IS_ERR(st->adc_clk))
return dev_err_probe(&spi->dev, PTR_ERR(st->adc_clk),
"failed to get the ADC clock\n");
ret = clk_prepare_enable(st->adc_clk);
if (ret) {
dev_err(&spi->dev, "failed to prepare/enable the ADC clock\n");
return ret;
}
ret = devm_add_action_or_reset(&spi->dev, ads131e08_clk_disable, st);
if (ret)
return ret;
adc_clk_hz = clk_get_rate(st->adc_clk);
if (!adc_clk_hz) {
dev_err(&spi->dev, "failed to get the ADC clock rate\n");
return -EINVAL;
}
adc_clk_ns = NSEC_PER_SEC / adc_clk_hz;
st->sdecode_delay_us = DIV_ROUND_UP(
ADS131E08_WAIT_SDECODE_CYCLES * adc_clk_ns, NSEC_PER_USEC);
st->reset_delay_us = DIV_ROUND_UP(
ADS131E08_WAIT_RESET_CYCLES * adc_clk_ns, NSEC_PER_USEC);
ret = ads131e08_initial_config(indio_dev);
if (ret) {
dev_err(&spi->dev, "initial configuration failed\n");
return ret;
}
return devm_iio_device_register(&spi->dev, indio_dev);
}
static const struct of_device_id ads131e08_of_match[] = {
{ .compatible = "ti,ads131e04",
.data = &ads131e08_info_tbl[ads131e04], },
{ .compatible = "ti,ads131e06",
.data = &ads131e08_info_tbl[ads131e06], },
{ .compatible = "ti,ads131e08",
.data = &ads131e08_info_tbl[ads131e08], },
{}
};
MODULE_DEVICE_TABLE(of, ads131e08_of_match);
static struct spi_driver ads131e08_driver = {
.driver = {
.name = "ads131e08",
.of_match_table = ads131e08_of_match,
},
.probe = ads131e08_probe,
};
module_spi_driver(ads131e08_driver);
MODULE_AUTHOR("Tomislav Denis <tomislav.denis@avl.com>");
MODULE_DESCRIPTION("Driver for ADS131E0x ADC family");
MODULE_LICENSE("GPL v2");

18
drivers/iio/adc/ti_am335x_adc.c
View File

@ -385,24 +385,16 @@ static int tiadc_iio_buffered_hardware_setup(struct device *dev,
unsigned long flags,
const struct iio_buffer_setup_ops *setup_ops)
{
struct iio_buffer *buffer;
int ret;
buffer = devm_iio_kfifo_allocate(dev);
if (!buffer)
return -ENOMEM;
iio_device_attach_buffer(indio_dev, buffer);
ret = devm_request_threaded_irq(dev, irq, pollfunc_th, pollfunc_bh,
flags, indio_dev->name, indio_dev);
ret = devm_iio_kfifo_buffer_setup(dev, indio_dev,
INDIO_BUFFER_SOFTWARE,
setup_ops);
if (ret)
return ret;
indio_dev->setup_ops = setup_ops;
indio_dev->modes |= INDIO_BUFFER_SOFTWARE;
return 0;
return devm_request_threaded_irq(dev, irq, pollfunc_th, pollfunc_bh,
flags, indio_dev->name, indio_dev);
}
static const char * const chan_name_ain[] = {

1
drivers/iio/adc/xilinx-xadc-core.c
View File

@ -747,7 +747,6 @@ static struct iio_trigger *xadc_alloc_trigger(struct iio_dev *indio_dev,
if (trig == NULL)
return ERR_PTR(-ENOMEM);
trig->dev.parent = indio_dev->dev.parent;
trig->ops = &xadc_trigger_ops;
iio_trigger_set_drvdata(trig, iio_priv(indio_dev));

35
drivers/iio/buffer/industrialio-buffer-dmaengine.c
View File

@ -132,9 +132,9 @@ static const struct iio_dma_buffer_ops iio_dmaengine_default_ops = {
static ssize_t iio_dmaengine_buffer_get_length_align(struct device *dev,
struct device_attribute *attr, char *buf)
{
struct iio_dev *indio_dev = dev_to_iio_dev(dev);
struct iio_buffer *buffer = to_iio_dev_attr(attr)->buffer;
struct dmaengine_buffer *dmaengine_buffer =
iio_buffer_to_dmaengine_buffer(indio_dev->buffer);
iio_buffer_to_dmaengine_buffer(buffer);
return sprintf(buf, "%zu\n", dmaengine_buffer->align);
}
@ -244,7 +244,7 @@ static void __devm_iio_dmaengine_buffer_free(struct device *dev, void *res)
*
* The buffer will be automatically de-allocated once the device gets destroyed.
*/
struct iio_buffer *devm_iio_dmaengine_buffer_alloc(struct device *dev,
static struct iio_buffer *devm_iio_dmaengine_buffer_alloc(struct device *dev,
const char *channel)
{
struct iio_buffer **bufferp, *buffer;
@ -265,7 +265,34 @@ struct iio_buffer *devm_iio_dmaengine_buffer_alloc(struct device *dev,
return buffer;
}
EXPORT_SYMBOL_GPL(devm_iio_dmaengine_buffer_alloc);
/**
* devm_iio_dmaengine_buffer_setup() - Setup a DMA buffer for an IIO device
* @dev: Parent device for the buffer
* @indio_dev: IIO device to which to attach this buffer.
* @channel: DMA channel name, typically "rx".
*
* This allocates a new IIO buffer with devm_iio_dmaengine_buffer_alloc()
* and attaches it to an IIO device with iio_device_attach_buffer().
* It also appends the INDIO_BUFFER_HARDWARE mode to the supported modes of the
* IIO device.
*/
int devm_iio_dmaengine_buffer_setup(struct device *dev,
struct iio_dev *indio_dev,
const char *channel)
{
struct iio_buffer *buffer;
buffer = devm_iio_dmaengine_buffer_alloc(indio_dev->dev.parent,
channel);
if (IS_ERR(buffer))
return PTR_ERR(buffer);
indio_dev->modes |= INDIO_BUFFER_HARDWARE;
return iio_device_attach_buffer(indio_dev, buffer);
}
EXPORT_SYMBOL_GPL(devm_iio_dmaengine_buffer_setup);
MODULE_AUTHOR("Lars-Peter Clausen <lars@metafoo.de>");
MODULE_DESCRIPTION("DMA buffer for the IIO framework");

10
drivers/iio/buffer/industrialio-triggered-buffer.c
View File

@ -50,8 +50,6 @@ int iio_triggered_buffer_setup_ext(struct iio_dev *indio_dev,
goto error_ret;
}
iio_device_attach_buffer(indio_dev, buffer);
indio_dev->pollfunc = iio_alloc_pollfunc(h,
thread,
IRQF_ONESHOT,
@ -72,10 +70,16 @@ int iio_triggered_buffer_setup_ext(struct iio_dev *indio_dev,
buffer->attrs = buffer_attrs;
ret = iio_device_attach_buffer(indio_dev, buffer);
if (ret < 0)
goto error_dealloc_pollfunc;
return 0;
error_dealloc_pollfunc:
iio_dealloc_pollfunc(indio_dev->pollfunc);
error_kfifo_free:
iio_kfifo_free(indio_dev->buffer);
iio_kfifo_free(buffer);
error_ret:
return ret;
}

45
drivers/iio/buffer/kfifo_buf.c
View File

@ -180,13 +180,13 @@ static void devm_iio_kfifo_release(struct device *dev, void *res)
}
/**
* devm_iio_fifo_allocate - Resource-managed iio_kfifo_allocate()
* devm_iio_kfifo_allocate - Resource-managed iio_kfifo_allocate()
* @dev: Device to allocate kfifo buffer for
*
* RETURNS:
* Pointer to allocated iio_buffer on success, NULL on failure.
*/
struct iio_buffer *devm_iio_kfifo_allocate(struct device *dev)
static struct iio_buffer *devm_iio_kfifo_allocate(struct device *dev)
{
struct iio_buffer **ptr, *r;
@ -204,6 +204,45 @@ struct iio_buffer *devm_iio_kfifo_allocate(struct device *dev)
return r;
}
EXPORT_SYMBOL(devm_iio_kfifo_allocate);
/**
* devm_iio_kfifo_buffer_setup_ext - Allocate a kfifo buffer & attach it to an IIO device
* @dev: Device object to which to attach the life-time of this kfifo buffer
* @indio_dev: The device the buffer should be attached to
* @mode_flags: The mode flags for this buffer (INDIO_BUFFER_SOFTWARE and/or
* INDIO_BUFFER_TRIGGERED).
* @setup_ops: The setup_ops required to configure the HW part of the buffer (optional)
* @buffer_attrs: Extra sysfs buffer attributes for this IIO buffer
*
* This function allocates a kfifo buffer via devm_iio_kfifo_allocate() and
* attaches it to the IIO device via iio_device_attach_buffer().
* This is meant to be a bit of a short-hand/helper function as there are a few
* drivers that seem to do this.
*/
int devm_iio_kfifo_buffer_setup_ext(struct device *dev,
struct iio_dev *indio_dev,
int mode_flags,
const struct iio_buffer_setup_ops *setup_ops,
const struct attribute **buffer_attrs)
{
struct iio_buffer *buffer;
if (!mode_flags)
return -EINVAL;
buffer = devm_iio_kfifo_allocate(dev);
if (!buffer)
return -ENOMEM;
mode_flags &= kfifo_access_funcs.modes;
indio_dev->modes |= mode_flags;
indio_dev->setup_ops = setup_ops;
buffer->attrs = buffer_attrs;
return iio_device_attach_buffer(indio_dev, buffer);
}
EXPORT_SYMBOL_GPL(devm_iio_kfifo_buffer_setup_ext);
MODULE_LICENSE("GPL");

1
drivers/iio/chemical/atlas-sensor.c
View File

@ -649,7 +649,6 @@ static int atlas_probe(struct i2c_client *client,
data->client = client;
data->trig = trig;
data->chip = chip;
trig->dev.parent = indio_dev->dev.parent;
trig->ops = &atlas_interrupt_trigger_ops;
iio_trigger_set_drvdata(trig, indio_dev);

3
drivers/iio/chemical/bme680_i2c.c
View File

@ -26,8 +26,7 @@ static int bme680_i2c_probe(struct i2c_client *client,
regmap = devm_regmap_init_i2c(client, &bme680_regmap_config);
if (IS_ERR(regmap)) {
dev_err(&client->dev, "Failed to register i2c regmap %d\n",
(int)PTR_ERR(regmap));
dev_err(&client->dev, "Failed to register i2c regmap %ld\n", PTR_ERR(regmap));
return PTR_ERR(regmap);
}

3
drivers/iio/chemical/bme680_spi.c
View File

@ -132,8 +132,7 @@ static int bme680_spi_probe(struct spi_device *spi)
regmap = devm_regmap_init(&spi->dev, &bme680_regmap_bus,
bus_context, &bme680_regmap_config);
if (IS_ERR(regmap)) {
dev_err(&spi->dev, "Failed to register spi regmap %d\n",
(int)PTR_ERR(regmap));
dev_err(&spi->dev, "Failed to register spi regmap %ld\n", PTR_ERR(regmap));
return PTR_ERR(regmap);
}

1
drivers/iio/chemical/ccs811.c
View File

@ -497,7 +497,6 @@ static int ccs811_probe(struct i2c_client *client,
goto err_poweroff;
}
data->drdy_trig->dev.parent = &client->dev;
data->drdy_trig->ops = &ccs811_trigger_ops;
iio_trigger_set_drvdata(data->drdy_trig, indio_dev);
indio_dev->trig = data->drdy_trig;

1
drivers/iio/chemical/scd30_core.c
View File

@ -646,7 +646,6 @@ static int scd30_setup_trigger(struct iio_dev *indio_dev)
return -ENOMEM;
}
trig->dev.parent = dev;
trig->ops = &scd30_trigger_ops;
iio_trigger_set_drvdata(trig, indio_dev);

2
drivers/iio/chemical/scd30_serial.c
View File

@ -177,7 +177,7 @@ static int scd30_serdev_command(struct scd30_state *state, enum scd30_cmd cmd, u
static int scd30_serdev_receive_buf(struct serdev_device *serdev,
const unsigned char *buf, size_t size)
{
struct iio_dev *indio_dev = dev_get_drvdata(&serdev->dev);
struct iio_dev *indio_dev = serdev_device_get_drvdata(serdev);
struct scd30_serdev_priv *priv;
struct scd30_state *state;
int num;

1
drivers/iio/common/Kconfig
View File

@ -6,5 +6,6 @@
source "drivers/iio/common/cros_ec_sensors/Kconfig"
source "drivers/iio/common/hid-sensors/Kconfig"
source "drivers/iio/common/ms_sensors/Kconfig"
source "drivers/iio/common/scmi_sensors/Kconfig"
source "drivers/iio/common/ssp_sensors/Kconfig"
source "drivers/iio/common/st_sensors/Kconfig"

1
drivers/iio/common/Makefile
View File

@ -11,5 +11,6 @@
obj-y += cros_ec_sensors/
obj-y += hid-sensors/
obj-y += ms_sensors/
obj-y += scmi_sensors/
obj-y += ssp_sensors/
obj-y += st_sensors/

3
drivers/iio/common/cros_ec_sensors/cros_ec_lid_angle.c
View File

@ -97,8 +97,7 @@ static int cros_ec_lid_angle_probe(struct platform_device *pdev)
if (!indio_dev)
return -ENOMEM;
ret = cros_ec_sensors_core_init(pdev, indio_dev, false, NULL,
NULL, false);
ret = cros_ec_sensors_core_init(pdev, indio_dev, false, NULL, NULL);
if (ret)
return ret;

3
drivers/iio/common/cros_ec_sensors/cros_ec_sensors.c
View File

@ -236,8 +236,7 @@ static int cros_ec_sensors_probe(struct platform_device *pdev)
ret = cros_ec_sensors_core_init(pdev, indio_dev, true,
cros_ec_sensors_capture,
cros_ec_sensors_push_data,
true);
cros_ec_sensors_push_data);
if (ret)
return ret;

33
drivers/iio/common/cros_ec_sensors/cros_ec_sensors_core.c
View File

@ -12,6 +12,7 @@
#include <linux/iio/iio.h>
#include <linux/iio/kfifo_buf.h>
#include <linux/iio/sysfs.h>
#include <linux/iio/trigger.h>
#include <linux/iio/trigger_consumer.h>
#include <linux/iio/triggered_buffer.h>
#include <linux/kernel.h>
@ -240,7 +241,6 @@ static void cros_ec_sensors_core_clean(void *arg)
* for backward compatibility.
* @push_data: function to call when cros_ec_sensorhub receives
* a sample for that sensor.
* @has_hw_fifo: Set true if this device has/uses a HW FIFO
*
* Return: 0 on success, -errno on failure.
*/
@ -248,8 +248,7 @@ int cros_ec_sensors_core_init(struct platform_device *pdev,
struct iio_dev *indio_dev,
bool physical_device,
cros_ec_sensors_capture_t trigger_capture,
cros_ec_sensorhub_push_data_cb_t push_data,
bool has_hw_fifo)
cros_ec_sensorhub_push_data_cb_t push_data)
{
struct device *dev = &pdev->dev;
struct cros_ec_sensors_core_state *state = iio_priv(indio_dev);
@ -334,14 +333,11 @@ int cros_ec_sensors_core_init(struct platform_device *pdev,
* We can not use trigger here, as events are generated
* as soon as sample_frequency is set.
*/
struct iio_buffer *buffer;
buffer = devm_iio_kfifo_allocate(dev);
if (!buffer)
return -ENOMEM;
iio_device_attach_buffer(indio_dev, buffer);
indio_dev->modes = INDIO_BUFFER_SOFTWARE;
ret = devm_iio_kfifo_buffer_setup_ext(dev, indio_dev,
INDIO_BUFFER_SOFTWARE, NULL,
cros_ec_sensor_fifo_attributes);
if (ret)
return ret;
ret = cros_ec_sensorhub_register_push_data(
sensor_hub, sensor_platform->sensor_num,
@ -358,21 +354,14 @@ int cros_ec_sensors_core_init(struct platform_device *pdev,
ret = iio_device_set_clock(indio_dev, CLOCK_BOOTTIME);
if (ret)
return ret;
} else {
const struct attribute **fifo_attrs;
if (has_hw_fifo)
fifo_attrs = cros_ec_sensor_fifo_attributes;
else
fifo_attrs = NULL;
/*
* The only way to get samples in buffer is to set a
* software trigger (systrig, hrtimer).
*/
ret = devm_iio_triggered_buffer_setup_ext(
dev, indio_dev, NULL, trigger_capture,
NULL, fifo_attrs);
ret = devm_iio_triggered_buffer_setup(dev, indio_dev,
NULL, trigger_capture, NULL);
if (ret)
return ret;
}
@ -562,7 +551,7 @@ static int cros_ec_sensors_read_until_not_busy(
}
/**
* read_ec_sensors_data_unsafe() - read acceleration data from EC shared memory
* cros_ec_sensors_read_data_unsafe() - read acceleration data from EC shared memory
* @indio_dev: pointer to IIO device
* @scan_mask: bitmap of the sensor indices to scan
* @data: location to store data

83
drivers/iio/common/hid-sensors/hid-sensor-attributes.c
View File

@ -263,6 +263,29 @@ int hid_sensor_read_raw_hyst_value(struct hid_sensor_common *st,
}
EXPORT_SYMBOL(hid_sensor_read_raw_hyst_value);
int hid_sensor_read_raw_hyst_rel_value(struct hid_sensor_common *st, int *val1,
int *val2)
{
s32 value;
int ret;
ret = sensor_hub_get_feature(st->hsdev,
st->sensitivity_rel.report_id,
st->sensitivity_rel.index, sizeof(value),
&value);
if (ret < 0 || value < 0) {
*val1 = *val2 = 0;
return -EINVAL;
}
convert_from_vtf_format(value, st->sensitivity_rel.size,
st->sensitivity_rel.unit_expo, val1, val2);
return IIO_VAL_INT_PLUS_MICRO;
}
EXPORT_SYMBOL(hid_sensor_read_raw_hyst_rel_value);
int hid_sensor_write_raw_hyst_value(struct hid_sensor_common *st,
int val1, int val2)
{
@ -294,6 +317,37 @@ int hid_sensor_write_raw_hyst_value(struct hid_sensor_common *st,
}
EXPORT_SYMBOL(hid_sensor_write_raw_hyst_value);
int hid_sensor_write_raw_hyst_rel_value(struct hid_sensor_common *st,
int val1, int val2)
{
s32 value;
int ret;
if (val1 < 0 || val2 < 0)
return -EINVAL;
value = convert_to_vtf_format(st->sensitivity_rel.size,
st->sensitivity_rel.unit_expo,
val1, val2);
ret = sensor_hub_set_feature(st->hsdev, st->sensitivity_rel.report_id,
st->sensitivity_rel.index, sizeof(value),
&value);
if (ret < 0 || value < 0)
return -EINVAL;
ret = sensor_hub_get_feature(st->hsdev,
st->sensitivity_rel.report_id,
st->sensitivity_rel.index, sizeof(value),
&value);
if (ret < 0 || value < 0)
return -EINVAL;
st->raw_hystersis = value;
return 0;
}
EXPORT_SYMBOL(hid_sensor_write_raw_hyst_rel_value);
/*
* This fuction applies the unit exponent to the scale.
* For example:
@ -448,12 +502,15 @@ EXPORT_SYMBOL(hid_sensor_batch_mode_supported);
int hid_sensor_parse_common_attributes(struct hid_sensor_hub_device *hsdev,
u32 usage_id,
struct hid_sensor_common *st)
struct hid_sensor_common *st,
const u32 *sensitivity_addresses,
u32 sensitivity_addresses_len)
{
struct hid_sensor_hub_attribute_info timestamp;
s32 value;
int ret;
int i;
hid_sensor_get_reporting_interval(hsdev, usage_id, st);
@ -475,6 +532,30 @@ int hid_sensor_parse_common_attributes(struct hid_sensor_hub_device *hsdev,
HID_USAGE_SENSOR_PROP_SENSITIVITY_ABS,
&st->sensitivity);
sensor_hub_input_get_attribute_info(hsdev,
HID_FEATURE_REPORT, usage_id,
HID_USAGE_SENSOR_PROP_SENSITIVITY_REL_PCT,
&st->sensitivity_rel);
/*
* Set Sensitivity field ids, when there is no individual modifier, will
* check absolute sensitivity and relative sensitivity of data field
*/
for (i = 0; i < sensitivity_addresses_len; i++) {
if (st->sensitivity.index < 0)
sensor_hub_input_get_attribute_info(
hsdev, HID_FEATURE_REPORT, usage_id,
HID_USAGE_SENSOR_DATA_MOD_CHANGE_SENSITIVITY_ABS |
sensitivity_addresses[i],
&st->sensitivity);
if (st->sensitivity_rel.index < 0)
sensor_hub_input_get_attribute_info(
hsdev, HID_FEATURE_REPORT, usage_id,
HID_USAGE_SENSOR_DATA_MOD_CHANGE_SENSITIVITY_REL_PCT |
sensitivity_addresses[i],
&st->sensitivity_rel);
}
st->raw_hystersis = -1;
sensor_hub_input_get_attribute_info(hsdev,

4
drivers/iio/common/hid-sensors/hid-sensor-trigger.c
View File

@ -255,14 +255,14 @@ int hid_sensor_setup_trigger(struct iio_dev *indio_dev, const char *name,
return ret;
}
trig = iio_trigger_alloc("%s-dev%d", name, indio_dev->id);
trig = iio_trigger_alloc(indio_dev->dev.parent,
"%s-dev%d", name, indio_dev->id);
if (trig == NULL) {
dev_err(&indio_dev->dev, "Trigger Allocate Failed\n");
ret = -ENOMEM;
goto error_triggered_buffer_cleanup;
}
trig->dev.parent = indio_dev->dev.parent;
iio_trigger_set_drvdata(trig, attrb);
trig->ops = &hid_sensor_trigger_ops;
ret = iio_trigger_register(trig);

18
drivers/iio/common/scmi_sensors/Kconfig Normal file
View File

@ -0,0 +1,18 @@
#
# IIO over SCMI
#
# When adding new entries keep the list in alphabetical order
menu "IIO SCMI Sensors"
config IIO_SCMI
tristate "IIO SCMI"
depends on ARM_SCMI_PROTOCOL
select IIO_BUFFER
select IIO_KFIFO_BUF
help
Say yes here to build support for IIO SCMI Driver.
This provides ARM SCMI Protocol based IIO device.
This driver provides support for accelerometer and gyroscope
sensors available on SCMI based platforms.
endmenu

5
drivers/iio/common/scmi_sensors/Makefile Normal file
View File

@ -0,0 +1,5 @@
# SPDX - License - Identifier : GPL - 2.0 - only
#
# Makefile for the IIO over SCMI
#
obj-$(CONFIG_IIO_SCMI) += scmi_iio.o

672
drivers/iio/common/scmi_sensors/scmi_iio.c Normal file
View File

@ -0,0 +1,672 @@
// SPDX-License-Identifier: GPL-2.0
/*
* System Control and Management Interface(SCMI) based IIO sensor driver
*
* Copyright (C) 2021 Google LLC
*/
#include <linux/delay.h>
#include <linux/err.h>
#include <linux/iio/buffer.h>
#include <linux/iio/iio.h>
#include <linux/iio/kfifo_buf.h>
#include <linux/iio/sysfs.h>
#include <linux/kernel.h>
#include <linux/kthread.h>
#include <linux/module.h>
#include <linux/scmi_protocol.h>
#include <linux/time.h>
#include <linux/types.h>
#define SCMI_IIO_NUM_OF_AXIS 3
struct scmi_iio_priv {
struct scmi_handle *handle;
const struct scmi_sensor_info *sensor_info;
struct iio_dev *indio_dev;
/* adding one additional channel for timestamp */
s64 iio_buf[SCMI_IIO_NUM_OF_AXIS + 1];
struct notifier_block sensor_update_nb;
u32 *freq_avail;
};
static int scmi_iio_sensor_update_cb(struct notifier_block *nb,
unsigned long event, void *data)
{
struct scmi_sensor_update_report *sensor_update = data;
struct iio_dev *scmi_iio_dev;
struct scmi_iio_priv *sensor;
s8 tstamp_scale;
u64 time, time_ns;
int i;
if (sensor_update->readings_count == 0)
return NOTIFY_DONE;
sensor = container_of(nb, struct scmi_iio_priv, sensor_update_nb);
for (i = 0; i < sensor_update->readings_count; i++)
sensor->iio_buf[i] = sensor_update->readings[i].value;
if (!sensor->sensor_info->timestamped) {
time_ns = ktime_to_ns(sensor_update->timestamp);
} else {
/*
* All the axes are supposed to have the same value for timestamp.
* We are just using the values from the Axis 0 here.
*/
time = sensor_update->readings[0].timestamp;
/*
* Timestamp returned by SCMI is in seconds and is equal to
* time * power-of-10 multiplier(tstamp_scale) seconds.
* Converting the timestamp to nanoseconds below.
*/
tstamp_scale = sensor->sensor_info->tstamp_scale +
const_ilog2(NSEC_PER_SEC) / const_ilog2(10);
if (tstamp_scale < 0) {
do_div(time, int_pow(10, abs(tstamp_scale)));
time_ns = time;
} else {
time_ns = time * int_pow(10, tstamp_scale);
}
}
scmi_iio_dev = sensor->indio_dev;
iio_push_to_buffers_with_timestamp(scmi_iio_dev, sensor->iio_buf,
time_ns);
return NOTIFY_OK;
}
static int scmi_iio_buffer_preenable(struct iio_dev *iio_dev)
{
struct scmi_iio_priv *sensor = iio_priv(iio_dev);
u32 sensor_id = sensor->sensor_info->id;
u32 sensor_config = 0;
int err;
if (sensor->sensor_info->timestamped)
sensor_config |= FIELD_PREP(SCMI_SENS_CFG_TSTAMP_ENABLED_MASK,
SCMI_SENS_CFG_TSTAMP_ENABLE);
sensor_config |= FIELD_PREP(SCMI_SENS_CFG_SENSOR_ENABLED_MASK,
SCMI_SENS_CFG_SENSOR_ENABLE);
err = sensor->handle->notify_ops->register_event_notifier(sensor->handle,
SCMI_PROTOCOL_SENSOR, SCMI_EVENT_SENSOR_UPDATE,
&sensor_id, &sensor->sensor_update_nb);
if (err) {
dev_err(&iio_dev->dev,
"Error in registering sensor update notifier for sensor %s err %d",
sensor->sensor_info->name, err);
return err;
}
err = sensor->handle->sensor_ops->config_set(sensor->handle,
sensor->sensor_info->id, sensor_config);
if (err) {
sensor->handle->notify_ops->unregister_event_notifier(sensor->handle,
SCMI_PROTOCOL_SENSOR,
SCMI_EVENT_SENSOR_UPDATE, &sensor_id,
&sensor->sensor_update_nb);
dev_err(&iio_dev->dev, "Error in enabling sensor %s err %d",
sensor->sensor_info->name, err);
}
return err;
}
static int scmi_iio_buffer_postdisable(struct iio_dev *iio_dev)
{
struct scmi_iio_priv *sensor = iio_priv(iio_dev);
u32 sensor_id = sensor->sensor_info->id;
u32 sensor_config = 0;
int err;
sensor_config |= FIELD_PREP(SCMI_SENS_CFG_SENSOR_ENABLED_MASK,
SCMI_SENS_CFG_SENSOR_DISABLE);
err = sensor->handle->notify_ops->unregister_event_notifier(sensor->handle,
SCMI_PROTOCOL_SENSOR, SCMI_EVENT_SENSOR_UPDATE,
&sensor_id, &sensor->sensor_update_nb);
if (err) {
dev_err(&iio_dev->dev,
"Error in unregistering sensor update notifier for sensor %s err %d",
sensor->sensor_info->name, err);
return err;
}
err = sensor->handle->sensor_ops->config_set(sensor->handle, sensor_id,
sensor_config);
if (err) {
dev_err(&iio_dev->dev,
"Error in disabling sensor %s with err %d",
sensor->sensor_info->name, err);
}
return err;
}
static const struct iio_buffer_setup_ops scmi_iio_buffer_ops = {
.preenable = scmi_iio_buffer_preenable,
.postdisable = scmi_iio_buffer_postdisable,
};
static int scmi_iio_set_odr_val(struct iio_dev *iio_dev, int val, int val2)
{
struct scmi_iio_priv *sensor = iio_priv(iio_dev);
const unsigned long UHZ_PER_HZ = 1000000UL;
u64 sec, mult, uHz, sf;
u32 sensor_config;
char buf[32];
int err = sensor->handle->sensor_ops->config_get(sensor->handle,
sensor->sensor_info->id, &sensor_config);
if (err) {
dev_err(&iio_dev->dev,
"Error in getting sensor config for sensor %s err %d",
sensor->sensor_info->name, err);
return err;
}
uHz = val * UHZ_PER_HZ + val2;
/*
* The seconds field in the sensor interval in SCMI is 16 bits long
* Therefore seconds = 1/Hz <= 0xFFFF. As floating point calculations are
* discouraged in the kernel driver code, to calculate the scale factor (sf)
* (1* 1000000 * sf)/uHz <= 0xFFFF. Therefore, sf <= (uHz * 0xFFFF)/1000000
* To calculate the multiplier,we convert the sf into char string and
* count the number of characters
*/
sf = (u64)uHz * 0xFFFF;
do_div(sf, UHZ_PER_HZ);
mult = scnprintf(buf, sizeof(buf), "%llu", sf) - 1;
sec = int_pow(10, mult) * UHZ_PER_HZ;
do_div(sec, uHz);
if (sec == 0) {
dev_err(&iio_dev->dev,
"Trying to set invalid sensor update value for sensor %s",
sensor->sensor_info->name);
return -EINVAL;
}
sensor_config &= ~SCMI_SENS_CFG_UPDATE_SECS_MASK;
sensor_config |= FIELD_PREP(SCMI_SENS_CFG_UPDATE_SECS_MASK, sec);
sensor_config &= ~SCMI_SENS_CFG_UPDATE_EXP_MASK;
sensor_config |= FIELD_PREP(SCMI_SENS_CFG_UPDATE_EXP_MASK, -mult);
if (sensor->sensor_info->timestamped) {
sensor_config &= ~SCMI_SENS_CFG_TSTAMP_ENABLED_MASK;
sensor_config |= FIELD_PREP(SCMI_SENS_CFG_TSTAMP_ENABLED_MASK,
SCMI_SENS_CFG_TSTAMP_ENABLE);
}
sensor_config &= ~SCMI_SENS_CFG_ROUND_MASK;
sensor_config |=
FIELD_PREP(SCMI_SENS_CFG_ROUND_MASK, SCMI_SENS_CFG_ROUND_AUTO);
err = sensor->handle->sensor_ops->config_set(sensor->handle,
sensor->sensor_info->id, sensor_config);
if (err)
dev_err(&iio_dev->dev,
"Error in setting sensor update interval for sensor %s value %u err %d",
sensor->sensor_info->name, sensor_config, err);
return err;
}
static int scmi_iio_write_raw(struct iio_dev *iio_dev,
struct iio_chan_spec const *chan, int val,
int val2, long mask)
{
int err;
switch (mask) {
case IIO_CHAN_INFO_SAMP_FREQ:
mutex_lock(&iio_dev->mlock);
err = scmi_iio_set_odr_val(iio_dev, val, val2);
mutex_unlock(&iio_dev->mlock);
return err;
default:
return -EINVAL;
}
}
static int scmi_iio_read_avail(struct iio_dev *iio_dev,
struct iio_chan_spec const *chan,
const int **vals, int *type, int *length,
long mask)
{
struct scmi_iio_priv *sensor = iio_priv(iio_dev);
switch (mask) {
case IIO_CHAN_INFO_SAMP_FREQ:
*vals = sensor->freq_avail;
*type = IIO_VAL_INT_PLUS_MICRO;
*length = sensor->sensor_info->intervals.count * 2;
if (sensor->sensor_info->intervals.segmented)
return IIO_AVAIL_RANGE;
else
return IIO_AVAIL_LIST;
default:
return -EINVAL;
}
}
static void convert_ns_to_freq(u64 interval_ns, u64 *hz, u64 *uhz)
{
u64 rem, freq;
freq = NSEC_PER_SEC;
rem = do_div(freq, interval_ns);
*hz = freq;
*uhz = rem * 1000000UL;
do_div(*uhz, interval_ns);
}
static int scmi_iio_get_odr_val(struct iio_dev *iio_dev, int *val, int *val2)
{
u64 sensor_update_interval, sensor_interval_mult, hz, uhz;
struct scmi_iio_priv *sensor = iio_priv(iio_dev);
u32 sensor_config;
int mult;
int err = sensor->handle->sensor_ops->config_get(sensor->handle,
sensor->sensor_info->id, &sensor_config);
if (err) {
dev_err(&iio_dev->dev,
"Error in getting sensor config for sensor %s err %d",
sensor->sensor_info->name, err);
return err;
}
sensor_update_interval =
SCMI_SENS_CFG_GET_UPDATE_SECS(sensor_config) * NSEC_PER_SEC;
mult = SCMI_SENS_CFG_GET_UPDATE_EXP(sensor_config);
if (mult < 0) {
sensor_interval_mult = int_pow(10, abs(mult));
do_div(sensor_update_interval, sensor_interval_mult);
} else {
sensor_interval_mult = int_pow(10, mult);
sensor_update_interval =
sensor_update_interval * sensor_interval_mult;
}
convert_ns_to_freq(sensor_update_interval, &hz, &uhz);
*val = hz;
*val2 = uhz;
return 0;
}
static int scmi_iio_read_raw(struct iio_dev *iio_dev,
struct iio_chan_spec const *ch, int *val,
int *val2, long mask)
{
struct scmi_iio_priv *sensor = iio_priv(iio_dev);
s8 scale;
int ret;
switch (mask) {
case IIO_CHAN_INFO_SCALE:
scale = sensor->sensor_info->axis[ch->scan_index].scale;
if (scale < 0) {
*val = 1;
*val2 = int_pow(10, abs(scale));
return IIO_VAL_FRACTIONAL;
}
*val = int_pow(10, scale);
return IIO_VAL_INT;
case IIO_CHAN_INFO_SAMP_FREQ:
ret = scmi_iio_get_odr_val(iio_dev, val, val2);
return ret ? ret : IIO_VAL_INT_PLUS_MICRO;
default:
return -EINVAL;
}
}
static const struct iio_info scmi_iio_info = {
.read_raw = scmi_iio_read_raw,
.read_avail = scmi_iio_read_avail,
.write_raw = scmi_iio_write_raw,
};
static ssize_t scmi_iio_get_raw_available(struct iio_dev *iio_dev,
uintptr_t private,
const struct iio_chan_spec *chan,
char *buf)
{
struct scmi_iio_priv *sensor = iio_priv(iio_dev);
u64 resolution, rem;
s64 min_range, max_range;
s8 exponent, scale;
int len = 0;
/*
* All the axes are supposed to have the same value for range and resolution.
* We are just using the values from the Axis 0 here.
*/
if (sensor->sensor_info->axis[0].extended_attrs) {
min_range = sensor->sensor_info->axis[0].attrs.min_range;
max_range = sensor->sensor_info->axis[0].attrs.max_range;
resolution = sensor->sensor_info->axis[0].resolution;
exponent = sensor->sensor_info->axis[0].exponent;
scale = sensor->sensor_info->axis[0].scale;
/*
* To provide the raw value for the resolution to the userspace,
* need to divide the resolution exponent by the sensor scale
*/
exponent = exponent - scale;
if (exponent < 0) {
rem = do_div(resolution,
int_pow(10, abs(exponent))
);
len = scnprintf(buf, PAGE_SIZE,
"[%lld %llu.%llu %lld]\n", min_range,
resolution, rem, max_range);
} else {
resolution = resolution * int_pow(10, exponent);
len = scnprintf(buf, PAGE_SIZE, "[%lld %llu %lld]\n",
min_range, resolution, max_range);
}
}
return len;
}
static const struct iio_chan_spec_ext_info scmi_iio_ext_info[] = {
{
.name = "raw_available",
.read = scmi_iio_get_raw_available,
.shared = IIO_SHARED_BY_TYPE,
},
{},
};
static void scmi_iio_set_timestamp_channel(struct iio_chan_spec *iio_chan,
int scan_index)
{
iio_chan->type = IIO_TIMESTAMP;
iio_chan->channel = -1;
iio_chan->scan_index = scan_index;
iio_chan->scan_type.sign = 'u';
iio_chan->scan_type.realbits = 64;
iio_chan->scan_type.storagebits = 64;
}
static void scmi_iio_set_data_channel(struct iio_chan_spec *iio_chan,
enum iio_chan_type type,
enum iio_modifier mod, int scan_index)
{
iio_chan->type = type;
iio_chan->modified = 1;
iio_chan->channel2 = mod;
iio_chan->info_mask_separate = BIT(IIO_CHAN_INFO_SCALE);
iio_chan->info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SAMP_FREQ);
iio_chan->info_mask_shared_by_type_available =
BIT(IIO_CHAN_INFO_SAMP_FREQ);
iio_chan->scan_index = scan_index;
iio_chan->scan_type.sign = 's';
iio_chan->scan_type.realbits = 64;
iio_chan->scan_type.storagebits = 64;
iio_chan->scan_type.endianness = IIO_LE;
iio_chan->ext_info = scmi_iio_ext_info;
}
static int scmi_iio_get_chan_modifier(const char *name,
enum iio_modifier *modifier)
{
char *pch, mod;
if (!name)
return -EINVAL;
pch = strrchr(name, '_');
if (!pch)
return -EINVAL;
mod = *(pch + 1);
switch (mod) {
case 'X':
*modifier = IIO_MOD_X;
return 0;
case 'Y':
*modifier = IIO_MOD_Y;
return 0;
case 'Z':
*modifier = IIO_MOD_Z;
return 0;
default:
return -EINVAL;
}
}
static int scmi_iio_get_chan_type(u8 scmi_type, enum iio_chan_type *iio_type)
{
switch (scmi_type) {
case METERS_SEC_SQUARED:
*iio_type = IIO_ACCEL;
return 0;
case RADIANS_SEC:
*iio_type = IIO_ANGL_VEL;
return 0;
default:
return -EINVAL;
}
}
static u64 scmi_iio_convert_interval_to_ns(u32 val)
{
u64 sensor_update_interval =
SCMI_SENS_INTVL_GET_SECS(val) * NSEC_PER_SEC;
u64 sensor_interval_mult;
int mult;
mult = SCMI_SENS_INTVL_GET_EXP(val);
if (mult < 0) {
sensor_interval_mult = int_pow(10, abs(mult));
do_div(sensor_update_interval, sensor_interval_mult);
} else {
sensor_interval_mult = int_pow(10, mult);
sensor_update_interval =
sensor_update_interval * sensor_interval_mult;
}
return sensor_update_interval;
}
static int scmi_iio_set_sampling_freq_avail(struct iio_dev *iio_dev)
{
u64 cur_interval_ns, low_interval_ns, high_interval_ns, step_size_ns,
hz, uhz;
unsigned int cur_interval, low_interval, high_interval, step_size;
struct scmi_iio_priv *sensor = iio_priv(iio_dev);
int i;
sensor->freq_avail =
devm_kzalloc(&iio_dev->dev,
sizeof(*sensor->freq_avail) *
(sensor->sensor_info->intervals.count * 2),
GFP_KERNEL);
if (!sensor->freq_avail)
return -ENOMEM;
if (sensor->sensor_info->intervals.segmented) {
low_interval = sensor->sensor_info->intervals
.desc[SCMI_SENS_INTVL_SEGMENT_LOW];
low_interval_ns = scmi_iio_convert_interval_to_ns(low_interval);
convert_ns_to_freq(low_interval_ns, &hz, &uhz);
sensor->freq_avail[0] = hz;
sensor->freq_avail[1] = uhz;
step_size = sensor->sensor_info->intervals
.desc[SCMI_SENS_INTVL_SEGMENT_STEP];
step_size_ns = scmi_iio_convert_interval_to_ns(step_size);
convert_ns_to_freq(step_size_ns, &hz, &uhz);
sensor->freq_avail[2] = hz;
sensor->freq_avail[3] = uhz;
high_interval = sensor->sensor_info->intervals
.desc[SCMI_SENS_INTVL_SEGMENT_HIGH];
high_interval_ns =
scmi_iio_convert_interval_to_ns(high_interval);
convert_ns_to_freq(high_interval_ns, &hz, &uhz);
sensor->freq_avail[4] = hz;
sensor->freq_avail[5] = uhz;
} else {
for (i = 0; i < sensor->sensor_info->intervals.count; i++) {
cur_interval = sensor->sensor_info->intervals.desc[i];
cur_interval_ns =
scmi_iio_convert_interval_to_ns(cur_interval);
convert_ns_to_freq(cur_interval_ns, &hz, &uhz);
sensor->freq_avail[i * 2] = hz;
sensor->freq_avail[i * 2 + 1] = uhz;
}
}
return 0;
}
static struct iio_dev *scmi_alloc_iiodev(struct device *dev,
struct scmi_handle *handle,
const struct scmi_sensor_info *sensor_info)
{
struct iio_chan_spec *iio_channels;
struct scmi_iio_priv *sensor;
enum iio_modifier modifier;
enum iio_chan_type type;
struct iio_dev *iiodev;
int i, ret;
iiodev = devm_iio_device_alloc(dev, sizeof(*sensor));
if (!iiodev)
return ERR_PTR(-ENOMEM);
iiodev->modes = INDIO_DIRECT_MODE;
iiodev->dev.parent = dev;
sensor = iio_priv(iiodev);
sensor->handle = handle;
sensor->sensor_info = sensor_info;
sensor->sensor_update_nb.notifier_call = scmi_iio_sensor_update_cb;
sensor->indio_dev = iiodev;
/* adding one additional channel for timestamp */
iiodev->num_channels = sensor_info->num_axis + 1;
iiodev->name = sensor_info->name;
iiodev->info = &scmi_iio_info;
iio_channels =
devm_kzalloc(dev,
sizeof(*iio_channels) * (iiodev->num_channels),
GFP_KERNEL);
if (!iio_channels)
return ERR_PTR(-ENOMEM);
ret = scmi_iio_set_sampling_freq_avail(iiodev);
if (ret < 0)
return ERR_PTR(ret);
for (i = 0; i < sensor_info->num_axis; i++) {
ret = scmi_iio_get_chan_type(sensor_info->axis[i].type, &type);
if (ret < 0)
return ERR_PTR(ret);
ret = scmi_iio_get_chan_modifier(sensor_info->axis[i].name,
&modifier);
if (ret < 0)
return ERR_PTR(ret);
scmi_iio_set_data_channel(&iio_channels[i], type, modifier,
sensor_info->axis[i].id);
}
scmi_iio_set_timestamp_channel(&iio_channels[i], i);
iiodev->channels = iio_channels;
return iiodev;
}
static int scmi_iio_dev_probe(struct scmi_device *sdev)
{
const struct scmi_sensor_info *sensor_info;
struct scmi_handle *handle = sdev->handle;
struct device *dev = &sdev->dev;
struct iio_dev *scmi_iio_dev;
u16 nr_sensors;
int err = -ENODEV, i;
if (!handle || !handle->sensor_ops) {
dev_err(dev, "SCMI device has no sensor interface\n");
return -EINVAL;
}
nr_sensors = handle->sensor_ops->count_get(handle);
if (!nr_sensors) {
dev_dbg(dev, "0 sensors found via SCMI bus\n");
return -ENODEV;
}
for (i = 0; i < nr_sensors; i++) {
sensor_info = handle->sensor_ops->info_get(handle, i);
if (!sensor_info) {
dev_err(dev, "SCMI sensor %d has missing info\n", i);
return -EINVAL;
}
/* This driver only supports 3-axis accel and gyro, skipping other sensors */
if (sensor_info->num_axis != SCMI_IIO_NUM_OF_AXIS)
continue;
/* This driver only supports 3-axis accel and gyro, skipping other sensors */
if (sensor_info->axis[0].type != METERS_SEC_SQUARED &&
sensor_info->axis[0].type != RADIANS_SEC)
continue;
scmi_iio_dev = scmi_alloc_iiodev(dev, handle, sensor_info);
if (IS_ERR(scmi_iio_dev)) {
dev_err(dev,
"failed to allocate IIO device for sensor %s: %ld\n",
sensor_info->name, PTR_ERR(scmi_iio_dev));
return PTR_ERR(scmi_iio_dev);
}
err = devm_iio_kfifo_buffer_setup(&scmi_iio_dev->dev,
scmi_iio_dev,
INDIO_BUFFER_SOFTWARE,
&scmi_iio_buffer_ops);
if (err < 0) {
dev_err(dev,
"IIO buffer setup error at sensor %s: %d\n",
sensor_info->name, err);
return err;
}
err = devm_iio_device_register(dev, scmi_iio_dev);
if (err) {
dev_err(dev,
"IIO device registration failed at sensor %s: %d\n",
sensor_info->name, err);
return err;
}
}
return err;
}
static const struct scmi_device_id scmi_id_table[] = {
{ SCMI_PROTOCOL_SENSOR, "iiodev" },
{},
};
MODULE_DEVICE_TABLE(scmi, scmi_id_table);
static struct scmi_driver scmi_iiodev_driver = {
.name = "scmi-sensor-iiodev",
.probe = scmi_iio_dev_probe,
.id_table = scmi_id_table,
};
module_scmi_driver(scmi_iiodev_driver);
MODULE_AUTHOR("Jyoti Bhayana <jbhayana@google.com>");
MODULE_DESCRIPTION("SCMI IIO Driver");
MODULE_LICENSE("GPL v2");

2
drivers/iio/common/st_sensors/st_sensors_buffer.c
View File

@ -57,7 +57,7 @@ irqreturn_t st_sensors_trigger_handler(int irq, void *p)
s64 timestamp;
/*
* If we do timetamping here, do it before reading the values, because
* If we do timestamping here, do it before reading the values, because
* once we've read the values, new interrupts can occur (when using
* the hardware trigger) and the hw_timestamp may get updated.
* By storing it in a local variable first, we are safe.

4
drivers/iio/common/st_sensors/st_sensors_trigger.c
View File

@ -123,7 +123,8 @@ int st_sensors_allocate_trigger(struct iio_dev *indio_dev,
unsigned long irq_trig;
int err;
sdata->trig = iio_trigger_alloc("%s-trigger", indio_dev->name);
sdata->trig = iio_trigger_alloc(sdata->dev, "%s-trigger",
indio_dev->name);
if (sdata->trig == NULL) {
dev_err(&indio_dev->dev, "failed to allocate iio trigger.\n");
return -ENOMEM;
@ -131,7 +132,6 @@ int st_sensors_allocate_trigger(struct iio_dev *indio_dev,
iio_trigger_set_drvdata(sdata->trig, indio_dev);
sdata->trig->ops = trigger_ops;
sdata->trig->dev.parent = sdata->dev;
irq_trig = irqd_get_trigger_type(irq_get_irq_data(sdata->irq));
/*

5
drivers/iio/dac/Kconfig
View File

@ -142,8 +142,9 @@ config AD5696_I2C
select AD5686
help
Say yes here to build support for Analog Devices AD5311R, AD5338R,
AD5671R, AD5675R, AD5691R, AD5692R, AD5693, AD5693R, AD5694, AD5694R,
AD5695R, AD5696, and AD5696R Digital to Analog converters.
AD5671R, AD5673R, AD5675R, AD5677R, AD5691R, AD5692R, AD5693, AD5693R,
AD5694, AD5694R, AD5695R, AD5696, and AD5696R Digital to Analog
converters.
To compile this driver as a module, choose M here: the module will be
called ad5696.

2
drivers/iio/dac/ad5504.c
View File

@ -39,7 +39,7 @@
#define AD5504_DAC_PWRDN_3STATE 1
/**
* struct ad5446_state - driver instance specific data
* struct ad5504_state - driver instance specific data
* @spi: spi_device
* @reg: supply regulator
* @vref_mv: actual reference voltage used

12
drivers/iio/dac/ad5686.c
View File

@ -301,6 +301,12 @@ static const struct ad5686_chip_info ad5686_chip_info_tbl[] = {
.num_channels = 8,
.regmap_type = AD5686_REGMAP,
},
[ID_AD5673R] = {
.channels = ad5674r_channels,
.int_vref_mv = 2500,
.num_channels = 16,
.regmap_type = AD5686_REGMAP,
},
[ID_AD5674R] = {
.channels = ad5674r_channels,
.int_vref_mv = 2500,
@ -324,6 +330,12 @@ static const struct ad5686_chip_info ad5686_chip_info_tbl[] = {
.num_channels = 8,
.regmap_type = AD5686_REGMAP,
},
[ID_AD5677R] = {
.channels = ad5679r_channels,
.int_vref_mv = 2500,
.num_channels = 16,
.regmap_type = AD5686_REGMAP,
},
[ID_AD5679R] = {
.channels = ad5679r_channels,
.int_vref_mv = 2500,

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