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https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
synced 2024-08-23 17:30:02 +00:00
Merge branch 'bpf-arm-jit-improvements'
Russell King says: ==================== Four further jit compiler improves for 32-bit ARM. ==================== Signed-off-by: Daniel Borkmann <daniel@iogearbox.net>
This commit is contained in:
commit
9c48b1d116
1 changed files with 73 additions and 47 deletions
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@ -599,15 +599,25 @@ static inline void emit_a32_mov_i(const s8 dst, const u32 val,
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}
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}
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static void emit_a32_mov_i64(const s8 dst[], u64 val, struct jit_ctx *ctx)
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{
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const s8 *tmp = bpf2a32[TMP_REG_1];
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const s8 *rd = is_stacked(dst_lo) ? tmp : dst;
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emit_mov_i(rd[1], (u32)val, ctx);
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emit_mov_i(rd[0], val >> 32, ctx);
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arm_bpf_put_reg64(dst, rd, ctx);
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}
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/* Sign extended move */
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static inline void emit_a32_mov_i64(const bool is64, const s8 dst[],
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const u32 val, struct jit_ctx *ctx) {
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u32 hi = 0;
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static inline void emit_a32_mov_se_i64(const bool is64, const s8 dst[],
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const u32 val, struct jit_ctx *ctx) {
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u64 val64 = val;
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if (is64 && (val & (1<<31)))
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hi = (u32)~0;
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emit_a32_mov_i(dst_lo, val, ctx);
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emit_a32_mov_i(dst_hi, hi, ctx);
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val64 |= 0xffffffff00000000ULL;
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emit_a32_mov_i64(dst, val64, ctx);
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}
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static inline void emit_a32_add_r(const u8 dst, const u8 src,
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@ -706,11 +716,30 @@ static inline void emit_a32_alu_r(const s8 dst, const s8 src,
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static inline void emit_a32_alu_r64(const bool is64, const s8 dst[],
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const s8 src[], struct jit_ctx *ctx,
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const u8 op) {
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emit_a32_alu_r(dst_lo, src_lo, ctx, is64, false, op);
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if (is64)
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emit_a32_alu_r(dst_hi, src_hi, ctx, is64, true, op);
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else
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emit_a32_mov_i(dst_hi, 0, ctx);
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const s8 *tmp = bpf2a32[TMP_REG_1];
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const s8 *tmp2 = bpf2a32[TMP_REG_2];
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const s8 *rd;
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rd = arm_bpf_get_reg64(dst, tmp, ctx);
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if (is64) {
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const s8 *rs;
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rs = arm_bpf_get_reg64(src, tmp2, ctx);
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/* ALU operation */
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emit_alu_r(rd[1], rs[1], true, false, op, ctx);
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emit_alu_r(rd[0], rs[0], true, true, op, ctx);
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} else {
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s8 rs;
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rs = arm_bpf_get_reg32(src_lo, tmp2[1], ctx);
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/* ALU operation */
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emit_alu_r(rd[1], rs, true, false, op, ctx);
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emit_a32_mov_i(rd[0], 0, ctx);
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}
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arm_bpf_put_reg64(dst, rd, ctx);
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}
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/* dst = src (4 bytes)*/
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@ -965,29 +994,42 @@ static inline void emit_a32_mul_r64(const s8 dst[], const s8 src[],
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}
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/* *(size *)(dst + off) = src */
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static inline void emit_str_r(const s8 dst, const s8 src,
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const s32 off, struct jit_ctx *ctx, const u8 sz){
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static inline void emit_str_r(const s8 dst, const s8 src[],
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s32 off, struct jit_ctx *ctx, const u8 sz){
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const s8 *tmp = bpf2a32[TMP_REG_1];
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s32 off_max;
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s8 rd;
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rd = arm_bpf_get_reg32(dst, tmp[1], ctx);
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if (off) {
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if (sz == BPF_H)
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off_max = 0xff;
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else
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off_max = 0xfff;
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if (off < 0 || off > off_max) {
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emit_a32_mov_i(tmp[0], off, ctx);
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emit(ARM_ADD_R(tmp[0], rd, tmp[0]), ctx);
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emit(ARM_ADD_R(tmp[0], tmp[0], rd), ctx);
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rd = tmp[0];
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off = 0;
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}
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switch (sz) {
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case BPF_W:
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/* Store a Word */
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emit(ARM_STR_I(src, rd, 0), ctx);
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case BPF_B:
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/* Store a Byte */
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emit(ARM_STRB_I(src_lo, rd, off), ctx);
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break;
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case BPF_H:
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/* Store a HalfWord */
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emit(ARM_STRH_I(src, rd, 0), ctx);
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emit(ARM_STRH_I(src_lo, rd, off), ctx);
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break;
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case BPF_B:
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/* Store a Byte */
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emit(ARM_STRB_I(src, rd, 0), ctx);
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case BPF_W:
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/* Store a Word */
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emit(ARM_STR_I(src_lo, rd, off), ctx);
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break;
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case BPF_DW:
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/* Store a Double Word */
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emit(ARM_STR_I(src_lo, rd, off), ctx);
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emit(ARM_STR_I(src_hi, rd, off + 4), ctx);
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break;
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}
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}
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@ -1309,7 +1351,7 @@ static int build_insn(const struct bpf_insn *insn, struct jit_ctx *ctx)
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break;
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case BPF_K:
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/* Sign-extend immediate value to destination reg */
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emit_a32_mov_i64(is64, dst, imm, ctx);
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emit_a32_mov_se_i64(is64, dst, imm, ctx);
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break;
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}
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break;
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@ -1358,7 +1400,7 @@ static int build_insn(const struct bpf_insn *insn, struct jit_ctx *ctx)
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* value into temporary reg and then it would be
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* safe to do the operation on it.
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*/
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emit_a32_mov_i64(is64, tmp2, imm, ctx);
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emit_a32_mov_se_i64(is64, tmp2, imm, ctx);
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emit_a32_alu_r64(is64, dst, tmp2, ctx, BPF_OP(code));
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break;
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}
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@ -1454,7 +1496,7 @@ static int build_insn(const struct bpf_insn *insn, struct jit_ctx *ctx)
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* reg then it would be safe to do the operation
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* on it.
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*/
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emit_a32_mov_i64(is64, tmp2, imm, ctx);
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emit_a32_mov_se_i64(is64, tmp2, imm, ctx);
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emit_a32_mul_r64(dst, tmp2, ctx);
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break;
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}
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@ -1506,12 +1548,9 @@ static int build_insn(const struct bpf_insn *insn, struct jit_ctx *ctx)
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/* dst = imm64 */
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case BPF_LD | BPF_IMM | BPF_DW:
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{
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const struct bpf_insn insn1 = insn[1];
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u32 hi, lo = imm;
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u64 val = (u32)imm | (u64)insn[1].imm << 32;
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hi = insn1.imm;
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emit_a32_mov_i(dst_lo, lo, ctx);
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emit_a32_mov_i(dst_hi, hi, ctx);
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emit_a32_mov_i64(dst, val, ctx);
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return 1;
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}
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@ -1531,17 +1570,15 @@ static int build_insn(const struct bpf_insn *insn, struct jit_ctx *ctx)
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switch (BPF_SIZE(code)) {
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case BPF_DW:
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/* Sign-extend immediate value into temp reg */
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emit_a32_mov_i64(true, tmp2, imm, ctx);
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emit_str_r(dst_lo, tmp2[1], off, ctx, BPF_W);
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emit_str_r(dst_lo, tmp2[0], off+4, ctx, BPF_W);
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emit_a32_mov_se_i64(true, tmp2, imm, ctx);
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break;
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case BPF_W:
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case BPF_H:
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case BPF_B:
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emit_a32_mov_i(tmp2[1], imm, ctx);
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emit_str_r(dst_lo, tmp2[1], off, ctx, BPF_SIZE(code));
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break;
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}
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emit_str_r(dst_lo, tmp2, off, ctx, BPF_SIZE(code));
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break;
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/* STX XADD: lock *(u32 *)(dst + off) += src */
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case BPF_STX | BPF_XADD | BPF_W:
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@ -1553,20 +1590,9 @@ static int build_insn(const struct bpf_insn *insn, struct jit_ctx *ctx)
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case BPF_STX | BPF_MEM | BPF_H:
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case BPF_STX | BPF_MEM | BPF_B:
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case BPF_STX | BPF_MEM | BPF_DW:
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{
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u8 sz = BPF_SIZE(code);
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rs = arm_bpf_get_reg64(src, tmp2, ctx);
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/* Store the value */
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if (BPF_SIZE(code) == BPF_DW) {
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emit_str_r(dst_lo, rs[1], off, ctx, BPF_W);
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emit_str_r(dst_lo, rs[0], off+4, ctx, BPF_W);
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} else {
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emit_str_r(dst_lo, rs[1], off, ctx, sz);
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}
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emit_str_r(dst_lo, rs, off, ctx, BPF_SIZE(code));
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break;
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}
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/* PC += off if dst == src */
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/* PC += off if dst > src */
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/* PC += off if dst >= src */
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@ -1620,7 +1646,7 @@ static int build_insn(const struct bpf_insn *insn, struct jit_ctx *ctx)
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rm = tmp2[0];
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rn = tmp2[1];
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/* Sign-extend immediate value */
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emit_a32_mov_i64(true, tmp2, imm, ctx);
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emit_a32_mov_se_i64(true, tmp2, imm, ctx);
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go_jmp:
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/* Setup destination register */
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rd = arm_bpf_get_reg64(dst, tmp, ctx);
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