media: sun8i-di: Fix power on/off sequences

[ Upstream commit cff104e33b ]

According to user manual, reset line should be deasserted before clocks
are enabled. Also fix power down sequence to be reverse of that.

Fixes: a4260ea495 ("media: sun4i: Add H3 deinterlace driver")
Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl>
Signed-off-by: Sasha Levin <sashal@kernel.org>
This commit is contained in:
Jernej Skrabec 2023-12-16 14:34:21 +01:00 committed by Sasha Levin
parent 244bface03
commit 9c5a97408c

View file

@ -929,11 +929,18 @@ static int deinterlace_runtime_resume(struct device *device)
return ret;
}
ret = reset_control_deassert(dev->rstc);
if (ret) {
dev_err(dev->dev, "Failed to apply reset\n");
goto err_exclusive_rate;
}
ret = clk_prepare_enable(dev->bus_clk);
if (ret) {
dev_err(dev->dev, "Failed to enable bus clock\n");
goto err_exclusive_rate;
goto err_rst;
}
ret = clk_prepare_enable(dev->mod_clk);
@ -950,23 +957,16 @@ static int deinterlace_runtime_resume(struct device *device)
goto err_mod_clk;
}
ret = reset_control_deassert(dev->rstc);
if (ret) {
dev_err(dev->dev, "Failed to apply reset\n");
goto err_ram_clk;
}
deinterlace_init(dev);
return 0;
err_ram_clk:
clk_disable_unprepare(dev->ram_clk);
err_mod_clk:
clk_disable_unprepare(dev->mod_clk);
err_bus_clk:
clk_disable_unprepare(dev->bus_clk);
err_rst:
reset_control_assert(dev->rstc);
err_exclusive_rate:
clk_rate_exclusive_put(dev->mod_clk);
@ -977,11 +977,12 @@ static int deinterlace_runtime_suspend(struct device *device)
{
struct deinterlace_dev *dev = dev_get_drvdata(device);
reset_control_assert(dev->rstc);
clk_disable_unprepare(dev->ram_clk);
clk_disable_unprepare(dev->mod_clk);
clk_disable_unprepare(dev->bus_clk);
reset_control_assert(dev->rstc);
clk_rate_exclusive_put(dev->mod_clk);
return 0;