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Revert "i2c: i2c-qcom-geni: Fix DMA transfer race"
This reverts commit02b9aec592
. As talked about in the patch ("soc: qcom: geni: More properly switch to DMA mode"), swapping the order of geni_se_setup_m_cmd() and geni_se_xx_dma_prep() can sometimes cause corrupted transfers. Thus we traded one problem for another. Now that we've debugged the problem further and fixed the geni helper functions to more disable FIFO interrupts when we move to DMA mode we can revert it and end up with (hopefully) zero problems! To be explicit, the patch ("soc: qcom: geni: More properly switch to DMA mode") is a prerequisite for this one. Fixes:02b9aec592
("i2c: i2c-qcom-geni: Fix DMA transfer race") Signed-off-by: Douglas Anderson <dianders@chromium.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Reviewed-by: Akash Asthana <akashast@codeaurora.org> Tested-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20201013142448.v2.2.I7b22281453b8a18ab16ef2bfd4c641fb1cc6a92c@changeid Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
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parent
4b6ea87be4
commit
9cb4c67d77
1 changed files with 2 additions and 4 deletions
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@ -366,6 +366,7 @@ static int geni_i2c_rx_one_msg(struct geni_i2c_dev *gi2c, struct i2c_msg *msg,
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geni_se_select_mode(se, GENI_SE_FIFO);
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writel_relaxed(len, se->base + SE_I2C_RX_TRANS_LEN);
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geni_se_setup_m_cmd(se, I2C_READ, m_param);
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if (dma_buf && geni_se_rx_dma_prep(se, dma_buf, len, &rx_dma)) {
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geni_se_select_mode(se, GENI_SE_FIFO);
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@ -373,8 +374,6 @@ static int geni_i2c_rx_one_msg(struct geni_i2c_dev *gi2c, struct i2c_msg *msg,
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dma_buf = NULL;
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}
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geni_se_setup_m_cmd(se, I2C_READ, m_param);
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time_left = wait_for_completion_timeout(&gi2c->done, XFER_TIMEOUT);
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if (!time_left)
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geni_i2c_abort_xfer(gi2c);
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@ -408,6 +407,7 @@ static int geni_i2c_tx_one_msg(struct geni_i2c_dev *gi2c, struct i2c_msg *msg,
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geni_se_select_mode(se, GENI_SE_FIFO);
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writel_relaxed(len, se->base + SE_I2C_TX_TRANS_LEN);
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geni_se_setup_m_cmd(se, I2C_WRITE, m_param);
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if (dma_buf && geni_se_tx_dma_prep(se, dma_buf, len, &tx_dma)) {
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geni_se_select_mode(se, GENI_SE_FIFO);
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@ -415,8 +415,6 @@ static int geni_i2c_tx_one_msg(struct geni_i2c_dev *gi2c, struct i2c_msg *msg,
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dma_buf = NULL;
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}
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geni_se_setup_m_cmd(se, I2C_WRITE, m_param);
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if (!dma_buf) /* Get FIFO IRQ */
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writel_relaxed(1, se->base + SE_GENI_TX_WATERMARK_REG);
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