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drm/i915: Introduce the i915_user_extension_method
An idea for extending uABI inspired by Vulkan's extension chains. Instead of expanding the data struct for each ioctl every time we need to add a new feature, define an extension chain instead. As we add optional interfaces to control the ioctl, we define a new extension struct that can be linked into the ioctl data only when required by the user. The key advantage being able to ignore large control structs for optional interfaces/extensions, while being able to process them in a consistent manner. In comparison to other extensible ioctls, the key difference is the use of a linked chain of extension structs vs an array of tagged pointers. For example, struct drm_amdgpu_cs_chunk { __u32 chunk_id; __u32 length_dw; __u64 chunk_data; }; struct drm_amdgpu_cs_in { __u32 ctx_id; __u32 bo_list_handle; __u32 num_chunks; __u32 _pad; __u64 chunks; }; allows userspace to pass in array of pointers to extension structs, but must therefore keep constructing that array along side the command stream. In dynamic situations like that, a linked list is preferred and does not similar from extra cache line misses as the extension structs themselves must still be loaded separate to the chunks array. v2: Apply the tail call optimisation directly to nip the worry of stack overflow in the bud. v3: Defend against recursion. v4: Fixup local types to match new uabi Opens: - do we include the result as an out-field in each chain? struct i915_user_extension { __u64 next_extension; __u64 name; __s32 result; __u32 mbz; /* reserved for future use */ }; * Undecided, so provision some room for future expansion. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20190322092325.5883-1-chris@chris-wilson.co.uk
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5 changed files with 135 additions and 0 deletions
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@ -46,6 +46,7 @@ i915-y := i915_drv.o \
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i915_sw_fence.o \
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i915_syncmap.o \
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i915_sysfs.o \
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i915_user_extensions.o \
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intel_csr.o \
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intel_device_info.o \
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intel_pm.o \
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61
drivers/gpu/drm/i915/i915_user_extensions.c
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61
drivers/gpu/drm/i915/i915_user_extensions.c
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@ -0,0 +1,61 @@
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/*
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* SPDX-License-Identifier: MIT
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*
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* Copyright © 2018 Intel Corporation
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*/
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#include <linux/nospec.h>
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#include <linux/sched/signal.h>
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#include <linux/uaccess.h>
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#include <uapi/drm/i915_drm.h>
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#include "i915_user_extensions.h"
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#include "i915_utils.h"
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int i915_user_extensions(struct i915_user_extension __user *ext,
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const i915_user_extension_fn *tbl,
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unsigned int count,
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void *data)
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{
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unsigned int stackdepth = 512;
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while (ext) {
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int i, err;
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u32 name;
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u64 next;
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if (!stackdepth--) /* recursion vs useful flexibility */
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return -E2BIG;
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err = check_user_mbz(&ext->flags);
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if (err)
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return err;
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for (i = 0; i < ARRAY_SIZE(ext->rsvd); i++) {
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err = check_user_mbz(&ext->rsvd[i]);
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if (err)
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return err;
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}
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if (get_user(name, &ext->name))
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return -EFAULT;
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err = -EINVAL;
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if (name < count) {
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name = array_index_nospec(name, count);
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if (tbl[name])
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err = tbl[name](ext, data);
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}
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if (err)
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return err;
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if (get_user(next, &ext->next_extension) ||
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overflows_type(next, ext))
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return -EFAULT;
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ext = u64_to_user_ptr(next);
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}
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return 0;
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}
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20
drivers/gpu/drm/i915/i915_user_extensions.h
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20
drivers/gpu/drm/i915/i915_user_extensions.h
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@ -0,0 +1,20 @@
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/*
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* SPDX-License-Identifier: MIT
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*
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* Copyright © 2018 Intel Corporation
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*/
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#ifndef I915_USER_EXTENSIONS_H
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#define I915_USER_EXTENSIONS_H
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struct i915_user_extension;
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typedef int (*i915_user_extension_fn)(struct i915_user_extension __user *ext,
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void *data);
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int i915_user_extensions(struct i915_user_extension __user *ext,
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const i915_user_extension_fn *tbl,
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unsigned int count,
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void *data);
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#endif /* I915_USER_EXTENSIONS_H */
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@ -105,6 +105,37 @@
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__T; \
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})
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/*
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* container_of_user: Extract the superclass from a pointer to a member.
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*
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* Exactly like container_of() with the exception that it plays nicely
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* with sparse for __user @ptr.
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*/
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#define container_of_user(ptr, type, member) ({ \
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void __user *__mptr = (void __user *)(ptr); \
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BUILD_BUG_ON_MSG(!__same_type(*(ptr), ((type *)0)->member) && \
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!__same_type(*(ptr), void), \
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"pointer type mismatch in container_of()"); \
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((type __user *)(__mptr - offsetof(type, member))); })
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/*
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* check_user_mbz: Check that a user value exists and is zero
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*
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* Frequently in our uABI we reserve space for future extensions, and
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* two ensure that userspace is prepared we enforce that space must
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* be zero. (Then any future extension can safely assume a default value
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* of 0.)
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*
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* check_user_mbz() combines checking that the user pointer is accessible
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* and that the contained value is zero.
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*
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* Returns: -EFAULT if not accessible, -EINVAL if !zero, or 0 on success.
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*/
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#define check_user_mbz(U) ({ \
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typeof(*(U)) mbz__; \
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get_user(mbz__, (U)) ? -EFAULT : mbz__ ? -EINVAL : 0; \
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})
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static inline u64 ptr_to_u64(const void *ptr)
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{
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return (uintptr_t)ptr;
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@ -62,6 +62,28 @@ extern "C" {
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#define I915_ERROR_UEVENT "ERROR"
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#define I915_RESET_UEVENT "RESET"
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/*
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* i915_user_extension: Base class for defining a chain of extensions
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*
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* Many interfaces need to grow over time. In most cases we can simply
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* extend the struct and have userspace pass in more data. Another option,
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* as demonstrated by Vulkan's approach to providing extensions for forward
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* and backward compatibility, is to use a list of optional structs to
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* provide those extra details.
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*
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* The key advantage to using an extension chain is that it allows us to
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* redefine the interface more easily than an ever growing struct of
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* increasing complexity, and for large parts of that interface to be
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* entirely optional. The downside is more pointer chasing; chasing across
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* the __user boundary with pointers encapsulated inside u64.
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*/
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struct i915_user_extension {
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__u64 next_extension;
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__u32 name;
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__u32 flags; /* All undefined bits must be zero. */
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__u32 rsvd[4]; /* Reserved for future use; must be zero. */
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};
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/*
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* MOCS indexes used for GPU surfaces, defining the cacheability of the
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* surface data and the coherency for this data wrt. CPU vs. GPU accesses.
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