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crypto: octeontx2 - remove errata workaround for CN10KB or CN10KA B0 chip. 

Adds code to not execute CPT errata "when CPT_AF_DIAG[FLT_DIS] = 0 and a
CPT engine access to LLC/DRAM encounters  a fault/poison, a rare case
may result in unpredictable data being delivered to a CPT engine"
workaround on CN10KA B0/CN10KB HW as it is fixed on these chips.

Signed-off-by: Srujana Challa <schalla@marvell.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
This commit is contained in:
Srujana Challa 2023-12-13 13:00:50 +05:30 committed by Herbert Xu
parent 82f89f1aa6
commit 9d1d5702aa
2 changed files with 13 additions and 4 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

7
drivers/crypto/marvell/octeontx2/otx2_cpt_common.h
View File

@ -186,6 +186,13 @@ static inline void otx2_cpt_set_hw_caps(struct pci_dev *pdev,
}
}
static inline bool cpt_is_errata_38550_exists(struct pci_dev *pdev)
{
if (is_dev_otx2(pdev) || is_dev_cn10ka_ax(pdev))
return true;
return false;
}
static inline bool cpt_feature_sgv2(struct pci_dev *pdev)
{

10
drivers/crypto/marvell/octeontx2/otx2_cptpf_ucode.c
View File

@ -1254,10 +1254,12 @@ int otx2_cpt_create_eng_grps(struct otx2_cptpf_dev *cptpf,
* encounters a fault/poison, a rare case may result in
* unpredictable data being delivered to a CPT engine.
*/
otx2_cpt_read_af_reg(&cptpf->afpf_mbox, pdev, CPT_AF_DIAG, &reg_val,
BLKADDR_CPT0);
otx2_cpt_write_af_reg(&cptpf->afpf_mbox, pdev, CPT_AF_DIAG,
reg_val | BIT_ULL(24), BLKADDR_CPT0);
if (cpt_is_errata_38550_exists(pdev)) {
otx2_cpt_read_af_reg(&cptpf->afpf_mbox, pdev, CPT_AF_DIAG,
&reg_val, BLKADDR_CPT0);
otx2_cpt_write_af_reg(&cptpf->afpf_mbox, pdev, CPT_AF_DIAG,
reg_val | BIT_ULL(24), BLKADDR_CPT0);
}
mutex_unlock(&eng_grps->lock);
return 0;