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soc: mediatek: mmsys: Add sw0_rst_offset for MT8192

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MT8192 has the same sw0 reset offset as MT8186: add the parameter
to be able to use mmsys as a reset controller for managing at
least the DSI reset line.

Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: Rex-BC Chen <rex-bc.chen@mediatek.com>
Link: https://lore.kernel.org/r/20220323091932.10648-1-angelogioacchino.delregno@collabora.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
This commit is contained in:
AngeloGioacchino Del Regno 2022-03-23 10:19:32 +01:00 committed by Matthias Brugger
parent 3123109284
commit 9d7370a56d
1 changed files with 1 additions and 0 deletions
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drivers/soc/mediatek/mtk-mmsys.c
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@ -70,6 +70,7 @@ static const struct mtk_mmsys_driver_data mt8192_mmsys_driver_data = {
.clk_driver = "clk-mt8192-mm",
.routes = mmsys_mt8192_routing_table,
.num_routes = ARRAY_SIZE(mmsys_mt8192_routing_table),
.sw0_rst_offset = MT8186_MMSYS_SW0_RST_B,
};
static const struct mtk_mmsys_driver_data mt8365_mmsys_driver_data = {