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Merge branch 'pci/qcom'
- Add support for SM8250 PCIe SF TBU clock (Dmitry Baryshkov) - Use PHY_REFCLK_USE_PAD only for qcom ipq8064 (Ansuel Smith) * pci/qcom: PCI: qcom: Use PHY_REFCLK_USE_PAD only for ipq8064 PCI: qcom: Add support for ddrss_sf_tbu clock dt-bindings: PCI: qcom: Document ddrss_sf_tbu clock for sm8250
This commit is contained in:
commit
9da5366938
2 changed files with 31 additions and 8 deletions
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@ -132,8 +132,8 @@
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- "master_bus" AXI Master clock
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- "slave_bus" AXI Slave clock
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-clock-names:
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Usage: required for sdm845 and sm8250
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- clock-names:
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Usage: required for sdm845
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Value type: <stringlist>
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Definition: Should contain the following entries
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- "aux" Auxiliary clock
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@ -144,6 +144,19 @@
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- "tbu" PCIe TBU clock
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- "pipe" PIPE clock
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- clock-names:
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Usage: required for sm8250
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Value type: <stringlist>
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Definition: Should contain the following entries
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- "aux" Auxiliary clock
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- "cfg" Configuration clock
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- "bus_master" Master AXI clock
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- "bus_slave" Slave AXI clock
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- "slave_q2a" Slave Q2A clock
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- "tbu" PCIe TBU clock
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- "ddrss_sf_tbu" PCIe SF TBU clock
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- "pipe" PIPE clock
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- resets:
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Usage: required
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Value type: <prop-encoded-array>
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@ -159,8 +159,10 @@ struct qcom_pcie_resources_2_3_3 {
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struct reset_control *rst[7];
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};
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/* 6 clocks typically, 7 for sm8250 */
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struct qcom_pcie_resources_2_7_0 {
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struct clk_bulk_data clks[6];
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struct clk_bulk_data clks[7];
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int num_clks;
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struct regulator_bulk_data supplies[2];
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struct reset_control *pci_reset;
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struct clk *pipe_clk;
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@ -398,7 +400,9 @@ static int qcom_pcie_init_2_1_0(struct qcom_pcie *pcie)
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/* enable external reference clock */
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val = readl(pcie->parf + PCIE20_PARF_PHY_REFCLK);
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val &= ~PHY_REFCLK_USE_PAD;
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/* USE_PAD is required only for ipq806x */
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if (!of_device_is_compatible(node, "qcom,pcie-apq8064"))
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val &= ~PHY_REFCLK_USE_PAD;
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val |= PHY_REFCLK_SSP_EN;
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writel(val, pcie->parf + PCIE20_PARF_PHY_REFCLK);
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@ -1152,8 +1156,14 @@ static int qcom_pcie_get_resources_2_7_0(struct qcom_pcie *pcie)
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res->clks[3].id = "bus_slave";
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res->clks[4].id = "slave_q2a";
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res->clks[5].id = "tbu";
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if (of_device_is_compatible(dev->of_node, "qcom,pcie-sm8250")) {
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res->clks[6].id = "ddrss_sf_tbu";
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res->num_clks = 7;
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} else {
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res->num_clks = 6;
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}
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ret = devm_clk_bulk_get(dev, ARRAY_SIZE(res->clks), res->clks);
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ret = devm_clk_bulk_get(dev, res->num_clks, res->clks);
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if (ret < 0)
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return ret;
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@ -1175,7 +1185,7 @@ static int qcom_pcie_init_2_7_0(struct qcom_pcie *pcie)
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return ret;
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}
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ret = clk_bulk_prepare_enable(ARRAY_SIZE(res->clks), res->clks);
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ret = clk_bulk_prepare_enable(res->num_clks, res->clks);
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if (ret < 0)
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goto err_disable_regulators;
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@ -1227,7 +1237,7 @@ static int qcom_pcie_init_2_7_0(struct qcom_pcie *pcie)
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return 0;
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err_disable_clocks:
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clk_bulk_disable_unprepare(ARRAY_SIZE(res->clks), res->clks);
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clk_bulk_disable_unprepare(res->num_clks, res->clks);
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err_disable_regulators:
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regulator_bulk_disable(ARRAY_SIZE(res->supplies), res->supplies);
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@ -1238,7 +1248,7 @@ static void qcom_pcie_deinit_2_7_0(struct qcom_pcie *pcie)
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{
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struct qcom_pcie_resources_2_7_0 *res = &pcie->res.v2_7_0;
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clk_bulk_disable_unprepare(ARRAY_SIZE(res->clks), res->clks);
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clk_bulk_disable_unprepare(res->num_clks, res->clks);
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regulator_bulk_disable(ARRAY_SIZE(res->supplies), res->supplies);
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}
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