clk: imx8mp: Fix the parent clk of the audio_root_clk

Having the parent of the audio_root_clk set to ipg_root
in the clk-imx8mp.c, there is a hang happening when the
audiomix IP regs are accessed. Switch parent to audio_ahb.

And we could also refer to the section "5.1.4 System Clocks" of the
IMX8MPRM.pdf, the parent clk of CCGR101 (Audiomix) is the
AUDIO_AHB_CLK_ROOT.

Signed-off-by: Hui Wang <hui.wang@canonical.com>
Reviewed-by: Abel Vesa <abel.vesa@nxp.com>
Link: https://lore.kernel.org/r/20211109125657.63485-2-hui.wang@canonical.com
Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
This commit is contained in:
Hui Wang 2021-11-09 20:56:57 +08:00 committed by Abel Vesa
parent 6deb3fb22d
commit 9dd8102108
1 changed files with 1 additions and 1 deletions

View File

@ -700,7 +700,7 @@ static int imx8mp_clocks_probe(struct platform_device *pdev)
hws[IMX8MP_CLK_HDMI_ROOT] = imx_clk_hw_gate4("hdmi_root_clk", "hdmi_axi", ccm_base + 0x45f0, 0);
hws[IMX8MP_CLK_TSENSOR_ROOT] = imx_clk_hw_gate4("tsensor_root_clk", "ipg_root", ccm_base + 0x4620, 0);
hws[IMX8MP_CLK_VPU_ROOT] = imx_clk_hw_gate4("vpu_root_clk", "vpu_bus", ccm_base + 0x4630, 0);
hws[IMX8MP_CLK_AUDIO_ROOT] = imx_clk_hw_gate4("audio_root_clk", "ipg_root", ccm_base + 0x4650, 0);
hws[IMX8MP_CLK_AUDIO_ROOT] = imx_clk_hw_gate4("audio_root_clk", "audio_ahb", ccm_base + 0x4650, 0);
hws[IMX8MP_CLK_ARM] = imx_clk_hw_cpu("arm", "arm_a53_core",
hws[IMX8MP_CLK_A53_CORE]->clk,