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net/mlx5e: Don't prefill WQEs in XDP SQ in the multi buffer mode
When MPWQE is disabled, mlx5e_open_xdpsq() prefills the common fields of WQEs in the XDP SQ to save time when sending packets. mlx5e_xmit_xdp_frame() runs on the prefilled fields, however, sending multi buffer XDP frames would require changing some of these fields on a per-packet basis. Besides that, mlx5e_xmit_xdp_frame() will be used as a fallback to send multi buffer XDP frames when MPWQE is enabled (MPWQE can only handle linear packets). In order to prepare for XDP multi buffer support, this commit introduces a mode for mlx5e_xmit_xdp_frame() that fills all the fields itself. Signed-off-by: Maxim Mikityanskiy <maximmi@nvidia.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
This commit is contained in:
parent
c090451633
commit
9ded70fa1d
6 changed files with 46 additions and 5 deletions
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@ -405,6 +405,7 @@ enum {
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MLX5E_SQ_STATE_VLAN_NEED_L2_INLINE,
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MLX5E_SQ_STATE_PENDING_XSK_TX,
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MLX5E_SQ_STATE_PENDING_TLS_RX_RESYNC,
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MLX5E_SQ_STATE_XDP_MULTIBUF,
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};
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struct mlx5e_tx_mpwqe {
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@ -843,6 +843,7 @@ static void mlx5e_build_async_icosq_param(struct mlx5_core_dev *mdev,
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void mlx5e_build_xdpsq_param(struct mlx5_core_dev *mdev,
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struct mlx5e_params *params,
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struct mlx5e_xsk_param *xsk,
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struct mlx5e_sq_param *param)
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{
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void *sqc = param->sqc;
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@ -851,6 +852,7 @@ void mlx5e_build_xdpsq_param(struct mlx5_core_dev *mdev,
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mlx5e_build_sq_param_common(mdev, param);
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MLX5_SET(wq, wq, log_wq_sz, params->log_sq_size);
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param->is_mpw = MLX5E_GET_PFLAG(params, MLX5E_PFLAG_XDP_TX_MPWQE);
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param->is_xdp_mb = !mlx5e_rx_is_linear_skb(params, xsk);
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mlx5e_build_tx_cq_param(mdev, params, ¶m->cqp);
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}
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@ -870,7 +872,7 @@ int mlx5e_build_channel_param(struct mlx5_core_dev *mdev,
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async_icosq_log_wq_sz = mlx5e_build_async_icosq_log_wq_sz(mdev);
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mlx5e_build_sq_param(mdev, params, &cparam->txq_sq);
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mlx5e_build_xdpsq_param(mdev, params, &cparam->xdp_sq);
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mlx5e_build_xdpsq_param(mdev, params, NULL, &cparam->xdp_sq);
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mlx5e_build_icosq_param(mdev, icosq_log_wq_sz, &cparam->icosq);
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mlx5e_build_async_icosq_param(mdev, async_icosq_log_wq_sz, &cparam->async_icosq);
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@ -31,6 +31,7 @@ struct mlx5e_sq_param {
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struct mlx5_wq_param wq;
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bool is_mpw;
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bool is_tls;
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bool is_xdp_mb;
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u16 stop_room;
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};
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@ -155,6 +156,7 @@ void mlx5e_build_tx_cq_param(struct mlx5_core_dev *mdev,
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struct mlx5e_cq_param *param);
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void mlx5e_build_xdpsq_param(struct mlx5_core_dev *mdev,
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struct mlx5e_params *params,
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struct mlx5e_xsk_param *xsk,
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struct mlx5e_sq_param *param);
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int mlx5e_build_channel_param(struct mlx5_core_dev *mdev,
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struct mlx5e_params *params,
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@ -323,6 +323,7 @@ mlx5e_xmit_xdp_frame(struct mlx5e_xdpsq *sq, struct mlx5e_xmit_data *xdptxd,
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dma_addr_t dma_addr = xdptxd->dma_addr;
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u32 dma_len = xdptxd->len;
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u16 ds_cnt, inline_hdr_sz;
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struct mlx5e_xdpsq_stats *stats = sq->stats;
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@ -338,7 +339,8 @@ mlx5e_xmit_xdp_frame(struct mlx5e_xdpsq *sq, struct mlx5e_xmit_data *xdptxd,
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if (unlikely(check_result < 0))
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return false;
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cseg->fm_ce_se = 0;
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ds_cnt = MLX5E_TX_WQE_EMPTY_DS_COUNT + 1;
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inline_hdr_sz = 0;
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/* copy the inline part if required */
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if (sq->min_inline_mode != MLX5_INLINE_MODE_NONE) {
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@ -347,7 +349,9 @@ mlx5e_xmit_xdp_frame(struct mlx5e_xdpsq *sq, struct mlx5e_xmit_data *xdptxd,
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MLX5E_XDP_MIN_INLINE - sizeof(eseg->inline_hdr.start));
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dma_len -= MLX5E_XDP_MIN_INLINE;
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dma_addr += MLX5E_XDP_MIN_INLINE;
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inline_hdr_sz = MLX5E_XDP_MIN_INLINE;
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dseg++;
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ds_cnt++;
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}
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/* write the dma part */
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@ -356,7 +360,31 @@ mlx5e_xmit_xdp_frame(struct mlx5e_xdpsq *sq, struct mlx5e_xmit_data *xdptxd,
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cseg->opmod_idx_opcode = cpu_to_be32((sq->pc << 8) | MLX5_OPCODE_SEND);
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sq->pc++;
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if (unlikely(test_bit(MLX5E_SQ_STATE_XDP_MULTIBUF, &sq->state))) {
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u8 num_pkts = 1;
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u8 num_wqebbs;
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memset(&cseg->signature, 0, sizeof(*cseg) -
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sizeof(cseg->opmod_idx_opcode) - sizeof(cseg->qpn_ds));
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memset(eseg, 0, sizeof(*eseg) - sizeof(eseg->trailer));
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eseg->inline_hdr.sz = cpu_to_be16(inline_hdr_sz);
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dseg->lkey = sq->mkey_be;
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cseg->qpn_ds = cpu_to_be32((sq->sqn << 8) | ds_cnt);
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num_wqebbs = DIV_ROUND_UP(ds_cnt, MLX5_SEND_WQEBB_NUM_DS);
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sq->db.wqe_info[pi] = (struct mlx5e_xdp_wqe_info) {
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.num_wqebbs = num_wqebbs,
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.num_pkts = num_pkts,
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};
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sq->pc += num_wqebbs;
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} else {
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cseg->fm_ce_se = 0;
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sq->pc++;
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}
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sq->doorbell_cseg = cseg;
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@ -43,7 +43,7 @@ static void mlx5e_build_xsk_cparam(struct mlx5_core_dev *mdev,
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struct mlx5e_channel_param *cparam)
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{
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mlx5e_build_rq_param(mdev, params, xsk, q_counter, &cparam->rq);
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mlx5e_build_xdpsq_param(mdev, params, &cparam->xdp_sq);
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mlx5e_build_xdpsq_param(mdev, params, xsk, &cparam->xdp_sq);
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}
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static int mlx5e_init_xsk_rq(struct mlx5e_channel *c,
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@ -1666,13 +1666,21 @@ int mlx5e_open_xdpsq(struct mlx5e_channel *c, struct mlx5e_params *params,
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csp.wq_ctrl = &sq->wq_ctrl;
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csp.min_inline_mode = sq->min_inline_mode;
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set_bit(MLX5E_SQ_STATE_ENABLED, &sq->state);
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/* Don't enable multi buffer on XDP_REDIRECT SQ, as it's not yet
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* supported by upstream, and there is no defined trigger to allow
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* transmitting redirected multi-buffer frames.
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*/
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if (param->is_xdp_mb && !is_redirect)
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set_bit(MLX5E_SQ_STATE_XDP_MULTIBUF, &sq->state);
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err = mlx5e_create_sq_rdy(c->mdev, param, &csp, 0, &sq->sqn);
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if (err)
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goto err_free_xdpsq;
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mlx5e_set_xmit_fp(sq, param->is_mpw);
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if (!param->is_mpw) {
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if (!param->is_mpw && !test_bit(MLX5E_SQ_STATE_XDP_MULTIBUF, &sq->state)) {
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unsigned int ds_cnt = MLX5E_XDP_TX_DS_COUNT;
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unsigned int inline_hdr_sz = 0;
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int i;
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