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stmmac: tidy-up stmmac_priv structure
This patch tidies-up the stmmac_priv structure that had many fileds alredy defined in the plat_stmmacenet_data structure. Signed-off-by: Giuseppe Cavallaro <peppe.cavallaro@st.com> Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
Giuseppe CAVALLARO
David S. Miller
parent
b340007f79
commit
9dfeb4d953
4 changed files with 44 additions and 52 deletions
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@ -37,7 +37,6 @@ struct stmmac_priv {
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unsigned int cur_tx;
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unsigned int dirty_tx;
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unsigned int dma_tx_size;
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int tx_coe;
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int tx_coalesce;
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struct dma_desc *dma_rx ;
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@ -48,7 +47,6 @@ struct stmmac_priv {
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struct sk_buff_head rx_recycle;
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struct net_device *dev;
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int is_gmac;
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dma_addr_t dma_rx_phy;
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unsigned int dma_rx_size;
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unsigned int dma_buf_sz;
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@ -60,14 +58,11 @@ struct stmmac_priv {
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struct napi_struct napi;
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phy_interface_t phy_interface;
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int pbl;
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int bus_id;
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int phy_addr;
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int phy_mask;
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int (*phy_reset) (void *priv);
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void (*fix_mac_speed) (void *priv, unsigned int speed);
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void (*bus_setup)(void __iomem *ioaddr);
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void *bsp_priv;
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int rx_coe;
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int no_csum_insertion;
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int phy_irq;
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struct phy_device *phydev;
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@ -77,7 +72,6 @@ struct stmmac_priv {
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unsigned int flow_ctrl;
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unsigned int pause;
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struct mii_bus *mii;
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int mii_clk_csr;
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u32 msg_enable;
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spinlock_t lock;
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@ -90,10 +84,7 @@ struct stmmac_priv {
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#ifdef STMMAC_VLAN_TAG_USED
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struct vlan_group *vlgrp;
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#endif
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int enh_desc;
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int rx_coe;
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int bugged_jumbo;
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int no_csum_insertion;
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struct plat_stmmacenet_data *plat;
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};
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#ifdef CONFIG_STM_DRIVERS
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@ -94,7 +94,7 @@ static void stmmac_ethtool_getdrvinfo(struct net_device *dev,
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{
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struct stmmac_priv *priv = netdev_priv(dev);
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if (!priv->is_gmac)
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if (!priv->plat->has_gmac)
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strcpy(info->driver, MAC100_ETHTOOL_NAME);
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else
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strcpy(info->driver, GMAC_ETHTOOL_NAME);
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@ -176,7 +176,7 @@ static void stmmac_ethtool_gregs(struct net_device *dev,
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memset(reg_space, 0x0, REG_SPACE_SIZE);
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if (!priv->is_gmac) {
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if (!priv->plat->has_gmac) {
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/* MAC registers */
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for (i = 0; i < 12; i++)
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reg_space[i] = readl(priv->ioaddr + (i * 4));
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@ -186,6 +186,18 @@ static inline u32 stmmac_tx_avail(struct stmmac_priv *priv)
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return priv->dirty_tx + priv->dma_tx_size - priv->cur_tx - 1;
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}
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/* On some ST platforms, some HW system configuraton registers have to be
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* set according to the link speed negotiated.
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*/
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static inline void stmmac_hw_fix_mac_speed(struct stmmac_priv *priv)
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{
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struct phy_device *phydev = priv->phydev;
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if (likely(priv->plat->fix_mac_speed))
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priv->plat->fix_mac_speed(priv->plat->bsp_priv,
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phydev->speed);
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}
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/**
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* stmmac_adjust_link
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* @dev: net device structure
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@ -228,15 +240,13 @@ static void stmmac_adjust_link(struct net_device *dev)
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new_state = 1;
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switch (phydev->speed) {
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case 1000:
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if (likely(priv->is_gmac))
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if (likely(priv->plat->has_gmac))
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ctrl &= ~priv->hw->link.port;
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if (likely(priv->fix_mac_speed))
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priv->fix_mac_speed(priv->bsp_priv,
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phydev->speed);
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stmmac_hw_fix_mac_speed(priv);
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break;
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case 100:
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case 10:
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if (priv->is_gmac) {
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if (priv->plat->has_gmac) {
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ctrl |= priv->hw->link.port;
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if (phydev->speed == SPEED_100) {
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ctrl |= priv->hw->link.speed;
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@ -246,9 +256,7 @@ static void stmmac_adjust_link(struct net_device *dev)
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} else {
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ctrl &= ~priv->hw->link.port;
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}
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if (likely(priv->fix_mac_speed))
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priv->fix_mac_speed(priv->bsp_priv,
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phydev->speed);
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stmmac_hw_fix_mac_speed(priv);
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break;
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default:
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if (netif_msg_link(priv))
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@ -305,7 +313,7 @@ static int stmmac_init_phy(struct net_device *dev)
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return 0;
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}
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snprintf(bus_id, MII_BUS_ID_SIZE, "%x", priv->bus_id);
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snprintf(bus_id, MII_BUS_ID_SIZE, "%x", priv->plat->bus_id);
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snprintf(phy_id, MII_BUS_ID_SIZE + 3, PHY_ID_FMT, bus_id,
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priv->phy_addr);
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pr_debug("stmmac_init_phy: trying to attach to %s\n", phy_id);
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@ -552,7 +560,7 @@ static void free_dma_desc_resources(struct stmmac_priv *priv)
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*/
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static void stmmac_dma_operation_mode(struct stmmac_priv *priv)
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{
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if (likely((priv->tx_coe) && (!priv->no_csum_insertion))) {
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if (likely((priv->plat->tx_coe) && (!priv->no_csum_insertion))) {
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/* In case of GMAC, SF mode has to be enabled
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* to perform the TX COE. This depends on:
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* 1) TX COE if actually supported
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@ -814,7 +822,7 @@ static int stmmac_open(struct net_device *dev)
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init_dma_desc_rings(dev);
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/* DMA initialization and SW reset */
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if (unlikely(priv->hw->dma->init(priv->ioaddr, priv->pbl,
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if (unlikely(priv->hw->dma->init(priv->ioaddr, priv->plat->pbl,
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priv->dma_tx_phy,
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priv->dma_rx_phy) < 0)) {
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@ -825,15 +833,15 @@ static int stmmac_open(struct net_device *dev)
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/* Copy the MAC addr into the HW */
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priv->hw->mac->set_umac_addr(priv->ioaddr, dev->dev_addr, 0);
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/* If required, perform hw setup of the bus. */
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if (priv->bus_setup)
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priv->bus_setup(priv->ioaddr);
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if (priv->plat->bus_setup)
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priv->plat->bus_setup(priv->ioaddr);
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/* Initialize the MAC Core */
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priv->hw->mac->core_init(priv->ioaddr);
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priv->rx_coe = priv->hw->mac->rx_coe(priv->ioaddr);
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if (priv->rx_coe)
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pr_info("stmmac: Rx Checksum Offload Engine supported\n");
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if (priv->tx_coe)
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if (priv->plat->tx_coe)
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pr_info("\tTX Checksum insertion supported\n");
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priv->shutdown = 0;
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@ -1042,7 +1050,8 @@ static netdev_tx_t stmmac_xmit(struct sk_buff *skb, struct net_device *dev)
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return stmmac_sw_tso(priv, skb);
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if (likely((skb->ip_summed == CHECKSUM_PARTIAL))) {
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if (unlikely((!priv->tx_coe) || (priv->no_csum_insertion)))
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if (unlikely((!priv->plat->tx_coe) ||
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(priv->no_csum_insertion)))
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skb_checksum_help(skb);
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else
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csum_insertion = 1;
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@ -1146,7 +1155,7 @@ static inline void stmmac_rx_refill(struct stmmac_priv *priv)
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DMA_FROM_DEVICE);
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(p + entry)->des2 = priv->rx_skbuff_dma[entry];
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if (unlikely(priv->is_gmac)) {
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if (unlikely(priv->plat->has_gmac)) {
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if (bfsize >= BUF_SIZE_8KiB)
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(p + entry)->des3 =
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(p + entry)->des2 + BUF_SIZE_8KiB;
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@ -1356,7 +1365,7 @@ static int stmmac_change_mtu(struct net_device *dev, int new_mtu)
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return -EBUSY;
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}
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if (priv->is_gmac)
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if (priv->plat->has_gmac)
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max_mtu = JUMBO_LEN;
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else
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max_mtu = ETH_DATA_LEN;
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@ -1370,7 +1379,7 @@ static int stmmac_change_mtu(struct net_device *dev, int new_mtu)
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* needs to have the Tx COE disabled for oversized frames
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* (due to limited buffer sizes). In this case we disable
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* the TX csum insertionin the TDES and not use SF. */
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if ((priv->bugged_jumbo) && (priv->dev->mtu > ETH_DATA_LEN))
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if ((priv->plat->bugged_jumbo) && (priv->dev->mtu > ETH_DATA_LEN))
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priv->no_csum_insertion = 1;
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else
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priv->no_csum_insertion = 0;
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@ -1390,7 +1399,7 @@ static irqreturn_t stmmac_interrupt(int irq, void *dev_id)
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return IRQ_NONE;
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}
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if (priv->is_gmac)
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if (priv->plat->has_gmac)
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/* To handle GMAC own interrupts */
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priv->hw->mac->host_irq_status((void __iomem *) dev->base_addr);
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@ -1536,7 +1545,7 @@ static int stmmac_mac_device_setup(struct net_device *dev)
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struct mac_device_info *device;
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if (priv->is_gmac)
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if (priv->plat->has_gmac)
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device = dwmac1000_setup(priv->ioaddr);
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else
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device = dwmac100_setup(priv->ioaddr);
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@ -1544,7 +1553,7 @@ static int stmmac_mac_device_setup(struct net_device *dev)
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if (!device)
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return -ENOMEM;
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if (priv->enh_desc) {
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if (priv->plat->enh_desc) {
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device->desc = &enh_desc_ops;
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pr_info("\tEnhanced descriptor structure\n");
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} else
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@ -1598,7 +1607,7 @@ static int stmmac_associate_phy(struct device *dev, void *data)
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plat_dat->bus_id);
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/* Check that this phy is for the MAC being initialised */
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if (priv->bus_id != plat_dat->bus_id)
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if (priv->plat->bus_id != plat_dat->bus_id)
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return 0;
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/* OK, this PHY is connected to the MAC.
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@ -1683,13 +1692,9 @@ static int stmmac_dvr_probe(struct platform_device *pdev)
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priv->device = &(pdev->dev);
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priv->dev = ndev;
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plat_dat = pdev->dev.platform_data;
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priv->bus_id = plat_dat->bus_id;
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priv->pbl = plat_dat->pbl; /* TLI */
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priv->mii_clk_csr = plat_dat->clk_csr;
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priv->tx_coe = plat_dat->tx_coe;
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priv->bugged_jumbo = plat_dat->bugged_jumbo;
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priv->is_gmac = plat_dat->has_gmac; /* GMAC is on board */
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priv->enh_desc = plat_dat->enh_desc;
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priv->plat = plat_dat;
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priv->ioaddr = addr;
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/* PMT module is not integrated in all the MAC devices. */
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@ -1727,16 +1732,12 @@ static int stmmac_dvr_probe(struct platform_device *pdev)
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goto out;
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}
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priv->fix_mac_speed = plat_dat->fix_mac_speed;
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priv->bus_setup = plat_dat->bus_setup;
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priv->bsp_priv = plat_dat->bsp_priv;
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pr_info("\t%s - (dev. name: %s - id: %d, IRQ #%d\n"
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"\tIO base addr: 0x%p)\n", ndev->name, pdev->name,
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pdev->id, ndev->irq, addr);
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/* MDIO bus Registration */
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pr_debug("\tMDIO bus (id: %d)...", priv->bus_id);
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pr_debug("\tMDIO bus (id: %d)...", priv->plat->bus_id);
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ret = stmmac_mdio_register(ndev);
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if (ret < 0)
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goto out;
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@ -53,7 +53,7 @@ static int stmmac_mdio_read(struct mii_bus *bus, int phyaddr, int phyreg)
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int data;
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u16 regValue = (((phyaddr << 11) & (0x0000F800)) |
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((phyreg << 6) & (0x000007C0)));
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regValue |= MII_BUSY | ((priv->mii_clk_csr & 7) << 2);
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regValue |= MII_BUSY | ((priv->plat->clk_csr & 7) << 2);
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do {} while (((readl(priv->ioaddr + mii_address)) & MII_BUSY) == 1);
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writel(regValue, priv->ioaddr + mii_address);
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@ -85,7 +85,7 @@ static int stmmac_mdio_write(struct mii_bus *bus, int phyaddr, int phyreg,
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(((phyaddr << 11) & (0x0000F800)) | ((phyreg << 6) & (0x000007C0)))
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| MII_WRITE;
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value |= MII_BUSY | ((priv->mii_clk_csr & 7) << 2);
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value |= MII_BUSY | ((priv->plat->clk_csr & 7) << 2);
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/* Wait until any existing MII operation is complete */
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@ -114,7 +114,7 @@ static int stmmac_mdio_reset(struct mii_bus *bus)
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if (priv->phy_reset) {
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pr_debug("stmmac_mdio_reset: calling phy_reset\n");
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priv->phy_reset(priv->bsp_priv);
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priv->phy_reset(priv->plat->bsp_priv);
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}
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/* This is a workaround for problems with the STE101P PHY.
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@ -157,7 +157,7 @@ int stmmac_mdio_register(struct net_device *ndev)
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new_bus->read = &stmmac_mdio_read;
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new_bus->write = &stmmac_mdio_write;
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new_bus->reset = &stmmac_mdio_reset;
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snprintf(new_bus->id, MII_BUS_ID_SIZE, "%x", priv->bus_id);
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snprintf(new_bus->id, MII_BUS_ID_SIZE, "%x", priv->plat->bus_id);
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new_bus->priv = ndev;
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new_bus->irq = irqlist;
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new_bus->phy_mask = priv->phy_mask;
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