From 9eaf3ba5e0557eef9c3d9a64c72b9352cdc49d50 Mon Sep 17 00:00:00 2001 From: Alexandre Belloni Date: Tue, 31 Jul 2018 16:38:54 +0200 Subject: [PATCH] mips: dts: mscc: Add spi on Ocelot Add support for the SPI controller Signed-off-by: Alexandre Belloni Signed-off-by: Paul Burton Patchwork: https://patchwork.linux-mips.org/patch/20101/ Cc: Mark Brown Cc: James Hogan Cc: linux-spi@vger.kernel.org Cc: devicetree@vger.kernel.org Cc: linux-kernel@vger.kernel.org Cc: linux-mips@linux-mips.org Cc: Thomas Petazzoni Cc: Allan Nielsen --- arch/mips/boot/dts/mscc/ocelot.dtsi | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/arch/mips/boot/dts/mscc/ocelot.dtsi b/arch/mips/boot/dts/mscc/ocelot.dtsi index afe8fc9011ea..f7eb612b46ba 100644 --- a/arch/mips/boot/dts/mscc/ocelot.dtsi +++ b/arch/mips/boot/dts/mscc/ocelot.dtsi @@ -91,6 +91,17 @@ uart2: serial@100800 { status = "disabled"; }; + spi: spi@101000 { + compatible = "mscc,ocelot-spi", "snps,dw-apb-ssi"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x101000 0x100>, <0x3c 0x18>; + interrupts = <9>; + clocks = <&ahb_clk>; + + status = "disabled"; + }; + switch@1010000 { compatible = "mscc,vsc7514-switch"; reg = <0x1010000 0x10000>,