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Revert "MIPS: Avoid pipeline stalls on some MIPS32R2 cores."

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For a discussion, see http://patchwork.linux-mips.org/patch/9539/.

This reverts commit 625c0a2170.
This commit is contained in:
Ralf Baechle 2015-03-25 13:18:27 +01:00
parent f05ff43355
commit 9eaffa84a8
1 changed files with 2 additions and 19 deletions
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21
arch/mips/mm/tlbex.c
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@ -512,26 +512,9 @@ static void build_tlb_write_entry(u32 **p, struct uasm_label **l,
case tlb_indexed: tlbw = uasm_i_tlbwi; break;
}
if (cpu_has_mips_r2_exec_hazard) {
/*
* The architecture spec says an ehb is required here,
* but a number of cores do not have the hazard and
* using an ehb causes an expensive pipeline stall.
*/
switch (current_cpu_type()) {
case CPU_M14KC:
case CPU_74K:
case CPU_1074K:
case CPU_PROAPTIV:
case CPU_P5600:
case CPU_M5150:
case CPU_QEMU_GENERIC:
break;
default:
if (cpu_has_mips_r2_r6) {
if (cpu_has_mips_r2_exec_hazard)
uasm_i_ehb(p);
break;
}
tlbw(p);
return;
}