dt-bindings: pwm: tegra: Convert to json-schema

Convert the Tegra PWFM bindings from the free-form text format to
json-schema.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
This commit is contained in:
Thierry Reding 2022-11-17 22:42:48 +01:00
parent 1f8f3bf099
commit 9efc0fa519
2 changed files with 96 additions and 78 deletions

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Tegra SoC PWFM controller
Required properties:
- compatible: Must be:
- "nvidia,tegra20-pwm": for Tegra20
- "nvidia,tegra30-pwm", "nvidia,tegra20-pwm": for Tegra30
- "nvidia,tegra114-pwm", "nvidia,tegra20-pwm": for Tegra114
- "nvidia,tegra124-pwm", "nvidia,tegra20-pwm": for Tegra124
- "nvidia,tegra132-pwm", "nvidia,tegra20-pwm": for Tegra132
- "nvidia,tegra210-pwm", "nvidia,tegra20-pwm": for Tegra210
- "nvidia,tegra186-pwm": for Tegra186
- "nvidia,tegra194-pwm": for Tegra194
- "nvidia,tegra234-pwm", "nvidia,tegra194-pwm": for Tegra234
- reg: physical base address and length of the controller's registers
- #pwm-cells: should be 2. See pwm.yaml in this directory for a description of
the cells format.
- clocks: Must contain one entry, for the module clock.
See ../clocks/clock-bindings.txt for details.
- resets: Must contain an entry for each entry in reset-names.
See ../reset/reset.txt for details.
- reset-names: Must include the following entries:
- pwm
Optional properties:
============================
In some of the interface like PWM based regulator device, it is required
to configure the pins differently in different states, especially in suspend
state of the system. The configuration of pin is provided via the pinctrl
DT node as detailed in the pinctrl DT binding document
Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt
The PWM node will have following optional properties.
pinctrl-names: Pin state names. Must be "default" and "sleep".
pinctrl-0: phandle for the default/active state of pin configurations.
pinctrl-1: phandle for the sleep state of pin configurations.
Example:
pwm: pwm@7000a000 {
compatible = "nvidia,tegra20-pwm";
reg = <0x7000a000 0x100>;
#pwm-cells = <2>;
clocks = <&tegra_car 17>;
resets = <&tegra_car 17>;
reset-names = "pwm";
};
Example with the pin configuration for suspend and resume:
=========================================================
Suppose pin PE7 (On Tegra210) interfaced with the regulator device and
it requires PWM output to be tristated when system enters suspend.
Following will be DT binding to achieve this:
#include <dt-bindings/pinctrl/pinctrl-tegra.h>
pinmux@700008d4 {
pwm_active_state: pwm_active_state {
pe7 {
nvidia,pins = "pe7";
nvidia,tristate = <TEGRA_PIN_DISABLE>;
};
};
pwm_sleep_state: pwm_sleep_state {
pe7 {
nvidia,pins = "pe7";
nvidia,tristate = <TEGRA_PIN_ENABLE>;
};
};
};
pwm@7000a000 {
/* Mandatory PWM properties */
pinctrl-names = "default", "sleep";
pinctrl-0 = <&pwm_active_state>;
pinctrl-1 = <&pwm_sleep_state>;
};

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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/pwm/nvidia,tegra20-pwm.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: NVIDIA Tegra PWFM controller
maintainers:
- Thierry Reding <thierry.reding@gmail.com>
- Jon Hunter <jonathanh@nvidia.com>
properties:
compatible:
oneOf:
- enum:
- nvidia,tegra20-pwm
- nvidia,tegra186-pwm
- items:
- enum:
- nvidia,tegra30-pwm
- nvidia,tegra114-pwm
- nvidia,tegra124-pwm
- nvidia,tegra132-pwm
- nvidia,tegra210-pwm
- enum:
- nvidia,tegra20-pwm
- items:
- const: nvidia,tegra194-pwm
- const: nvidia,tegra186-pwm
- items:
- const: nvidia,tegra234-pwm
- const: nvidia,tegra194-pwm
reg:
maxItems: 1
clocks:
maxItems: 1
resets:
items:
- description: module reset
reset-names:
items:
- const: pwm
"#pwm-cells":
const: 2
pinctrl-names:
items:
- const: default
- const: sleep
pinctrl-0:
description: configuration for the default/active state
pinctrl-1:
description: configuration for the sleep state
operating-points-v2:
$ref: /schemas/types.yaml#/definitions/phandle
power-domains:
items:
- description: phandle to the core power domain
allOf:
- $ref: pwm.yaml
required:
- compatible
- reg
- clocks
- resets
- reset-names
additionalProperties: false
examples:
- |
#include <dt-bindings/clock/tegra20-car.h>
pwm: pwm@7000a000 {
compatible = "nvidia,tegra20-pwm";
reg = <0x7000a000 0x100>;
#pwm-cells = <2>;
clocks = <&tegra_car TEGRA20_CLK_PWM>;
resets = <&tegra_car 17>;
reset-names = "pwm";
};