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pinctrl: sh-pfc: r8a77990: Add R8A774C0 PFC support
Renesas RZ/G2E (a.k.a. r8a774c0) is pin compatible with R-Car E3 (a.k.a. r8a77990), however it doesn't have several automotive specific peripherals. Add a r8a77990 specific pin groups/functions along with common pin groups/functions for supporting both r8a77990 and r8a774c0 SoCs. Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Reviewed-by: Biju Das <biju.das@bp.renesas.com> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
This commit is contained in:
parent
c382e8ba7c
commit
9f2b76a2db
5 changed files with 201 additions and 151 deletions
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@ -60,6 +60,11 @@ config PINCTRL_PFC_R8A774A1
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depends on ARCH_R8A774A1
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select PINCTRL_SH_PFC
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config PINCTRL_PFC_R8A774C0
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def_bool y
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depends on ARCH_R8A774C0
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select PINCTRL_SH_PFC
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config PINCTRL_PFC_R8A7778
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def_bool y
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depends on ARCH_R8A7778
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@ -9,6 +9,7 @@ obj-$(CONFIG_PINCTRL_PFC_R8A7744) += pfc-r8a7791.o
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obj-$(CONFIG_PINCTRL_PFC_R8A7745) += pfc-r8a7794.o
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obj-$(CONFIG_PINCTRL_PFC_R8A77470) += pfc-r8a77470.o
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obj-$(CONFIG_PINCTRL_PFC_R8A774A1) += pfc-r8a7796.o
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obj-$(CONFIG_PINCTRL_PFC_R8A774C0) += pfc-r8a77990.o
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obj-$(CONFIG_PINCTRL_PFC_R8A7778) += pfc-r8a7778.o
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obj-$(CONFIG_PINCTRL_PFC_R8A7779) += pfc-r8a7779.o
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obj-$(CONFIG_PINCTRL_PFC_R8A7790) += pfc-r8a7790.o
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@ -518,6 +518,12 @@ static const struct of_device_id sh_pfc_of_table[] = {
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.data = &r8a774a1_pinmux_info,
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},
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#endif
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#ifdef CONFIG_PINCTRL_PFC_R8A774C0
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{
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.compatible = "renesas,pfc-r8a774c0",
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.data = &r8a774c0_pinmux_info,
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},
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#endif
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#ifdef CONFIG_PINCTRL_PFC_R8A7778
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{
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.compatible = "renesas,pfc-r8a7778",
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@ -2389,124 +2389,129 @@ static const unsigned int usb30_id_mux[] = {
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USB3HS0_ID_MARK,
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};
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static const struct sh_pfc_pin_group pinmux_groups[] = {
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SH_PFC_PIN_GROUP(avb_link),
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SH_PFC_PIN_GROUP(avb_magic),
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SH_PFC_PIN_GROUP(avb_phy_int),
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SH_PFC_PIN_GROUP(avb_mii),
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SH_PFC_PIN_GROUP(avb_avtp_pps),
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SH_PFC_PIN_GROUP(avb_avtp_match_a),
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SH_PFC_PIN_GROUP(avb_avtp_capture_a),
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SH_PFC_PIN_GROUP(du_rgb666),
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SH_PFC_PIN_GROUP(du_rgb888),
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SH_PFC_PIN_GROUP(du_clk_in_0),
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SH_PFC_PIN_GROUP(du_clk_in_1),
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SH_PFC_PIN_GROUP(du_clk_out_0),
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SH_PFC_PIN_GROUP(du_sync),
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SH_PFC_PIN_GROUP(du_disp_cde),
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SH_PFC_PIN_GROUP(du_cde),
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SH_PFC_PIN_GROUP(du_disp),
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SH_PFC_PIN_GROUP(i2c1_a),
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SH_PFC_PIN_GROUP(i2c1_b),
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SH_PFC_PIN_GROUP(i2c1_c),
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SH_PFC_PIN_GROUP(i2c1_d),
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SH_PFC_PIN_GROUP(i2c2_a),
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SH_PFC_PIN_GROUP(i2c2_b),
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SH_PFC_PIN_GROUP(i2c2_c),
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SH_PFC_PIN_GROUP(i2c2_d),
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SH_PFC_PIN_GROUP(i2c2_e),
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SH_PFC_PIN_GROUP(i2c4),
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SH_PFC_PIN_GROUP(i2c5),
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SH_PFC_PIN_GROUP(i2c6_a),
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SH_PFC_PIN_GROUP(i2c6_b),
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SH_PFC_PIN_GROUP(i2c7_a),
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SH_PFC_PIN_GROUP(i2c7_b),
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SH_PFC_PIN_GROUP(msiof0_clk),
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SH_PFC_PIN_GROUP(msiof0_sync),
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SH_PFC_PIN_GROUP(msiof0_ss1),
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SH_PFC_PIN_GROUP(msiof0_ss2),
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SH_PFC_PIN_GROUP(msiof0_txd),
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SH_PFC_PIN_GROUP(msiof0_rxd),
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SH_PFC_PIN_GROUP(msiof1_clk),
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SH_PFC_PIN_GROUP(msiof1_sync),
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SH_PFC_PIN_GROUP(msiof1_ss1),
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SH_PFC_PIN_GROUP(msiof1_ss2),
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SH_PFC_PIN_GROUP(msiof1_txd),
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SH_PFC_PIN_GROUP(msiof1_rxd),
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SH_PFC_PIN_GROUP(msiof2_clk_a),
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SH_PFC_PIN_GROUP(msiof2_sync_a),
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SH_PFC_PIN_GROUP(msiof2_ss1_a),
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SH_PFC_PIN_GROUP(msiof2_ss2_a),
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SH_PFC_PIN_GROUP(msiof2_txd_a),
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SH_PFC_PIN_GROUP(msiof2_rxd_a),
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SH_PFC_PIN_GROUP(msiof2_clk_b),
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SH_PFC_PIN_GROUP(msiof2_sync_b),
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SH_PFC_PIN_GROUP(msiof2_ss1_b),
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SH_PFC_PIN_GROUP(msiof2_ss2_b),
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SH_PFC_PIN_GROUP(msiof2_txd_b),
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SH_PFC_PIN_GROUP(msiof2_rxd_b),
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SH_PFC_PIN_GROUP(msiof3_clk_a),
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SH_PFC_PIN_GROUP(msiof3_sync_a),
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SH_PFC_PIN_GROUP(msiof3_ss1_a),
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SH_PFC_PIN_GROUP(msiof3_ss2_a),
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SH_PFC_PIN_GROUP(msiof3_txd_a),
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SH_PFC_PIN_GROUP(msiof3_rxd_a),
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SH_PFC_PIN_GROUP(msiof3_clk_b),
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SH_PFC_PIN_GROUP(msiof3_sync_b),
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SH_PFC_PIN_GROUP(msiof3_ss1_b),
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SH_PFC_PIN_GROUP(msiof3_txd_b),
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SH_PFC_PIN_GROUP(msiof3_rxd_b),
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SH_PFC_PIN_GROUP(pwm0_a),
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SH_PFC_PIN_GROUP(pwm0_b),
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SH_PFC_PIN_GROUP(pwm1_a),
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SH_PFC_PIN_GROUP(pwm1_b),
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SH_PFC_PIN_GROUP(pwm2_a),
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SH_PFC_PIN_GROUP(pwm2_b),
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SH_PFC_PIN_GROUP(pwm2_c),
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SH_PFC_PIN_GROUP(pwm3_a),
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SH_PFC_PIN_GROUP(pwm3_b),
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SH_PFC_PIN_GROUP(pwm3_c),
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SH_PFC_PIN_GROUP(pwm4_a),
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SH_PFC_PIN_GROUP(pwm4_b),
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SH_PFC_PIN_GROUP(pwm5_a),
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SH_PFC_PIN_GROUP(pwm5_b),
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SH_PFC_PIN_GROUP(pwm6_a),
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SH_PFC_PIN_GROUP(pwm6_b),
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SH_PFC_PIN_GROUP(scif0_data_a),
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SH_PFC_PIN_GROUP(scif0_clk_a),
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SH_PFC_PIN_GROUP(scif0_ctrl_a),
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SH_PFC_PIN_GROUP(scif0_data_b),
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SH_PFC_PIN_GROUP(scif0_clk_b),
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SH_PFC_PIN_GROUP(scif1_data),
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SH_PFC_PIN_GROUP(scif1_clk),
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SH_PFC_PIN_GROUP(scif1_ctrl),
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SH_PFC_PIN_GROUP(scif2_data_a),
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SH_PFC_PIN_GROUP(scif2_clk_a),
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SH_PFC_PIN_GROUP(scif2_data_b),
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SH_PFC_PIN_GROUP(scif3_data_a),
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SH_PFC_PIN_GROUP(scif3_clk_a),
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SH_PFC_PIN_GROUP(scif3_ctrl_a),
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SH_PFC_PIN_GROUP(scif3_data_b),
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SH_PFC_PIN_GROUP(scif3_data_c),
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SH_PFC_PIN_GROUP(scif3_clk_c),
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SH_PFC_PIN_GROUP(scif4_data_a),
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SH_PFC_PIN_GROUP(scif4_clk_a),
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SH_PFC_PIN_GROUP(scif4_ctrl_a),
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SH_PFC_PIN_GROUP(scif4_data_b),
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SH_PFC_PIN_GROUP(scif4_clk_b),
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SH_PFC_PIN_GROUP(scif4_data_c),
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SH_PFC_PIN_GROUP(scif4_ctrl_c),
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SH_PFC_PIN_GROUP(scif5_data_a),
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SH_PFC_PIN_GROUP(scif5_clk_a),
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SH_PFC_PIN_GROUP(scif5_data_b),
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SH_PFC_PIN_GROUP(scif5_data_c),
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SH_PFC_PIN_GROUP(scif_clk_a),
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SH_PFC_PIN_GROUP(scif_clk_b),
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SH_PFC_PIN_GROUP(usb0_a),
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SH_PFC_PIN_GROUP(usb0_b),
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SH_PFC_PIN_GROUP(usb0_id),
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SH_PFC_PIN_GROUP(usb30),
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SH_PFC_PIN_GROUP(usb30_id),
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static const struct {
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struct sh_pfc_pin_group common[117];
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struct sh_pfc_pin_group r8a77990[0];
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} pinmux_groups = {
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.common = {
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SH_PFC_PIN_GROUP(avb_link),
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SH_PFC_PIN_GROUP(avb_magic),
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SH_PFC_PIN_GROUP(avb_phy_int),
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SH_PFC_PIN_GROUP(avb_mii),
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SH_PFC_PIN_GROUP(avb_avtp_pps),
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SH_PFC_PIN_GROUP(avb_avtp_match_a),
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SH_PFC_PIN_GROUP(avb_avtp_capture_a),
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SH_PFC_PIN_GROUP(du_rgb666),
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SH_PFC_PIN_GROUP(du_rgb888),
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SH_PFC_PIN_GROUP(du_clk_in_0),
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SH_PFC_PIN_GROUP(du_clk_in_1),
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SH_PFC_PIN_GROUP(du_clk_out_0),
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SH_PFC_PIN_GROUP(du_sync),
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SH_PFC_PIN_GROUP(du_disp_cde),
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SH_PFC_PIN_GROUP(du_cde),
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SH_PFC_PIN_GROUP(du_disp),
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SH_PFC_PIN_GROUP(i2c1_a),
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SH_PFC_PIN_GROUP(i2c1_b),
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SH_PFC_PIN_GROUP(i2c1_c),
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SH_PFC_PIN_GROUP(i2c1_d),
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SH_PFC_PIN_GROUP(i2c2_a),
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SH_PFC_PIN_GROUP(i2c2_b),
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SH_PFC_PIN_GROUP(i2c2_c),
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SH_PFC_PIN_GROUP(i2c2_d),
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SH_PFC_PIN_GROUP(i2c2_e),
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SH_PFC_PIN_GROUP(i2c4),
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SH_PFC_PIN_GROUP(i2c5),
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SH_PFC_PIN_GROUP(i2c6_a),
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SH_PFC_PIN_GROUP(i2c6_b),
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SH_PFC_PIN_GROUP(i2c7_a),
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SH_PFC_PIN_GROUP(i2c7_b),
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SH_PFC_PIN_GROUP(msiof0_clk),
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SH_PFC_PIN_GROUP(msiof0_sync),
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SH_PFC_PIN_GROUP(msiof0_ss1),
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SH_PFC_PIN_GROUP(msiof0_ss2),
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SH_PFC_PIN_GROUP(msiof0_txd),
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SH_PFC_PIN_GROUP(msiof0_rxd),
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SH_PFC_PIN_GROUP(msiof1_clk),
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SH_PFC_PIN_GROUP(msiof1_sync),
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SH_PFC_PIN_GROUP(msiof1_ss1),
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SH_PFC_PIN_GROUP(msiof1_ss2),
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SH_PFC_PIN_GROUP(msiof1_txd),
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SH_PFC_PIN_GROUP(msiof1_rxd),
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SH_PFC_PIN_GROUP(msiof2_clk_a),
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SH_PFC_PIN_GROUP(msiof2_sync_a),
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SH_PFC_PIN_GROUP(msiof2_ss1_a),
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SH_PFC_PIN_GROUP(msiof2_ss2_a),
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SH_PFC_PIN_GROUP(msiof2_txd_a),
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SH_PFC_PIN_GROUP(msiof2_rxd_a),
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SH_PFC_PIN_GROUP(msiof2_clk_b),
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SH_PFC_PIN_GROUP(msiof2_sync_b),
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SH_PFC_PIN_GROUP(msiof2_ss1_b),
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SH_PFC_PIN_GROUP(msiof2_ss2_b),
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SH_PFC_PIN_GROUP(msiof2_txd_b),
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SH_PFC_PIN_GROUP(msiof2_rxd_b),
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SH_PFC_PIN_GROUP(msiof3_clk_a),
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SH_PFC_PIN_GROUP(msiof3_sync_a),
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SH_PFC_PIN_GROUP(msiof3_ss1_a),
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SH_PFC_PIN_GROUP(msiof3_ss2_a),
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SH_PFC_PIN_GROUP(msiof3_txd_a),
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SH_PFC_PIN_GROUP(msiof3_rxd_a),
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SH_PFC_PIN_GROUP(msiof3_clk_b),
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SH_PFC_PIN_GROUP(msiof3_sync_b),
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SH_PFC_PIN_GROUP(msiof3_ss1_b),
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SH_PFC_PIN_GROUP(msiof3_txd_b),
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SH_PFC_PIN_GROUP(msiof3_rxd_b),
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SH_PFC_PIN_GROUP(pwm0_a),
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SH_PFC_PIN_GROUP(pwm0_b),
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SH_PFC_PIN_GROUP(pwm1_a),
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SH_PFC_PIN_GROUP(pwm1_b),
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SH_PFC_PIN_GROUP(pwm2_a),
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SH_PFC_PIN_GROUP(pwm2_b),
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SH_PFC_PIN_GROUP(pwm2_c),
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SH_PFC_PIN_GROUP(pwm3_a),
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SH_PFC_PIN_GROUP(pwm3_b),
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SH_PFC_PIN_GROUP(pwm3_c),
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SH_PFC_PIN_GROUP(pwm4_a),
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SH_PFC_PIN_GROUP(pwm4_b),
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SH_PFC_PIN_GROUP(pwm5_a),
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SH_PFC_PIN_GROUP(pwm5_b),
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SH_PFC_PIN_GROUP(pwm6_a),
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SH_PFC_PIN_GROUP(pwm6_b),
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SH_PFC_PIN_GROUP(scif0_data_a),
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SH_PFC_PIN_GROUP(scif0_clk_a),
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SH_PFC_PIN_GROUP(scif0_ctrl_a),
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SH_PFC_PIN_GROUP(scif0_data_b),
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SH_PFC_PIN_GROUP(scif0_clk_b),
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SH_PFC_PIN_GROUP(scif1_data),
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SH_PFC_PIN_GROUP(scif1_clk),
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SH_PFC_PIN_GROUP(scif1_ctrl),
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SH_PFC_PIN_GROUP(scif2_data_a),
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SH_PFC_PIN_GROUP(scif2_clk_a),
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SH_PFC_PIN_GROUP(scif2_data_b),
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SH_PFC_PIN_GROUP(scif3_data_a),
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SH_PFC_PIN_GROUP(scif3_clk_a),
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SH_PFC_PIN_GROUP(scif3_ctrl_a),
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SH_PFC_PIN_GROUP(scif3_data_b),
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SH_PFC_PIN_GROUP(scif3_data_c),
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SH_PFC_PIN_GROUP(scif3_clk_c),
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SH_PFC_PIN_GROUP(scif4_data_a),
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SH_PFC_PIN_GROUP(scif4_clk_a),
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SH_PFC_PIN_GROUP(scif4_ctrl_a),
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SH_PFC_PIN_GROUP(scif4_data_b),
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SH_PFC_PIN_GROUP(scif4_clk_b),
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SH_PFC_PIN_GROUP(scif4_data_c),
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SH_PFC_PIN_GROUP(scif4_ctrl_c),
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SH_PFC_PIN_GROUP(scif5_data_a),
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SH_PFC_PIN_GROUP(scif5_clk_a),
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SH_PFC_PIN_GROUP(scif5_data_b),
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SH_PFC_PIN_GROUP(scif5_data_c),
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SH_PFC_PIN_GROUP(scif_clk_a),
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SH_PFC_PIN_GROUP(scif_clk_b),
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SH_PFC_PIN_GROUP(usb0_a),
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SH_PFC_PIN_GROUP(usb0_b),
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SH_PFC_PIN_GROUP(usb0_id),
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SH_PFC_PIN_GROUP(usb30),
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SH_PFC_PIN_GROUP(usb30_id),
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}
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};
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static const char * const avb_groups[] = {
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@ -2710,35 +2715,40 @@ static const char * const usb30_groups[] = {
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"usb30_id",
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};
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static const struct sh_pfc_function pinmux_functions[] = {
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SH_PFC_FUNCTION(avb),
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SH_PFC_FUNCTION(du),
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SH_PFC_FUNCTION(i2c1),
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SH_PFC_FUNCTION(i2c2),
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SH_PFC_FUNCTION(i2c4),
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SH_PFC_FUNCTION(i2c5),
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SH_PFC_FUNCTION(i2c6),
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SH_PFC_FUNCTION(i2c7),
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SH_PFC_FUNCTION(msiof0),
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SH_PFC_FUNCTION(msiof1),
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SH_PFC_FUNCTION(msiof2),
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SH_PFC_FUNCTION(msiof3),
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SH_PFC_FUNCTION(pwm0),
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SH_PFC_FUNCTION(pwm1),
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SH_PFC_FUNCTION(pwm2),
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SH_PFC_FUNCTION(pwm3),
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SH_PFC_FUNCTION(pwm4),
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SH_PFC_FUNCTION(pwm5),
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SH_PFC_FUNCTION(pwm6),
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SH_PFC_FUNCTION(scif0),
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SH_PFC_FUNCTION(scif1),
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SH_PFC_FUNCTION(scif2),
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SH_PFC_FUNCTION(scif3),
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SH_PFC_FUNCTION(scif4),
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SH_PFC_FUNCTION(scif5),
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SH_PFC_FUNCTION(scif_clk),
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SH_PFC_FUNCTION(usb0),
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SH_PFC_FUNCTION(usb30),
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static const struct {
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struct sh_pfc_function common[28];
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struct sh_pfc_function r8a77990[0];
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} pinmux_functions = {
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.common = {
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SH_PFC_FUNCTION(avb),
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SH_PFC_FUNCTION(du),
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SH_PFC_FUNCTION(i2c1),
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SH_PFC_FUNCTION(i2c2),
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SH_PFC_FUNCTION(i2c4),
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SH_PFC_FUNCTION(i2c5),
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SH_PFC_FUNCTION(i2c6),
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SH_PFC_FUNCTION(i2c7),
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SH_PFC_FUNCTION(msiof0),
|
||||
SH_PFC_FUNCTION(msiof1),
|
||||
SH_PFC_FUNCTION(msiof2),
|
||||
SH_PFC_FUNCTION(msiof3),
|
||||
SH_PFC_FUNCTION(pwm0),
|
||||
SH_PFC_FUNCTION(pwm1),
|
||||
SH_PFC_FUNCTION(pwm2),
|
||||
SH_PFC_FUNCTION(pwm3),
|
||||
SH_PFC_FUNCTION(pwm4),
|
||||
SH_PFC_FUNCTION(pwm5),
|
||||
SH_PFC_FUNCTION(pwm6),
|
||||
SH_PFC_FUNCTION(scif0),
|
||||
SH_PFC_FUNCTION(scif1),
|
||||
SH_PFC_FUNCTION(scif2),
|
||||
SH_PFC_FUNCTION(scif3),
|
||||
SH_PFC_FUNCTION(scif4),
|
||||
SH_PFC_FUNCTION(scif5),
|
||||
SH_PFC_FUNCTION(scif_clk),
|
||||
SH_PFC_FUNCTION(usb0),
|
||||
SH_PFC_FUNCTION(usb30),
|
||||
}
|
||||
};
|
||||
|
||||
static const struct pinmux_cfg_reg pinmux_config_regs[] = {
|
||||
|
@ -3464,6 +3474,30 @@ static const struct sh_pfc_soc_operations r8a77990_pinmux_ops = {
|
|||
.set_bias = r8a77990_pinmux_set_bias,
|
||||
};
|
||||
|
||||
#ifdef CONFIG_PINCTRL_PFC_R8A774C0
|
||||
const struct sh_pfc_soc_info r8a774c0_pinmux_info = {
|
||||
.name = "r8a774c0_pfc",
|
||||
.ops = &r8a77990_pinmux_ops,
|
||||
.unlock_reg = 0xe6060000, /* PMMR */
|
||||
|
||||
.function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END },
|
||||
|
||||
.pins = pinmux_pins,
|
||||
.nr_pins = ARRAY_SIZE(pinmux_pins),
|
||||
.groups = pinmux_groups.common,
|
||||
.nr_groups = ARRAY_SIZE(pinmux_groups.common),
|
||||
.functions = pinmux_functions.common,
|
||||
.nr_functions = ARRAY_SIZE(pinmux_functions.common),
|
||||
|
||||
.cfg_regs = pinmux_config_regs,
|
||||
.bias_regs = pinmux_bias_regs,
|
||||
|
||||
.pinmux_data = pinmux_data,
|
||||
.pinmux_data_size = ARRAY_SIZE(pinmux_data),
|
||||
};
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_PINCTRL_PFC_R8A77990
|
||||
const struct sh_pfc_soc_info r8a77990_pinmux_info = {
|
||||
.name = "r8a77990_pfc",
|
||||
.ops = &r8a77990_pinmux_ops,
|
||||
|
@ -3473,10 +3507,12 @@ const struct sh_pfc_soc_info r8a77990_pinmux_info = {
|
|||
|
||||
.pins = pinmux_pins,
|
||||
.nr_pins = ARRAY_SIZE(pinmux_pins),
|
||||
.groups = pinmux_groups,
|
||||
.nr_groups = ARRAY_SIZE(pinmux_groups),
|
||||
.functions = pinmux_functions,
|
||||
.nr_functions = ARRAY_SIZE(pinmux_functions),
|
||||
.groups = pinmux_groups.common,
|
||||
.nr_groups = ARRAY_SIZE(pinmux_groups.common) +
|
||||
ARRAY_SIZE(pinmux_groups.r8a77990),
|
||||
.functions = pinmux_functions.common,
|
||||
.nr_functions = ARRAY_SIZE(pinmux_functions.common) +
|
||||
ARRAY_SIZE(pinmux_functions.r8a77990),
|
||||
|
||||
.cfg_regs = pinmux_config_regs,
|
||||
.bias_regs = pinmux_bias_regs,
|
||||
|
@ -3484,3 +3520,4 @@ const struct sh_pfc_soc_info r8a77990_pinmux_info = {
|
|||
.pinmux_data = pinmux_data,
|
||||
.pinmux_data_size = ARRAY_SIZE(pinmux_data),
|
||||
};
|
||||
#endif
|
||||
|
|
|
@ -274,6 +274,7 @@ extern const struct sh_pfc_soc_info r8a7744_pinmux_info;
|
|||
extern const struct sh_pfc_soc_info r8a7745_pinmux_info;
|
||||
extern const struct sh_pfc_soc_info r8a77470_pinmux_info;
|
||||
extern const struct sh_pfc_soc_info r8a774a1_pinmux_info;
|
||||
extern const struct sh_pfc_soc_info r8a774c0_pinmux_info;
|
||||
extern const struct sh_pfc_soc_info r8a7778_pinmux_info;
|
||||
extern const struct sh_pfc_soc_info r8a7779_pinmux_info;
|
||||
extern const struct sh_pfc_soc_info r8a7790_pinmux_info;
|
||||
|
|
Loading…
Reference in a new issue