mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
synced 2024-08-21 00:10:09 +00:00
Merge branch 'merge' of git://git.kernel.org/pub/scm/linux/kernel/git/paulus/powerpc
* 'merge' of git://git.kernel.org/pub/scm/linux/kernel/git/paulus/powerpc: (21 commits) [POWERPC] spusched: Fix initial timeslice calculation [POWERPC] spufs: Fix incorrect initialization of cbe_spu_info.spus [POWERPC] Fix Maple platform ISA bus [POWERPC] Make pci_iounmap actually unmap things [POWERPC] Add function to check if address is an IO port [POWERPC] Fix Pegasos keyboard detection [POWERPC] iSeries: Fix section mismatch warning in lpevents [POWERPC] iSeries: Fix section mismatch warnings [POWERPC] iSeries: We need vio_enable_interrupts [POWERPC] Fix RTC and device tree on linkstation machines [POWERPC] Add of_register_i2c_devices() [POWERPC] Fix loop with unsigned long counter variable [POWERPC] Fix register labels on show_regs() message for 4xx/Book-E [POWERPC] Only allow building of BootX text support on PPC_MULTIPLATFORM [POWERPC] Fix the ability to reset on MPC8544 DS and MPC8568 MDS boards [POWERPC] Fix mpc7448hpc2 tsi108 device_type bug [POWREPC] Fixup a number of modpost warnings on ppc32 [POWERPC] Fix ethernet PHY support on MPC8544 DS [POWERPC] Don't try to allocate resources for a Freescale POWERPC PHB Revert "[POWERPC] Don't complain if size-cells == 0 in prom_parse()" ...
This commit is contained in:
Linus Torvalds
commit
9f5577d815
27 changed files with 221 additions and 37 deletions
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@ -134,7 +134,7 @@ config BDI_SWITCH
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config BOOTX_TEXT
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bool "Support for early boot text console (BootX or OpenFirmware only)"
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depends PPC_OF
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depends PPC_OF && PPC_MULTIPLATFORM
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help
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Say Y here to see progress messages from the boot firmware in text
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mode. Requires either BootX or Open Firmware.
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@ -33,12 +33,10 @@ cpus {
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PowerPC,603e { /* Really 8241 */
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device_type = "cpu";
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reg = <0>;
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clock-frequency = <bebc200>; /* Fixed by bootwrapper */
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timebase-frequency = <1743000>; /* Fixed by bootwrapper */
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bus-frequency = <0>; /* From bootloader */
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clock-frequency = <bebc200>; /* Fixed by bootloader */
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timebase-frequency = <1743000>; /* Fixed by bootloader */
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bus-frequency = <0>; /* Fixed by bootloader */
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/* Following required by dtc but not used */
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i-cache-line-size = <0>;
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d-cache-line-size = <0>;
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i-cache-size = <4000>;
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d-cache-size = <4000>;
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};
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@ -64,11 +62,19 @@ fec00000 fec00000 00300000 /* pci cfg regs */
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fef00000 fef00000 00100000>; /* pci iack */
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i2c@80003000 {
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#address-cells = <1>;
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#size-cells = <0>;
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device_type = "i2c";
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compatible = "fsl-i2c";
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reg = <80003000 1000>;
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interrupts = <5 2>;
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interrupt-parent = <&mpic>;
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rtc@32 {
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device_type = "rtc";
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compatible = "ricoh,rs5c372b";
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reg = <32>;
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};
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};
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serial@80004500 {
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@ -91,7 +97,7 @@ serial@80004600 {
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interrupt-parent = <&mpic>;
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};
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mpic: pic@80040000 {
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mpic: interrupt-controller@80040000 {
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#interrupt-cells = <2>;
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#address-cells = <0>;
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device_type = "open-pic";
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@ -33,12 +33,10 @@ cpus {
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PowerPC,603e { /* Really 8241 */
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device_type = "cpu";
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reg = <0>;
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clock-frequency = <fdad680>; /* Fixed by bootwrapper */
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timebase-frequency = <1F04000>; /* Fixed by bootwrapper */
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bus-frequency = <0>; /* From bootloader */
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clock-frequency = <fdad680>; /* Fixed by bootloader */
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timebase-frequency = <1F04000>; /* Fixed by bootloader */
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bus-frequency = <0>; /* Fixed by bootloader */
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/* Following required by dtc but not used */
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i-cache-line-size = <0>;
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d-cache-line-size = <0>;
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i-cache-size = <4000>;
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d-cache-size = <4000>;
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};
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@ -64,11 +62,19 @@ fec00000 fec00000 00300000 /* pci cfg regs */
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fef00000 fef00000 00100000>; /* pci iack */
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i2c@80003000 {
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#address-cells = <1>;
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#size-cells = <0>;
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device_type = "i2c";
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compatible = "fsl-i2c";
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reg = <80003000 1000>;
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interrupts = <5 2>;
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interrupt-parent = <&mpic>;
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rtc@32 {
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device_type = "rtc";
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compatible = "ricoh,rs5c372b";
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reg = <32>;
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};
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};
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serial@80004500 {
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@ -91,8 +97,7 @@ serial@80004600 {
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interrupt-parent = <&mpic>;
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};
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mpic: pic@80040000 {
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interrupt-parent = <&mpic>;
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mpic: interrupt-controller@80040000 {
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#interrupt-cells = <2>;
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#address-cells = <0>;
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device_type = "open-pic";
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@ -45,7 +45,7 @@ tsi108@c0000000 {
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#address-cells = <1>;
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#size-cells = <1>;
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#interrupt-cells = <2>;
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device_type = "tsi108-bridge";
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device_type = "tsi-bridge";
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ranges = <00000000 c0000000 00010000>;
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reg = <c0000000 00010000>;
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bus-frequency = <0>;
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@ -104,6 +104,7 @@ ethernet@24000 {
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interrupts = <1d 2 1e 2 22 2>;
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interrupt-parent = <&mpic>;
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phy-handle = <&phy0>;
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phy-connection-type = "rgmii-id";
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};
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ethernet@26000 {
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@ -117,6 +118,7 @@ ethernet@26000 {
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interrupts = <1f 2 20 2 21 2>;
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interrupt-parent = <&mpic>;
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phy-handle = <&phy1>;
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phy-connection-type = "rgmii-id";
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};
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serial@4500 {
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@ -348,6 +350,12 @@ gpio@400 {
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};
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global-utilities@e0000 { //global utilities block
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compatible = "fsl,mpc8548-guts";
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reg = <e0000 1000>;
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fsl,has-rstcr;
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};
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mpic: pic@40000 {
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clock-frequency = <0>;
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interrupt-controller;
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@ -170,6 +170,12 @@ serial@4500 {
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interrupt-parent = <&mpic>;
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};
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global-utilities@e0000 { //global utilities block
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compatible = "fsl,mpc8548-guts";
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reg = <e0000 1000>;
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fsl,has-rstcr;
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};
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pci@8000 {
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interrupt-map-mask = <f800 0 0 7>;
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interrupt-map = <
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@ -809,8 +809,9 @@ system_reset_iSeries:
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mtmsrd r24 /* RI on */
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lhz r24,PACAPACAINDEX(r13) /* Get processor # */
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cmpwi 0,r24,0 /* Are we processor 0? */
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beq .__start_initialization_iSeries /* Start up the first processor */
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mfspr r4,SPRN_CTRLF
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bne 1f
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b .__start_initialization_iSeries /* Start up the first processor */
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1: mfspr r4,SPRN_CTRLF
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li r5,CTRL_RUNLATCH /* Turn off the run light */
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andc r4,r4,r5
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mtspr SPRN_CTRLT,r4
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@ -1611,7 +1612,7 @@ _GLOBAL(generic_secondary_smp_init)
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#endif
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#ifdef CONFIG_PPC_ISERIES
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_STATIC(__start_initialization_iSeries)
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_INIT_STATIC(__start_initialization_iSeries)
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/* Clear out the BSS */
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LOAD_REG_IMMEDIATE(r11,__bss_stop)
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LOAD_REG_IMMEDIATE(r8,__bss_start)
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@ -7,6 +7,7 @@
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#include <linux/pci.h>
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#include <linux/mm.h>
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#include <asm/io.h>
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#include <asm/pci-bridge.h>
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/*
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* Here comes the ppc64 implementation of the IOMAP
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@ -136,7 +137,12 @@ void __iomem *pci_iomap(struct pci_dev *dev, int bar, unsigned long max)
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void pci_iounmap(struct pci_dev *dev, void __iomem *addr)
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{
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/* Nothing to do */
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if (isa_vaddr_is_ioport(addr))
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return;
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if (pcibios_vaddr_is_ioport(addr))
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return;
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iounmap(addr);
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}
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EXPORT_SYMBOL(pci_iomap);
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EXPORT_SYMBOL(pci_iounmap);
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@ -418,10 +418,10 @@ irq_hw_number_t virq_to_hw(unsigned int virq)
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}
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EXPORT_SYMBOL_GPL(virq_to_hw);
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struct irq_host *irq_alloc_host(unsigned int revmap_type,
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unsigned int revmap_arg,
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struct irq_host_ops *ops,
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irq_hw_number_t inval_irq)
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__init_refok struct irq_host *irq_alloc_host(unsigned int revmap_type,
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unsigned int revmap_arg,
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struct irq_host_ops *ops,
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irq_hw_number_t inval_irq)
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{
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struct irq_host *host;
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unsigned int size = sizeof(struct irq_host);
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@ -65,7 +65,7 @@ static void __devinit pci_setup_pci_controller(struct pci_controller *hose)
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spin_unlock(&hose_spinlock);
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}
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struct pci_controller * pcibios_alloc_controller(struct device_node *dev)
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__init_refok struct pci_controller * pcibios_alloc_controller(struct device_node *dev)
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{
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struct pci_controller *phb;
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@ -101,6 +101,29 @@ void pcibios_free_controller(struct pci_controller *phb)
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kfree(phb);
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}
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int pcibios_vaddr_is_ioport(void __iomem *address)
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{
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int ret = 0;
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struct pci_controller *hose;
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unsigned long size;
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spin_lock(&hose_spinlock);
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list_for_each_entry(hose, &hose_list, list_node) {
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#ifdef CONFIG_PPC64
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size = hose->pci_io_size;
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#else
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size = hose->io_resource.end - hose->io_resource.start + 1;
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#endif
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if (address >= hose->io_base_virt &&
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address < (hose->io_base_virt + size)) {
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ret = 1;
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break;
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}
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}
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spin_unlock(&hose_spinlock);
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return ret;
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}
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/*
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* Return the domain number for this bus.
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*/
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@ -59,6 +59,24 @@ LIST_HEAD(hose_list);
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static int pci_bus_count;
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static void
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fixup_hide_host_resource_fsl(struct pci_dev* dev)
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{
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int i, class = dev->class >> 8;
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if ((class == PCI_CLASS_PROCESSOR_POWERPC) &&
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(dev->hdr_type == PCI_HEADER_TYPE_NORMAL) &&
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(dev->bus->parent == NULL)) {
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for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
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dev->resource[i].start = 0;
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dev->resource[i].end = 0;
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dev->resource[i].flags = 0;
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}
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}
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}
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DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_MOTOROLA, PCI_ANY_ID, fixup_hide_host_resource_fsl);
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DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_FREESCALE, PCI_ANY_ID, fixup_hide_host_resource_fsl);
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static void
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fixup_broken_pcnet32(struct pci_dev* dev)
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{
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@ -1229,7 +1247,7 @@ pcibios_init(void)
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subsys_initcall(pcibios_init);
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void __init pcibios_fixup_bus(struct pci_bus *bus)
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void pcibios_fixup_bus(struct pci_bus *bus)
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{
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struct pci_controller *hose = (struct pci_controller *) bus->sysdata;
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unsigned long io_offset;
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|
|
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|||
|
|
@ -423,7 +423,11 @@ void show_regs(struct pt_regs * regs)
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printk(" CR: %08lx XER: %08lx\n", regs->ccr, regs->xer);
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trap = TRAP(regs);
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if (trap == 0x300 || trap == 0x600)
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#if defined(CONFIG_4xx) || defined(CONFIG_BOOKE)
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printk("DEAR: "REG", ESR: "REG"\n", regs->dar, regs->dsisr);
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#else
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printk("DAR: "REG", DSISR: "REG"\n", regs->dar, regs->dsisr);
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#endif
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printk("TASK = %p[%d] '%s' THREAD: %p",
|
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current, current->pid, current->comm, task_thread_info(current));
|
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|
||||
|
|
|
|||
|
|
@ -24,7 +24,7 @@
|
|||
/* Max address size we deal with */
|
||||
#define OF_MAX_ADDR_CELLS 4
|
||||
#define OF_CHECK_COUNTS(na, ns) ((na) > 0 && (na) <= OF_MAX_ADDR_CELLS && \
|
||||
(ns) >= 0)
|
||||
(ns) > 0)
|
||||
|
||||
static struct of_bus *of_match_bus(struct device_node *np);
|
||||
static int __of_address_to_resource(struct device_node *dev,
|
||||
|
|
|
|||
|
|
@ -496,6 +496,10 @@ int check_legacy_ioport(unsigned long base_port)
|
|||
break;
|
||||
}
|
||||
np = of_find_node_by_type(NULL, "8042");
|
||||
/* Pegasos has no device_type on its 8042 node, look for the
|
||||
* name instead */
|
||||
if (!np)
|
||||
np = of_find_node_by_name(NULL, "8042");
|
||||
break;
|
||||
case FDC_BASE: /* FDC1 */
|
||||
np = of_find_node_by_type(NULL, "fdc");
|
||||
|
|
|
|||
|
|
@ -155,7 +155,7 @@ static int early_console_initialized;
|
|||
* Called by setup_system after ppc_md->probe and ppc_md->early_init.
|
||||
* Call it again after setting udbg_putc in ppc_md->setup_arch.
|
||||
*/
|
||||
void register_early_udbg_console(void)
|
||||
void __init register_early_udbg_console(void)
|
||||
{
|
||||
if (early_console_initialized)
|
||||
return;
|
||||
|
|
|
|||
|
|
@ -138,8 +138,8 @@ void __init lmb_analyze(void)
|
|||
static long __init lmb_add_region(struct lmb_region *rgn, unsigned long base,
|
||||
unsigned long size)
|
||||
{
|
||||
unsigned long i, coalesced = 0;
|
||||
long adjacent;
|
||||
unsigned long coalesced = 0;
|
||||
long adjacent, i;
|
||||
|
||||
/* First try and coalesce this LMB with another. */
|
||||
for (i=0; i < rgn->cnt; i++) {
|
||||
|
|
|
|||
|
|
@ -59,7 +59,8 @@ struct spu_context *alloc_spu_context(struct spu_gang *gang)
|
|||
INIT_LIST_HEAD(&ctx->aff_list);
|
||||
if (gang)
|
||||
spu_gang_add_ctx(gang, ctx);
|
||||
ctx->cpus_allowed = current->cpus_allowed;
|
||||
|
||||
__spu_update_sched_info(ctx);
|
||||
spu_set_timeslice(ctx);
|
||||
ctx->stats.util_state = SPU_UTIL_IDLE_LOADED;
|
||||
|
||||
|
|
|
|||
|
|
@ -312,6 +312,7 @@ long spufs_run_spu(struct spu_context *ctx, u32 *npc, u32 *event)
|
|||
spu_acquire(ctx);
|
||||
if (ctx->state == SPU_STATE_SAVED) {
|
||||
__spu_update_sched_info(ctx);
|
||||
spu_set_timeslice(ctx);
|
||||
|
||||
ret = spu_activate(ctx, 0);
|
||||
if (ret) {
|
||||
|
|
@ -322,6 +323,9 @@ long spufs_run_spu(struct spu_context *ctx, u32 *npc, u32 *event)
|
|||
/*
|
||||
* We have to update the scheduling priority under active_mutex
|
||||
* to protect against find_victim().
|
||||
*
|
||||
* No need to update the timeslice ASAP, it will get updated
|
||||
* once the current one has expired.
|
||||
*/
|
||||
spu_update_sched_info(ctx);
|
||||
}
|
||||
|
|
|
|||
|
|
@ -927,10 +927,6 @@ int __init spu_sched_init(void)
|
|||
INIT_LIST_HEAD(&spu_prio->runq[i]);
|
||||
__clear_bit(i, spu_prio->bitmap);
|
||||
}
|
||||
for (i = 0; i < MAX_NUMNODES; i++) {
|
||||
mutex_init(&cbe_spu_info[i].list_mutex);
|
||||
INIT_LIST_HEAD(&cbe_spu_info[i].spus);
|
||||
}
|
||||
spin_lock_init(&spu_prio->runq_lock);
|
||||
|
||||
setup_timer(&spusched_timer, spusched_wake, 0);
|
||||
|
|
|
|||
|
|
@ -182,7 +182,7 @@ static int set_spread_lpevents(char *str)
|
|||
}
|
||||
__setup("spread_lpevents=", set_spread_lpevents);
|
||||
|
||||
void setup_hvlpevent_queue(void)
|
||||
void __init setup_hvlpevent_queue(void)
|
||||
{
|
||||
void *eventStack;
|
||||
|
||||
|
|
|
|||
|
|
@ -490,6 +490,9 @@ static int __init maple_add_bridge(struct device_node *dev)
|
|||
/* Fixup "bus-range" OF property */
|
||||
fixup_bus_range(dev);
|
||||
|
||||
/* Check for legacy IOs */
|
||||
isa_bridge_find_early(hose);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -107,7 +107,7 @@ void __init setup_pci_cmd(struct pci_controller *hose)
|
|||
}
|
||||
}
|
||||
|
||||
static void __devinit quirk_fsl_pcie_transparent(struct pci_dev *dev)
|
||||
static void __init quirk_fsl_pcie_transparent(struct pci_dev *dev)
|
||||
{
|
||||
struct resource *res;
|
||||
int i, res_idx = PCI_BRIDGE_RESOURCES;
|
||||
|
|
@ -216,7 +216,7 @@ int __init fsl_add_bridge(struct device_node *dev, int is_primary)
|
|||
|
||||
/* check PCI express link status */
|
||||
if (early_find_capability(hose, 0, 0, PCI_CAP_ID_EXP)) {
|
||||
hose->indirect_type = PPC_INDIRECT_TYPE_EXT_REG |
|
||||
hose->indirect_type |= PPC_INDIRECT_TYPE_EXT_REG |
|
||||
PPC_INDIRECT_TYPE_SURPRESS_PRIMARY_BUS;
|
||||
if (fsl_pcie_check_link(hose))
|
||||
hose->indirect_type |= PPC_INDIRECT_TYPE_NO_PCIE_LINK;
|
||||
|
|
|
|||
|
|
@ -305,6 +305,64 @@ static int __init gfar_of_init(void)
|
|||
|
||||
arch_initcall(gfar_of_init);
|
||||
|
||||
#ifdef CONFIG_I2C_BOARDINFO
|
||||
#include <linux/i2c.h>
|
||||
struct i2c_driver_device {
|
||||
char *of_device;
|
||||
char *i2c_driver;
|
||||
char *i2c_type;
|
||||
};
|
||||
|
||||
static struct i2c_driver_device i2c_devices[] __initdata = {
|
||||
{"ricoh,rs5c372a", "rtc-rs5c372", "rs5c372a",},
|
||||
{"ricoh,rs5c372b", "rtc-rs5c372", "rs5c372b",},
|
||||
{"ricoh,rv5c386", "rtc-rs5c372", "rv5c386",},
|
||||
{"ricoh,rv5c387a", "rtc-rs5c372", "rv5c387a",},
|
||||
};
|
||||
|
||||
static int __init of_find_i2c_driver(struct device_node *node, struct i2c_board_info *info)
|
||||
{
|
||||
int i;
|
||||
|
||||
for (i = 0; i < ARRAY_SIZE(i2c_devices); i++) {
|
||||
if (!of_device_is_compatible(node, i2c_devices[i].of_device))
|
||||
continue;
|
||||
strncpy(info->driver_name, i2c_devices[i].i2c_driver, KOBJ_NAME_LEN);
|
||||
strncpy(info->type, i2c_devices[i].i2c_type, I2C_NAME_SIZE);
|
||||
return 0;
|
||||
}
|
||||
return -ENODEV;
|
||||
}
|
||||
|
||||
static void __init of_register_i2c_devices(struct device_node *adap_node, int bus_num)
|
||||
{
|
||||
struct device_node *node = NULL;
|
||||
|
||||
while ((node = of_get_next_child(adap_node, node))) {
|
||||
struct i2c_board_info info;
|
||||
const u32 *addr;
|
||||
int len;
|
||||
|
||||
addr = of_get_property(node, "reg", &len);
|
||||
if (!addr || len < sizeof(int) || *addr > (1 << 10) - 1) {
|
||||
printk(KERN_WARNING "fsl_ioc.c: invalid i2c device entry\n");
|
||||
continue;
|
||||
}
|
||||
|
||||
info.irq = irq_of_parse_and_map(node, 0);
|
||||
if (info.irq == NO_IRQ)
|
||||
info.irq = -1;
|
||||
|
||||
if (of_find_i2c_driver(node, &info) < 0)
|
||||
continue;
|
||||
|
||||
info.platform_data = NULL;
|
||||
info.addr = *addr;
|
||||
|
||||
i2c_register_board_info(bus_num, &info, 1);
|
||||
}
|
||||
}
|
||||
|
||||
static int __init fsl_i2c_of_init(void)
|
||||
{
|
||||
struct device_node *np;
|
||||
|
|
@ -349,6 +407,8 @@ static int __init fsl_i2c_of_init(void)
|
|||
fsl_i2c_platform_data));
|
||||
if (ret)
|
||||
goto unreg;
|
||||
|
||||
of_register_i2c_devices(np, i);
|
||||
}
|
||||
|
||||
return 0;
|
||||
|
|
@ -360,6 +420,7 @@ static int __init fsl_i2c_of_init(void)
|
|||
}
|
||||
|
||||
arch_initcall(fsl_i2c_of_init);
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_PPC_83xx
|
||||
static int __init mpc83xx_wdt_init(void)
|
||||
|
|
|
|||
|
|
@ -160,4 +160,5 @@ setup_indirect_pci(struct pci_controller* hose, u32 cfg_addr, u32 cfg_data, u32
|
|||
mbase = ioremap(cfg_data & PAGE_MASK, PAGE_SIZE);
|
||||
hose->cfg_data = mbase + (cfg_data & ~PAGE_MASK);
|
||||
hose->ops = &indirect_pci_ops;
|
||||
hose->indirect_type = flags;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -71,6 +71,14 @@ static inline struct pci_controller *pci_bus_to_host(struct pci_bus *bus)
|
|||
return bus->sysdata;
|
||||
}
|
||||
|
||||
static inline int isa_vaddr_is_ioport(void __iomem *address)
|
||||
{
|
||||
/* No specific ISA handling on ppc32 at this stage, it
|
||||
* all goes through PCI
|
||||
*/
|
||||
return 0;
|
||||
}
|
||||
|
||||
/* These are used for config access before all the PCI probing
|
||||
has been done. */
|
||||
int early_read_config_byte(struct pci_controller *hose, int bus, int dev_fn,
|
||||
|
|
@ -241,6 +249,13 @@ extern void pcibios_free_controller(struct pci_controller *phb);
|
|||
|
||||
extern void isa_bridge_find_early(struct pci_controller *hose);
|
||||
|
||||
static inline int isa_vaddr_is_ioport(void __iomem *address)
|
||||
{
|
||||
/* Check if address hits the reserved legacy IO range */
|
||||
unsigned long ea = (unsigned long)address;
|
||||
return ea >= ISA_IO_BASE && ea < ISA_IO_END;
|
||||
}
|
||||
|
||||
extern int pcibios_unmap_io_space(struct pci_bus *bus);
|
||||
extern int pcibios_map_io_space(struct pci_bus *bus);
|
||||
|
||||
|
|
@ -271,11 +286,16 @@ extern struct pci_controller *
|
|||
pcibios_alloc_controller(struct device_node *dev);
|
||||
#ifdef CONFIG_PCI
|
||||
extern unsigned long pci_address_to_pio(phys_addr_t address);
|
||||
extern int pcibios_vaddr_is_ioport(void __iomem *address);
|
||||
#else
|
||||
static inline unsigned long pci_address_to_pio(phys_addr_t address)
|
||||
{
|
||||
return (unsigned long)-1;
|
||||
}
|
||||
static inline int pcibios_vaddr_is_ioport(void __iomem *address)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
#endif
|
||||
|
||||
|
||||
|
|
|
|||
|
|
@ -181,6 +181,18 @@ name: \
|
|||
.type GLUE(.,name),@function; \
|
||||
GLUE(.,name):
|
||||
|
||||
#define _INIT_STATIC(name) \
|
||||
.section ".text.init.refok"; \
|
||||
.align 2 ; \
|
||||
.section ".opd","aw"; \
|
||||
name: \
|
||||
.quad GLUE(.,name); \
|
||||
.quad .TOC.@tocbase; \
|
||||
.quad 0; \
|
||||
.previous; \
|
||||
.type GLUE(.,name),@function; \
|
||||
GLUE(.,name):
|
||||
|
||||
#else /* 32-bit */
|
||||
|
||||
#define _GLOBAL(n) \
|
||||
|
|
|
|||
|
|
@ -80,6 +80,11 @@ extern const void *vio_get_attribute(struct vio_dev *vdev, char *which,
|
|||
extern struct vio_dev *vio_find_node(struct device_node *vnode);
|
||||
extern int vio_enable_interrupts(struct vio_dev *dev);
|
||||
extern int vio_disable_interrupts(struct vio_dev *dev);
|
||||
#else
|
||||
static inline int vio_enable_interrupts(struct vio_dev *dev)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
#endif
|
||||
|
||||
static inline struct vio_driver *to_vio_driver(struct device_driver *drv)
|
||||
|
|
|
|||
Loading…
Reference in a new issue