From 2fa4139f3e4812de1b827b44ade35a406413f31f Mon Sep 17 00:00:00 2001 From: Conor Dooley Date: Wed, 28 Jun 2023 08:12:30 +0100 Subject: [PATCH 1/3] RISC-V: make ARCH_THEAD preclude XIP_KERNEL Randy reported build errors in linux-next where XIP_KERNEL was enabled. ARCH_THEAD requires alternatives to support the non-standard ISA extensions used by the THEAD cores, which are mutually exclusive with XIP kernels. Clone the dependency list from the Allwinner entry, since Allwinner's D1 uses T-Head cores with the same non-standard extensions. Reported-by: Randy Dunlap Reviewed-by: Randy Dunlap Tested-by: Randy Dunlap # build-tested Link: https://lore.kernel.org/all/ab38f6af-cb68-a918-1a63-2e7c927a8ffc@infradead.org/ Fixes: da47ce003963 ("riscv: Add the T-HEAD SoC family Kconfig option") Reviewed-by: Palmer Dabbelt Acked-by: Palmer Dabbelt Signed-off-by: Conor Dooley Link: https://lore.kernel.org/r/20230628-left-attractor-94b7bd5fbb83@wendy Signed-off-by: Arnd Bergmann --- arch/riscv/Kconfig.socs | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/riscv/Kconfig.socs b/arch/riscv/Kconfig.socs index ce10a38dff37..6833d01e2e70 100644 --- a/arch/riscv/Kconfig.socs +++ b/arch/riscv/Kconfig.socs @@ -43,6 +43,7 @@ config ARCH_SUNXI config ARCH_THEAD bool "T-HEAD RISC-V SoCs" + depends on MMU && !XIP_KERNEL select ERRATA_THEAD help This enables support for the RISC-V based T-HEAD SoCs. From 7fb75904d7ce8bb4ab98865918f41274b55942c0 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Wed, 5 Jul 2023 17:00:33 +0200 Subject: [PATCH 2/3] ARM: dts: st: add missing space before { Add missing whitespace between node name/label and opening {. Signed-off-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20230705150033.293832-1-krzysztof.kozlowski@linaro.org Signed-off-by: Arnd Bergmann --- arch/arm/boot/dts/st/spear1310.dtsi | 2 +- arch/arm/boot/dts/st/spear1340.dtsi | 2 +- arch/arm/boot/dts/st/stih407-family.dtsi | 2 +- arch/arm/boot/dts/st/stih407-pinctrl.dtsi | 10 +++++----- arch/arm/boot/dts/st/stm32f429-disco.dts | 2 +- arch/arm/boot/dts/st/stm32f746-pinctrl.dtsi | 2 +- arch/arm/boot/dts/st/stm32f769-pinctrl.dtsi | 2 +- arch/arm/boot/dts/st/stm32h7-pinctrl.dtsi | 6 +++--- arch/arm/boot/dts/st/stm32mp15-pinctrl.dtsi | 4 ++-- arch/arm/boot/dts/st/stm32mp157a-icore-stm32mp1.dtsi | 6 +++--- .../arm/boot/dts/st/stm32mp157a-microgea-stm32mp1.dtsi | 6 +++--- 11 files changed, 22 insertions(+), 22 deletions(-) diff --git a/arch/arm/boot/dts/st/spear1310.dtsi b/arch/arm/boot/dts/st/spear1310.dtsi index 2f746a9428a7..ba827d60bf07 100644 --- a/arch/arm/boot/dts/st/spear1310.dtsi +++ b/arch/arm/boot/dts/st/spear1310.dtsi @@ -11,7 +11,7 @@ / { compatible = "st,spear1310"; ahb { - spics: spics@e0700000{ + spics: spics@e0700000 { compatible = "st,spear-spics-gpio"; reg = <0xe0700000 0x1000>; st-spics,peripcfg-reg = <0x3b0>; diff --git a/arch/arm/boot/dts/st/spear1340.dtsi b/arch/arm/boot/dts/st/spear1340.dtsi index 818886e11713..d54e10629a7d 100644 --- a/arch/arm/boot/dts/st/spear1340.dtsi +++ b/arch/arm/boot/dts/st/spear1340.dtsi @@ -12,7 +12,7 @@ / { ahb { - spics: spics@e0700000{ + spics: spics@e0700000 { compatible = "st,spear-spics-gpio"; reg = <0xe0700000 0x1000>; st-spics,peripcfg-reg = <0x42c>; diff --git a/arch/arm/boot/dts/st/stih407-family.dtsi b/arch/arm/boot/dts/st/stih407-family.dtsi index 5ebb77947fd9..3f58383a7b59 100644 --- a/arch/arm/boot/dts/st/stih407-family.dtsi +++ b/arch/arm/boot/dts/st/stih407-family.dtsi @@ -645,7 +645,7 @@ lpc@8788000 { st,lpc-mode = ; }; - spifsm: spifsm@9022000{ + spifsm: spifsm@9022000 { compatible = "st,spi-fsm"; reg = <0x9022000 0x1000>; reg-names = "spi-fsm"; diff --git a/arch/arm/boot/dts/st/stih407-pinctrl.dtsi b/arch/arm/boot/dts/st/stih407-pinctrl.dtsi index 2cf335714ca2..7815669fe813 100644 --- a/arch/arm/boot/dts/st/stih407-pinctrl.dtsi +++ b/arch/arm/boot/dts/st/stih407-pinctrl.dtsi @@ -1090,7 +1090,7 @@ st,pins { }; i2s_out { - pinctrl_i2s_8ch_out: i2s_8ch_out{ + pinctrl_i2s_8ch_out: i2s_8ch_out { st,pins { mclk = <&pio33 5 ALT1 OUT>; lrclk = <&pio33 7 ALT1 OUT>; @@ -1102,7 +1102,7 @@ st,pins { }; }; - pinctrl_i2s_2ch_out: i2s_2ch_out{ + pinctrl_i2s_2ch_out: i2s_2ch_out { st,pins { mclk = <&pio33 5 ALT1 OUT>; lrclk = <&pio33 7 ALT1 OUT>; @@ -1113,7 +1113,7 @@ st,pins { }; i2s_in { - pinctrl_i2s_8ch_in: i2s_8ch_in{ + pinctrl_i2s_8ch_in: i2s_8ch_in { st,pins { mclk = <&pio32 5 ALT1 IN>; lrclk = <&pio32 7 ALT1 IN>; @@ -1126,7 +1126,7 @@ st,pins { }; }; - pinctrl_i2s_2ch_in: i2s_2ch_in{ + pinctrl_i2s_2ch_in: i2s_2ch_in { st,pins { mclk = <&pio32 5 ALT1 IN>; lrclk = <&pio32 7 ALT1 IN>; @@ -1137,7 +1137,7 @@ st,pins { }; spdif_out { - pinctrl_spdif_out: spdif_out{ + pinctrl_spdif_out: spdif_out { st,pins { spdif_out = <&pio34 7 ALT1 OUT>; }; diff --git a/arch/arm/boot/dts/st/stm32f429-disco.dts b/arch/arm/boot/dts/st/stm32f429-disco.dts index 3b81228d46a2..a3cb4aabdd5a 100644 --- a/arch/arm/boot/dts/st/stm32f429-disco.dts +++ b/arch/arm/boot/dts/st/stm32f429-disco.dts @@ -190,7 +190,7 @@ l3gd20: l3gd20@0 { status = "okay"; }; - display: display@1{ + display: display@1 { /* Connect panel-ilitek-9341 to ltdc */ compatible = "st,sf-tc240t-9370-t", "ilitek,ili9341"; reg = <1>; diff --git a/arch/arm/boot/dts/st/stm32f746-pinctrl.dtsi b/arch/arm/boot/dts/st/stm32f746-pinctrl.dtsi index fcfd2ac7239b..781197ef42d6 100644 --- a/arch/arm/boot/dts/st/stm32f746-pinctrl.dtsi +++ b/arch/arm/boot/dts/st/stm32f746-pinctrl.dtsi @@ -6,6 +6,6 @@ #include "stm32f7-pinctrl.dtsi" -&pinctrl{ +&pinctrl { compatible = "st,stm32f746-pinctrl"; }; diff --git a/arch/arm/boot/dts/st/stm32f769-pinctrl.dtsi b/arch/arm/boot/dts/st/stm32f769-pinctrl.dtsi index 31005dd9929c..c26abc04e2ce 100644 --- a/arch/arm/boot/dts/st/stm32f769-pinctrl.dtsi +++ b/arch/arm/boot/dts/st/stm32f769-pinctrl.dtsi @@ -6,6 +6,6 @@ #include "stm32f7-pinctrl.dtsi" -&pinctrl{ +&pinctrl { compatible = "st,stm32f769-pinctrl"; }; diff --git a/arch/arm/boot/dts/st/stm32h7-pinctrl.dtsi b/arch/arm/boot/dts/st/stm32h7-pinctrl.dtsi index aa1bc3e10a49..7f1d234e1024 100644 --- a/arch/arm/boot/dts/st/stm32h7-pinctrl.dtsi +++ b/arch/arm/boot/dts/st/stm32h7-pinctrl.dtsi @@ -94,7 +94,7 @@ pins1 { drive-push-pull; bias-disable; }; - pins2{ + pins2 { pinmux = ; /* SDMMC1_CMD */ slew-rate = <3>; drive-open-drain; @@ -122,7 +122,7 @@ pins1 { drive-push-pull; bias-pull-up; }; - pins2{ + pins2 { pinmux = ; /* SDMMC1_CKIN */ bias-pull-up; }; @@ -162,7 +162,7 @@ pins1 { drive-push-pull; bias-disable; }; - pins2{ + pins2 { pinmux = ; /* SDMMC1_CMD */ slew-rate = <3>; drive-open-drain; diff --git a/arch/arm/boot/dts/st/stm32mp15-pinctrl.dtsi b/arch/arm/boot/dts/st/stm32mp15-pinctrl.dtsi index 06e969aa5fdb..05c9c4f8064c 100644 --- a/arch/arm/boot/dts/st/stm32mp15-pinctrl.dtsi +++ b/arch/arm/boot/dts/st/stm32mp15-pinctrl.dtsi @@ -1659,7 +1659,7 @@ pins1 { drive-push-pull; bias-pull-up; }; - pins2{ + pins2 { pinmux = ; /* SDMMC1_CKIN */ bias-pull-up; }; @@ -1694,7 +1694,7 @@ pins1 { drive-push-pull; bias-pull-up; }; - pins2{ + pins2 { pinmux = ; /* SDMMC1_CKIN */ bias-pull-up; }; diff --git a/arch/arm/boot/dts/st/stm32mp157a-icore-stm32mp1.dtsi b/arch/arm/boot/dts/st/stm32mp157a-icore-stm32mp1.dtsi index 9de893101b40..569a7e940ecc 100644 --- a/arch/arm/boot/dts/st/stm32mp157a-icore-stm32mp1.dtsi +++ b/arch/arm/boot/dts/st/stm32mp157a-icore-stm32mp1.dtsi @@ -165,12 +165,12 @@ &ipcc { status = "okay"; }; -&iwdg2{ +&iwdg2 { timeout-sec = <32>; status = "okay"; }; -&m4_rproc{ +&m4_rproc { memory-region = <&retram>, <&mcuram>, <&mcuram2>, <&vdev0vring0>, <&vdev0vring1>, <&vdev0buffer>; mboxes = <&ipcc 0>, <&ipcc 1>, <&ipcc 2>; @@ -184,7 +184,7 @@ &rng1 { status = "okay"; }; -&rtc{ +&rtc { status = "okay"; }; diff --git a/arch/arm/boot/dts/st/stm32mp157a-microgea-stm32mp1.dtsi b/arch/arm/boot/dts/st/stm32mp157a-microgea-stm32mp1.dtsi index fb4600a59869..a75f50cf7123 100644 --- a/arch/arm/boot/dts/st/stm32mp157a-microgea-stm32mp1.dtsi +++ b/arch/arm/boot/dts/st/stm32mp157a-microgea-stm32mp1.dtsi @@ -117,12 +117,12 @@ &ipcc { status = "okay"; }; -&iwdg2{ +&iwdg2 { timeout-sec = <32>; status = "okay"; }; -&m4_rproc{ +&m4_rproc { memory-region = <&retram>, <&mcuram>, <&mcuram2>, <&vdev0vring0>, <&vdev0vring1>, <&vdev0buffer>; mboxes = <&ipcc 0>, <&ipcc 1>, <&ipcc 2>; @@ -136,7 +136,7 @@ &rng1 { status = "okay"; }; -&rtc{ +&rtc { status = "okay"; }; From 6722e46513e0af8e2fff4698f7cb78bc50a9f13f Mon Sep 17 00:00:00 2001 From: Jonas Gorski Date: Sat, 24 Jun 2023 14:21:39 +0200 Subject: [PATCH 3/3] bus: ixp4xx: fix IXP4XX_EXP_T1_MASK The IXP4XX_EXP_T1_MASK was shifted one bit to the right, overlapping IXP4XX_EXP_T2_MASK and leaving bit 29 unused. The offset being wrong is also confirmed at least by the datasheet of IXP45X/46X [1]. Fix this by aligning it to IXP4XX_EXP_T1_SHIFT. [1] https://www.intel.com/content/dam/www/public/us/en/documents/manuals/ixp45x-ixp46x-developers-manual.pdf Cc: stable@vger.kernel.org Fixes: 1c953bda90ca ("bus: ixp4xx: Add a driver for IXP4xx expansion bus") Signed-off-by: Jonas Gorski Link: https://lore.kernel.org/r/20230624112958.27727-1-jonas.gorski@gmail.com Signed-off-by: Linus Walleij Link: https://lore.kernel.org/r/20230624122139.3229642-1-linus.walleij@linaro.org Signed-off-by: Arnd Bergmann --- drivers/bus/intel-ixp4xx-eb.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/bus/intel-ixp4xx-eb.c b/drivers/bus/intel-ixp4xx-eb.c index f5ba6bee6fd8..320cf307db05 100644 --- a/drivers/bus/intel-ixp4xx-eb.c +++ b/drivers/bus/intel-ixp4xx-eb.c @@ -33,7 +33,7 @@ #define IXP4XX_EXP_TIMING_STRIDE 0x04 #define IXP4XX_EXP_CS_EN BIT(31) #define IXP456_EXP_PAR_EN BIT(30) /* Only on IXP45x and IXP46x */ -#define IXP4XX_EXP_T1_MASK GENMASK(28, 27) +#define IXP4XX_EXP_T1_MASK GENMASK(29, 28) #define IXP4XX_EXP_T1_SHIFT 28 #define IXP4XX_EXP_T2_MASK GENMASK(27, 26) #define IXP4XX_EXP_T2_SHIFT 26