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x86, AMD IOMMU: initialize device table properly
This patch adds device table initializations which forbids memory accesses for devices per default and disables all page faults. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
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2 changed files with 19 additions and 0 deletions
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@ -800,6 +800,21 @@ static int __init init_memory_definitions(struct acpi_table_header *table)
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return 0;
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return 0;
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}
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}
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/*
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* Init the device table to not allow DMA access for devices and
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* suppress all page faults
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*/
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static void init_device_table(void)
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{
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u16 devid;
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for (devid = 0; devid <= amd_iommu_last_bdf; ++devid) {
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set_dev_entry_bit(devid, DEV_ENTRY_VALID);
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set_dev_entry_bit(devid, DEV_ENTRY_TRANSLATION);
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set_dev_entry_bit(devid, DEV_ENTRY_NO_PAGE_FAULT);
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}
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}
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/*
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/*
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* This function finally enables all IOMMUs found in the system after
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* This function finally enables all IOMMUs found in the system after
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* they have been initialized
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* they have been initialized
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@ -931,6 +946,9 @@ int __init amd_iommu_init(void)
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if (amd_iommu_pd_alloc_bitmap == NULL)
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if (amd_iommu_pd_alloc_bitmap == NULL)
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goto free;
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goto free;
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/* init the device table */
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init_device_table();
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/*
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/*
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* let all alias entries point to itself
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* let all alias entries point to itself
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*/
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*/
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@ -103,6 +103,7 @@
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#define DEV_ENTRY_TRANSLATION 0x01
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#define DEV_ENTRY_TRANSLATION 0x01
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#define DEV_ENTRY_IR 0x3d
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#define DEV_ENTRY_IR 0x3d
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#define DEV_ENTRY_IW 0x3e
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#define DEV_ENTRY_IW 0x3e
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#define DEV_ENTRY_NO_PAGE_FAULT 0x62
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#define DEV_ENTRY_EX 0x67
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#define DEV_ENTRY_EX 0x67
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#define DEV_ENTRY_SYSMGT1 0x68
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#define DEV_ENTRY_SYSMGT1 0x68
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#define DEV_ENTRY_SYSMGT2 0x69
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#define DEV_ENTRY_SYSMGT2 0x69
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