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drm/amdgpu: fix user fence write race condition
The buffer object backing the user fence is reserved using the non-user fence, i.e., as soon as the non-user fence is signaled, the user fence buffer object can be moved or even destroyed. Therefore, emit the user fence first. Both fences have the same cache invalidation behavior, so this should have no user-visible effect. Signed-off-by: Nicolai Hähnle <nicolai.haehnle@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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parent
860c15e903
commit
9fc15f5fc8
1 changed files with 6 additions and 6 deletions
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@ -231,6 +231,12 @@ int amdgpu_ib_schedule(struct amdgpu_ring *ring, unsigned num_ibs,
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if (ib->flags & AMDGPU_IB_FLAG_TC_WB_NOT_INVALIDATE)
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fence_flags |= AMDGPU_FENCE_FLAG_TC_WB_ONLY;
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/* wrap the last IB with fence */
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if (job && job->uf_addr) {
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amdgpu_ring_emit_fence(ring, job->uf_addr, job->uf_sequence,
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fence_flags | AMDGPU_FENCE_FLAG_64BIT);
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}
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r = amdgpu_fence_emit(ring, f, fence_flags);
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if (r) {
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dev_err(adev->dev, "failed to emit fence (%d)\n", r);
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@ -243,12 +249,6 @@ int amdgpu_ib_schedule(struct amdgpu_ring *ring, unsigned num_ibs,
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if (ring->funcs->insert_end)
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ring->funcs->insert_end(ring);
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/* wrap the last IB with fence */
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if (job && job->uf_addr) {
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amdgpu_ring_emit_fence(ring, job->uf_addr, job->uf_sequence,
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fence_flags | AMDGPU_FENCE_FLAG_64BIT);
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}
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if (patch_offset != ~0 && ring->funcs->patch_cond_exec)
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amdgpu_ring_patch_cond_exec(ring, patch_offset);
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