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drm/amdgpu/vcn:Update SPG mode UVD status clear
Update Static Power Gate mode UVD status clear Signed-off-by: James Zhu <James.Zhu@amd.com> Acked-by: Leo Liu <leo.liu@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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1 changed files with 3 additions and 3 deletions
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@ -883,9 +883,9 @@ static int vcn_v1_0_start_spg_mode(struct amdgpu_device *adev)
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UVD_SYS_INT_EN__UVD_JRBC_EN_MASK,
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~UVD_SYS_INT_EN__UVD_JRBC_EN_MASK);
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/* clear the bit 4 of VCN_STATUS */
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WREG32_P(SOC15_REG_OFFSET(UVD, 0, mmUVD_STATUS), 0,
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~(2 << UVD_STATUS__VCPU_REPORT__SHIFT));
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/* clear the busy bit of UVD_STATUS */
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tmp = RREG32_SOC15(UVD, 0, mmUVD_STATUS) & ~UVD_STATUS__UVD_BUSY;
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WREG32_SOC15(UVD, 0, mmUVD_STATUS, tmp);
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/* force RBC into idle state */
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rb_bufsz = order_base_2(ring->ring_size);
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