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net: dsa: qca8k: add missing check return value in qca8k_phylink_mac_config() 

Now we can check qca8k_read() return value correctly, so if
it fails, we need return directly.

Signed-off-by: Yang Yingliang <yangyingliang@huawei.com>
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
This commit is contained in:
Yang Yingliang 2021-05-29 11:04:39 +08:00 committed by Jakub Kicinski
parent 7c9896e378
commit 9fe99de014
1 changed files with 7 additions and 2 deletions
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9
drivers/net/dsa/qca8k.c
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@ -1128,6 +1128,7 @@ qca8k_phylink_mac_config(struct dsa_switch *ds, int port, unsigned int mode,
{
struct qca8k_priv *priv = ds->priv;
u32 reg, val;
int ret;
switch (port) {
case 0: /* 1st CPU port */
@ -1198,7 +1199,9 @@ qca8k_phylink_mac_config(struct dsa_switch *ds, int port, unsigned int mode,
qca8k_write(priv, reg, QCA8K_PORT_PAD_SGMII_EN);
/* Enable/disable SerDes auto-negotiation as necessary */
qca8k_read(priv, QCA8K_REG_PWS, &val);
ret = qca8k_read(priv, QCA8K_REG_PWS, &val);
if (ret)
return;
if (phylink_autoneg_inband(mode))
val &= ~QCA8K_PWS_SERDES_AEN_DIS;
else
@ -1206,7 +1209,9 @@ qca8k_phylink_mac_config(struct dsa_switch *ds, int port, unsigned int mode,
qca8k_write(priv, QCA8K_REG_PWS, val);
/* Configure the SGMII parameters */
qca8k_read(priv, QCA8K_REG_SGMII_CTRL, &val);
ret = qca8k_read(priv, QCA8K_REG_SGMII_CTRL, &val);
if (ret)
return;
val |= QCA8K_SGMII_EN_PLL | QCA8K_SGMII_EN_RX |
QCA8K_SGMII_EN_TX | QCA8K_SGMII_EN_SD;