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drm/radeon/kms: DCE5 atom transmitter control updates
Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
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parent
a572eaa372
commit
a001182af8
1 changed files with 14 additions and 5 deletions
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@ -712,7 +712,7 @@ atombios_get_encoder_mode(struct drm_encoder *encoder)
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* - 2 DIG encoder blocks.
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* DIG1/2 can drive UNIPHY0/1/2 link A or link B
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*
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* DCE 4.0
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* DCE 4.0/5.0
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* - 3 DIG transmitter blocks UNIPHY0/1/2 (links A and B).
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* Supports up to 6 digital outputs
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* - 6 DIG encoder blocks.
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@ -829,6 +829,7 @@ union dig_transmitter_control {
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DIG_TRANSMITTER_CONTROL_PS_ALLOCATION v1;
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DIG_TRANSMITTER_CONTROL_PARAMETERS_V2 v2;
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DIG_TRANSMITTER_CONTROL_PARAMETERS_V3 v3;
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DIG_TRANSMITTER_CONTROL_PARAMETERS_V4 v4;
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};
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void
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@ -923,10 +924,18 @@ atombios_dig_transmitter_setup(struct drm_encoder *encoder, int action, uint8_t
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struct radeon_crtc *radeon_crtc = to_radeon_crtc(encoder->crtc);
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pll_id = radeon_crtc->pll_id;
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}
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if (is_dp && rdev->clock.dp_extclk)
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args.v3.acConfig.ucRefClkSource = 2; /* external src */
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else
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args.v3.acConfig.ucRefClkSource = pll_id;
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if (ASIC_IS_DCE5(rdev)) {
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if (is_dp && rdev->clock.dp_extclk)
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args.v4.acConfig.ucRefClkSource = 3; /* external src */
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else
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args.v4.acConfig.ucRefClkSource = pll_id;
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} else {
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if (is_dp && rdev->clock.dp_extclk)
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args.v3.acConfig.ucRefClkSource = 2; /* external src */
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else
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args.v3.acConfig.ucRefClkSource = pll_id;
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}
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switch (radeon_encoder->encoder_id) {
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case ENCODER_OBJECT_ID_INTERNAL_UNIPHY:
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