Merge commit master.kernel.org:/pub/scm/linux/kernel/git/gregkh/i2c-2.6 of HEAD
* HEAD: [PATCH] hwmon: Documentation update for abituguru [PATCH] hwmon: Fix for first generation Abit uGuru chips [PATCH] hwmon: New maintainer for w83791d [PATCH] pca9539: Honor the force parameter [PATCH] i2c-algo-bit: Wipe out dead code [PATCH] i2c: Handle i2c_add_adapter failure in i2c algorithm drivers [PATCH] i2c: New mailing list [PATCH] i2c-ite: Plan for removal [PATCH] i2c-powermac: Fix master_xfer return value [PATCH] scx200_acb: Fix the block transactions [PATCH] scx200_acb: Fix the state machine [PATCH] i2c-iop3xx: Avoid addressing self [PATCH] i2c: Fix 'ignore' module parameter handling in i2c-core
This commit is contained in:
Linus Torvalds
commit
a0486407be
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@ -247,3 +247,14 @@ Why: The interrupt related SA_* flags are replaced by IRQF_* to move them
|
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Who: Thomas Gleixner <tglx@linutronix.de>
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---------------------------
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What: i2c-ite and i2c-algo-ite drivers
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When: September 2006
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Why: These drivers never compiled since they were added to the kernel
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tree 5 years ago. This feature removal can be reevaluated if
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someone shows interest in the drivers, fixes them and takes over
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maintenance.
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http://marc.theaimsgroup.com/?l=linux-mips&m=115040510817448
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Who: Jean Delvare <khali@linux-fr.org>
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---------------------------
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@ -2,13 +2,36 @@ Kernel driver abituguru
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=======================
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Supported chips:
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* Abit uGuru (Hardware Monitor part only)
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* Abit uGuru revision 1-3 (Hardware Monitor part only)
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Prefix: 'abituguru'
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Addresses scanned: ISA 0x0E0
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Datasheet: Not available, this driver is based on reverse engineering.
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A "Datasheet" has been written based on the reverse engineering it
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should be available in the same dir as this file under the name
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abituguru-datasheet.
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Note:
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The uGuru is a microcontroller with onboard firmware which programs
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it to behave as a hwmon IC. There are many different revisions of the
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firmware and thus effectivly many different revisions of the uGuru.
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Below is an incomplete list with which revisions are used for which
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Motherboards:
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uGuru 1.00 ~ 1.24 (AI7, KV8-MAX3, AN7) (1)
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uGuru 2.0.0.0 ~ 2.0.4.2 (KV8-PRO)
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uGuru 2.1.0.0 ~ 2.1.2.8 (AS8, AV8, AA8, AG8, AA8XE, AX8)
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uGuru 2.2.0.0 ~ 2.2.0.6 (AA8 Fatal1ty)
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uGuru 2.3.0.0 ~ 2.3.0.9 (AN8)
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uGuru 3.0.0.0 ~ 3.0.1.2 (AW8, AL8, NI8)
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uGuru 4.xxxxx? (AT8 32X) (2)
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1) For revisions 2 and 3 uGuru's the driver can autodetect the
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sensortype (Volt or Temp) for bank1 sensors, for revision 1 uGuru's
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this doesnot always work. For these uGuru's the autodection can
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be overriden with the bank1_types module param. For all 3 known
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revison 1 motherboards the correct use of this param is:
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bank1_types=1,1,0,0,0,0,0,2,0,0,0,0,2,0,0,1
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You may also need to specify the fan_sensors option for these boards
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fan_sensors=5
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2) The current version of the abituguru driver is known to NOT work
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on these Motherboards
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Authors:
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Hans de Goede <j.w.r.degoede@hhs.nl>,
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@ -22,6 +45,11 @@ Module Parameters
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* force: bool Force detection. Note this parameter only causes the
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detection to be skipped, if the uGuru can't be read
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the module initialization (insmod) will still fail.
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* bank1_types: int[] Bank1 sensortype autodetection override:
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-1 autodetect (default)
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0 volt sensor
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1 temp sensor
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2 not connected
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* fan_sensors: int Tell the driver how many fan speed sensors there are
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on your motherboard. Default: 0 (autodetect).
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* pwms: int Tell the driver how many fan speed controls (fan
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@ -29,7 +57,7 @@ Module Parameters
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* verbose: int How verbose should the driver be? (0-3):
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0 normal output
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1 + verbose error reporting
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2 + sensors type probing info\n"
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2 + sensors type probing info (default)
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3 + retryable error reporting
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Default: 2 (the driver is still in the testing phase)
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|
|
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@ -42,8 +42,8 @@ I suspect that this driver could be made to work for the following SiS
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chipsets as well: 635, and 635T. If anyone owns a board with those chips
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AND is willing to risk crashing & burning an otherwise well-behaved kernel
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in the name of progress... please contact me at <mhoffman@lightlink.com> or
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via the project's mailing list: <lm-sensors@lm-sensors.org>. Please
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send bug reports and/or success stories as well.
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via the project's mailing list: <i2c@lm-sensors.org>. Please send bug
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reports and/or success stories as well.
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TO DOs
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14
MAINTAINERS
14
MAINTAINERS
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@ -274,7 +274,7 @@ S: Maintained
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ALI1563 I2C DRIVER
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P: Rudolf Marek
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M: r.marek@sh.cvut.cz
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L: lm-sensors@lm-sensors.org
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L: i2c@lm-sensors.org
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S: Maintained
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ALPHA PORT
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@ -1249,7 +1249,7 @@ S: Maintained
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I2C SUBSYSTEM
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P: Jean Delvare
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M: khali@linux-fr.org
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L: lm-sensors@lm-sensors.org
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L: i2c@lm-sensors.org
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W: http://www.lm-sensors.nu/
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T: quilt kernel.org/pub/linux/kernel/people/gregkh/gregkh-2.6/
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S: Maintained
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@ -2093,7 +2093,7 @@ S: Maintained
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OPENCORES I2C BUS DRIVER
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P: Peter Korsgaard
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M: jacmet@sunsite.dk
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L: lm-sensors@lm-sensors.org
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L: i2c@lm-sensors.org
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S: Maintained
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ORACLE CLUSTER FILESYSTEM 2 (OCFS2)
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@ -3132,7 +3132,7 @@ S: Maintained
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VIAPRO SMBUS DRIVER
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P: Jean Delvare
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M: khali@linux-fr.org
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L: lm-sensors@lm-sensors.org
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L: i2c@lm-sensors.org
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S: Maintained
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UCLINUX (AND M68KNOMMU)
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@ -3182,6 +3182,12 @@ P: Evgeniy Polyakov
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M: johnpol@2ka.mipt.ru
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S: Maintained
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W83791D HARDWARE MONITORING DRIVER
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P: Charles Spirakis
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M: bezaur@gmail.com
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L: lm-sensors@lm-sensors.org
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S: Maintained
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W83L51xD SD/MMC CARD INTERFACE DRIVER
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P: Pierre Ossman
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M: drzeus-wbsd@drzeus.cx
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@ -142,6 +142,14 @@ static const u8 abituguru_pwm_max[5] = { 0, 255, 255, 75, 75 };
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static int force;
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module_param(force, bool, 0);
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MODULE_PARM_DESC(force, "Set to one to force detection.");
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static int bank1_types[ABIT_UGURU_MAX_BANK1_SENSORS] = { -1, -1, -1, -1, -1,
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-1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1 };
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module_param_array(bank1_types, int, NULL, 0);
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MODULE_PARM_DESC(bank1_types, "Bank1 sensortype autodetection override:\n"
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" -1 autodetect\n"
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" 0 volt sensor\n"
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" 1 temp sensor\n"
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" 2 not connected");
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static int fan_sensors;
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module_param(fan_sensors, int, 0);
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MODULE_PARM_DESC(fan_sensors, "Number of fan sensors on the uGuru "
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@ -397,6 +405,15 @@ abituguru_detect_bank1_sensor_type(struct abituguru_data *data,
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u8 val, buf[3];
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int ret = ABIT_UGURU_NC;
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/* If overriden by the user return the user selected type */
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if (bank1_types[sensor_addr] >= ABIT_UGURU_IN_SENSOR &&
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bank1_types[sensor_addr] <= ABIT_UGURU_NC) {
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ABIT_UGURU_DEBUG(2, "assuming sensor type %d for bank1 sensor "
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"%d because of \"bank1_types\" module param\n",
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bank1_types[sensor_addr], (int)sensor_addr);
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return bank1_types[sensor_addr];
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}
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/* First read the sensor and the current settings */
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if (abituguru_read(data, ABIT_UGURU_SENSOR_BANK1, sensor_addr, &val,
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1, ABIT_UGURU_MAX_RETRIES) != 1)
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@ -514,7 +531,7 @@ abituguru_detect_no_bank2_sensors(struct abituguru_data *data)
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{
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int i;
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if (fan_sensors) {
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if (fan_sensors > 0 && fan_sensors <= ABIT_UGURU_MAX_BANK2_SENSORS) {
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data->bank2_sensors = fan_sensors;
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ABIT_UGURU_DEBUG(2, "assuming %d fan sensors because of "
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"\"fan_sensors\" module param\n",
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@ -568,7 +585,7 @@ abituguru_detect_no_pwms(struct abituguru_data *data)
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{
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int i, j;
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if (pwms) {
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if (pwms > 0 && pwms <= ABIT_UGURU_MAX_PWMS) {
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data->pwms = pwms;
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ABIT_UGURU_DEBUG(2, "assuming %d PWM outputs because of "
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"\"pwms\" module param\n", (int)data->pwms);
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@ -372,7 +372,6 @@ static inline int readbytes(struct i2c_adapter *i2c_adap, struct i2c_msg *msg)
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while (count > 0) {
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inval = i2c_inb(i2c_adap);
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/*printk("%#02x ",inval); if ( ! (count % 16) ) printk("\n"); */
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if (inval>=0) {
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*temp = inval;
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rdcount++;
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@ -544,8 +543,7 @@ int i2c_bit_add_bus(struct i2c_adapter *adap)
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adap->timeout = 100; /* default values, should */
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adap->retries = 3; /* be replaced by defines */
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i2c_add_adapter(adap);
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return 0;
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return i2c_add_adapter(adap);
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}
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|
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@ -742,10 +742,8 @@ int i2c_iic_add_bus(struct i2c_adapter *adap)
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adap->retries = 3; /* be replaced by defines */
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adap->flags = 0;
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i2c_add_adapter(adap);
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iic_init(iic_adap);
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return 0;
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return i2c_add_adapter(adap);
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}
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@ -374,10 +374,10 @@ int i2c_pca_add_bus(struct i2c_adapter *adap)
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adap->timeout = 100; /* default values, should */
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adap->retries = 3; /* be replaced by defines */
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rval = pca_init(pca_adap);
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if ((rval = pca_init(pca_adap)))
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return rval;
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if (!rval)
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i2c_add_adapter(adap);
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rval = i2c_add_adapter(adap);
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return rval;
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}
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|
|
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@ -479,9 +479,11 @@ int i2c_pcf_add_bus(struct i2c_adapter *adap)
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adap->timeout = 100; /* default values, should */
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adap->retries = 3; /* be replaced by defines */
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rval = pcf_init_8584(pcf_adap);
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if (!rval)
|
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i2c_add_adapter(adap);
|
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if ((rval = pcf_init_8584(pcf_adap)))
|
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return rval;
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|
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rval = i2c_add_adapter(adap);
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|
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return rval;
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}
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|
|
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|
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@ -173,9 +173,7 @@ int i2c_sibyte_add_bus(struct i2c_adapter *i2c_adap, int speed)
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printk("\n");
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}
|
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|
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i2c_add_adapter(i2c_adap);
|
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|
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return 0;
|
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return i2c_add_adapter(i2c_adap);
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}
|
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|
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|
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|
|
|
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|
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@ -21,6 +21,9 @@
|
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* - Make it work with IXP46x chips
|
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* - Cleanup function names, coding style, etc
|
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*
|
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* - writing to slave address causes latchup on iop331.
|
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* fix: driver refuses to address self.
|
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*
|
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* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
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* the Free Software Foundation, version 2.
|
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|
|
@ -72,12 +75,6 @@ iop3xx_i2c_reset(struct i2c_algo_iop3xx_data *iop3xx_adap)
|
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__raw_writel(0, iop3xx_adap->ioaddr + CR_OFFSET);
|
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}
|
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|
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static void
|
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iop3xx_i2c_set_slave_addr(struct i2c_algo_iop3xx_data *iop3xx_adap)
|
||||
{
|
||||
__raw_writel(MYSAR, iop3xx_adap->ioaddr + SAR_OFFSET);
|
||||
}
|
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|
||||
static void
|
||||
iop3xx_i2c_enable(struct i2c_algo_iop3xx_data *iop3xx_adap)
|
||||
{
|
||||
|
|
@ -248,6 +245,13 @@ iop3xx_i2c_send_target_addr(struct i2c_algo_iop3xx_data *iop3xx_adap,
|
|||
int status;
|
||||
int rc;
|
||||
|
||||
/* avoid writing to my slave address (hangs on 80331),
|
||||
* forbidden in Intel developer manual
|
||||
*/
|
||||
if (msg->addr == MYSAR) {
|
||||
return -EBUSY;
|
||||
}
|
||||
|
||||
__raw_writel(iic_cook_addr(msg), iop3xx_adap->ioaddr + DBR_OFFSET);
|
||||
|
||||
cr &= ~(IOP3XX_ICR_MSTOP | IOP3XX_ICR_NACK);
|
||||
|
|
@ -498,7 +502,6 @@ iop3xx_i2c_probe(struct platform_device *pdev)
|
|||
spin_lock_init(&adapter_data->lock);
|
||||
|
||||
iop3xx_i2c_reset(adapter_data);
|
||||
iop3xx_i2c_set_slave_addr(adapter_data);
|
||||
iop3xx_i2c_enable(adapter_data);
|
||||
|
||||
platform_set_drvdata(pdev, new_adapter);
|
||||
|
|
|
|||
|
|
@ -80,7 +80,7 @@
|
|||
#define IOP3XX_GPOD_I2C0 0x00c0 /* clear these bits to enable ch0 */
|
||||
#define IOP3XX_GPOD_I2C1 0x0030 /* clear these bits to enable ch1 */
|
||||
|
||||
#define MYSAR 0x02 /* SWAG a suitable slave address */
|
||||
#define MYSAR 0 /* default slave address */
|
||||
|
||||
#define I2C_ERR 321
|
||||
#define I2C_ERR_BERR (I2C_ERR+0)
|
||||
|
|
|
|||
|
|
@ -148,8 +148,6 @@ static int i2c_powermac_master_xfer( struct i2c_adapter *adap,
|
|||
int read;
|
||||
int addrdir;
|
||||
|
||||
if (num != 1)
|
||||
return -EINVAL;
|
||||
if (msgs->flags & I2C_M_TEN)
|
||||
return -EINVAL;
|
||||
read = (msgs->flags & I2C_M_RD) != 0;
|
||||
|
|
@ -166,7 +164,7 @@ static int i2c_powermac_master_xfer( struct i2c_adapter *adap,
|
|||
rc = pmac_i2c_xfer(bus, addrdir, 0, 0, msgs->buf, msgs->len);
|
||||
bail:
|
||||
pmac_i2c_close(bus);
|
||||
return rc < 0 ? rc : msgs->len;
|
||||
return rc < 0 ? rc : 1;
|
||||
}
|
||||
|
||||
static u32 i2c_powermac_func(struct i2c_adapter * adapter)
|
||||
|
|
|
|||
|
|
@ -184,21 +184,21 @@ static void scx200_acb_machine(struct scx200_acb_iface *iface, u8 status)
|
|||
break;
|
||||
|
||||
case state_read:
|
||||
/* Set ACK if receiving the last byte */
|
||||
if (iface->len == 1)
|
||||
/* Set ACK if _next_ byte will be the last one */
|
||||
if (iface->len == 2)
|
||||
outb(inb(ACBCTL1) | ACBCTL1_ACK, ACBCTL1);
|
||||
else
|
||||
outb(inb(ACBCTL1) & ~ACBCTL1_ACK, ACBCTL1);
|
||||
|
||||
*iface->ptr++ = inb(ACBSDA);
|
||||
--iface->len;
|
||||
|
||||
if (iface->len == 0) {
|
||||
if (iface->len == 1) {
|
||||
iface->result = 0;
|
||||
iface->state = state_idle;
|
||||
outb(inb(ACBCTL1) | ACBCTL1_STOP, ACBCTL1);
|
||||
}
|
||||
|
||||
*iface->ptr++ = inb(ACBSDA);
|
||||
--iface->len;
|
||||
|
||||
break;
|
||||
|
||||
case state_write:
|
||||
|
|
@ -307,8 +307,12 @@ static s32 scx200_acb_smbus_xfer(struct i2c_adapter *adapter,
|
|||
buffer = (u8 *)&cur_word;
|
||||
break;
|
||||
|
||||
case I2C_SMBUS_BLOCK_DATA:
|
||||
case I2C_SMBUS_I2C_BLOCK_DATA:
|
||||
if (rw == I2C_SMBUS_READ)
|
||||
data->block[0] = I2C_SMBUS_BLOCK_MAX; /* For now */
|
||||
len = data->block[0];
|
||||
if (len == 0 || len > I2C_SMBUS_BLOCK_MAX)
|
||||
return -EINVAL;
|
||||
buffer = &data->block[1];
|
||||
break;
|
||||
|
||||
|
|
@ -372,7 +376,7 @@ static u32 scx200_acb_func(struct i2c_adapter *adapter)
|
|||
{
|
||||
return I2C_FUNC_SMBUS_QUICK | I2C_FUNC_SMBUS_BYTE |
|
||||
I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA |
|
||||
I2C_FUNC_SMBUS_BLOCK_DATA;
|
||||
I2C_FUNC_SMBUS_I2C_BLOCK;
|
||||
}
|
||||
|
||||
/* For now, we only handle combined mode (smbus) */
|
||||
|
|
|
|||
|
|
@ -134,11 +134,13 @@ static int pca9539_detect(struct i2c_adapter *adapter, int address, int kind)
|
|||
new_client->driver = &pca9539_driver;
|
||||
new_client->flags = 0;
|
||||
|
||||
/* Detection: the pca9539 only has 8 registers (0-7).
|
||||
A read of 7 should succeed, but a read of 8 should fail. */
|
||||
if ((i2c_smbus_read_byte_data(new_client, 7) < 0) ||
|
||||
(i2c_smbus_read_byte_data(new_client, 8) >= 0))
|
||||
goto exit_kfree;
|
||||
if (kind < 0) {
|
||||
/* Detection: the pca9539 only has 8 registers (0-7).
|
||||
A read of 7 should succeed, but a read of 8 should fail. */
|
||||
if ((i2c_smbus_read_byte_data(new_client, 7) < 0) ||
|
||||
(i2c_smbus_read_byte_data(new_client, 8) >= 0))
|
||||
goto exit_kfree;
|
||||
}
|
||||
|
||||
strlcpy(new_client->name, "pca9539", I2C_NAME_SIZE);
|
||||
|
||||
|
|
|
|||
|
|
@ -756,9 +756,9 @@ int i2c_probe(struct i2c_adapter *adapter,
|
|||
"parameter for adapter %d, "
|
||||
"addr 0x%02x\n", adap_id,
|
||||
address_data->ignore[j + 1]);
|
||||
ignore = 1;
|
||||
break;
|
||||
}
|
||||
ignore = 1;
|
||||
break;
|
||||
}
|
||||
if (ignore)
|
||||
continue;
|
||||
|
|
|
|||
|
|
@ -193,6 +193,8 @@ struct i2c_algorithm {
|
|||
to NULL. If an adapter algorithm can do SMBus access, set
|
||||
smbus_xfer. If set to NULL, the SMBus protocol is simulated
|
||||
using common I2C messages */
|
||||
/* master_xfer should return the number of messages successfully
|
||||
processed, or a negative value on error */
|
||||
int (*master_xfer)(struct i2c_adapter *adap,struct i2c_msg *msgs,
|
||||
int num);
|
||||
int (*smbus_xfer) (struct i2c_adapter *adap, u16 addr,
|
||||
|
|
|
|||
Loading…
Reference in New Issue