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drm/i915/guc: Split guc_wq_item_append
We're using a special preempt context for HW to preempt into. We don't want to emit any requests there, but we still need to wrap this context into a valid GuC work item. Let's cleanup the functions operating on GuC work items. We can extract guc_request_add - responsible for adding GuC work item and ringing the doorbell, and guc_wq_item_append - used by the function above, not tied to the concept of gem request. Signed-off-by: Michał Winiarski <michal.winiarski@intel.com> Cc: Chris Wilson <chris@chris-wilson.co.uk> Cc: Jeff McGee <jeff.mcgee@intel.com> Cc: Michal Wajdeczko <michal.wajdeczko@intel.com> Cc: Oscar Mateo <oscar.mateo@intel.com> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Jeff McGee <jeff.mcgee@intel.com> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Link: https://patchwork.freedesktop.org/patch/msgid/20171025200020.16636-7-michal.winiarski@intel.com
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e12ab16907
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1 changed files with 30 additions and 25 deletions
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@ -71,7 +71,7 @@
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* WQ_TYPE_INORDER is needed to support legacy submission via GuC, which
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* represents in-order queue. The kernel driver packs ring tail pointer and an
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* ELSP context descriptor dword into Work Item.
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* See guc_wq_item_append()
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* See guc_add_request()
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*
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* ADS:
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* The Additional Data Struct (ADS) has pointers for different buffers used by
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@ -394,7 +394,7 @@ static void guc_stage_desc_init(struct intel_guc *guc,
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* submission or, in other words, not using a direct submission
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* model) the KMD's LRCA is not used for any work submission.
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* Instead, the GuC uses the LRCA of the user mode context (see
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* guc_wq_item_append below).
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* guc_add_request below).
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*/
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lrc->context_desc = lower_32_bits(ce->lrc_desc);
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@ -473,22 +473,18 @@ static void guc_shared_data_destroy(struct intel_guc *guc)
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/* Construct a Work Item and append it to the GuC's Work Queue */
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static void guc_wq_item_append(struct i915_guc_client *client,
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struct drm_i915_gem_request *rq)
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u32 target_engine, u32 context_desc,
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u32 ring_tail, u32 fence_id)
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{
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/* wqi_len is in DWords, and does not include the one-word header */
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const size_t wqi_size = sizeof(struct guc_wq_item);
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const u32 wqi_len = wqi_size / sizeof(u32) - 1;
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struct intel_engine_cs *engine = rq->engine;
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struct i915_gem_context *ctx = rq->ctx;
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struct guc_process_desc *desc = __get_process_desc(client);
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struct guc_wq_item *wqi;
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u32 ring_tail, wq_off;
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u32 wq_off;
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lockdep_assert_held(&client->wq_lock);
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ring_tail = intel_ring_set_tail(rq->ring, rq->tail) / sizeof(u64);
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GEM_BUG_ON(ring_tail > WQ_RING_TAIL_MAX);
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/* For now workqueue item is 4 DWs; workqueue buffer is 2 pages. So we
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* should not have the case where structure wqi is across page, neither
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* wrapped to the beginning. This simplifies the implementation below.
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@ -510,15 +506,14 @@ static void guc_wq_item_append(struct i915_guc_client *client,
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/* Now fill in the 4-word work queue item */
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wqi->header = WQ_TYPE_INORDER |
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(wqi_len << WQ_LEN_SHIFT) |
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(engine->guc_id << WQ_TARGET_SHIFT) |
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(target_engine << WQ_TARGET_SHIFT) |
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WQ_NO_WCFLUSH_WAIT;
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wqi->context_desc = lower_32_bits(intel_lr_context_descriptor(ctx, engine));
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wqi->context_desc = context_desc;
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wqi->submit_element_info = ring_tail << WQ_RING_TAIL_SHIFT;
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wqi->fence_id = rq->global_seqno;
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GEM_BUG_ON(ring_tail > WQ_RING_TAIL_MAX);
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wqi->fence_id = fence_id;
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/* Postincrement WQ tail for next time. */
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/* Make the update visible to GuC */
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WRITE_ONCE(desc->tail, (wq_off + wqi_size) & (GUC_WQ_SIZE - 1));
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}
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@ -551,6 +546,25 @@ static void guc_ring_doorbell(struct i915_guc_client *client)
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GEM_BUG_ON(db->db_status != GUC_DOORBELL_ENABLED);
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}
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static void guc_add_request(struct intel_guc *guc,
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struct drm_i915_gem_request *rq)
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{
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struct i915_guc_client *client = guc->execbuf_client;
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struct intel_engine_cs *engine = rq->engine;
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u32 ctx_desc = lower_32_bits(intel_lr_context_descriptor(rq->ctx, engine));
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u32 ring_tail = intel_ring_set_tail(rq->ring, rq->tail) / sizeof(u64);
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spin_lock(&client->wq_lock);
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guc_wq_item_append(client, engine->guc_id, ctx_desc,
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ring_tail, rq->global_seqno);
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guc_ring_doorbell(client);
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client->submissions[engine->id] += 1;
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spin_unlock(&client->wq_lock);
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}
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/**
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* i915_guc_submit() - Submit commands through GuC
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* @engine: engine associated with the commands
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@ -562,10 +576,8 @@ static void i915_guc_submit(struct intel_engine_cs *engine)
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{
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struct drm_i915_private *dev_priv = engine->i915;
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struct intel_guc *guc = &dev_priv->guc;
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struct i915_guc_client *client = guc->execbuf_client;
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struct intel_engine_execlists * const execlists = &engine->execlists;
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struct execlist_port *port = execlists->port;
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const unsigned int engine_id = engine->id;
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unsigned int n;
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for (n = 0; n < execlists_num_ports(execlists); n++) {
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@ -579,14 +591,7 @@ static void i915_guc_submit(struct intel_engine_cs *engine)
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if (i915_vma_is_map_and_fenceable(rq->ring->vma))
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POSTING_READ_FW(GUC_STATUS);
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spin_lock(&client->wq_lock);
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guc_wq_item_append(client, rq);
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guc_ring_doorbell(client);
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client->submissions[engine_id] += 1;
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spin_unlock(&client->wq_lock);
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guc_add_request(guc, rq);
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}
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}
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}
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