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usb: gadget: net2280: check interrupts for all endpoints

Browse source 
USB3380 in enhanced mode has 4 IN and 4 OUT endpoints. Check
interrupts for all of them.

Tested-by: Ricardo Ribalda Delgado <ricardo.ribalda@gmail.com>
Signed-off-by: Mian Yousaf Kaukab <yousaf.kaukab@intel.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
This commit is contained in:
Mian Yousaf Kaukab 2015-05-16 22:33:35 +02:00 committed by Felipe Balbi
parent 463e104fb0
commit a09e23f53e
2 changed files with 46 additions and 12 deletions
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55
drivers/usb/gadget/udc/net2280.c
View file

@ -2883,6 +2883,26 @@ static void handle_stat0_irqs_superspeed(struct net2280 *dev,
return;
}
static void usb338x_handle_ep_intr(struct net2280 *dev, u32 stat0)
{
u32 index;
u32 bit;
for (index = 0; index < ARRAY_SIZE(ep_bit); index++) {
bit = BIT(ep_bit[index]);
if (!stat0)
break;
if (!(stat0 & bit))
continue;
stat0 &= ~bit;
handle_ep_small(&dev->ep[index]);
}
}
static void handle_stat0_irqs(struct net2280 *dev, u32 stat)
{
struct net2280_ep *ep;
@ -3107,20 +3127,31 @@ static void handle_stat0_irqs(struct net2280 *dev, u32 stat)
#undef w_length
next_endpoints:
/* endpoint data irq ? */
scratch = stat & 0x7f;
stat &= ~0x7f;
for (num = 0; scratch; num++) {
u32 t;
if ((dev->quirks & PLX_SUPERSPEED) && dev->enhanced_mode) {
u32 mask = (BIT(ENDPOINT_0_INTERRUPT) |
USB3380_IRQSTAT0_EP_INTR_MASK_IN |
USB3380_IRQSTAT0_EP_INTR_MASK_OUT);
/* do this endpoint's FIFO and queue need tending? */
t = BIT(num);
if ((scratch & t) == 0)
continue;
scratch ^= t;
if (stat & mask) {
usb338x_handle_ep_intr(dev, stat & mask);
stat &= ~mask;
}
} else {
/* endpoint data irq ? */
scratch = stat & 0x7f;
stat &= ~0x7f;
for (num = 0; scratch; num++) {
u32 t;
ep = &dev->ep[num];
handle_ep_small(ep);
/* do this endpoint's FIFO and queue need tending? */
t = BIT(num);
if ((scratch & t) == 0)
continue;
scratch ^= t;
ep = &dev->ep[num];
handle_ep_small(ep);
}
}
if (stat)

3
include/linux/usb/net2280.h
View file

@ -168,6 +168,9 @@ struct net2280_regs {
#define ENDPOINT_B_INTERRUPT 2
#define ENDPOINT_A_INTERRUPT 1
#define ENDPOINT_0_INTERRUPT 0
#define USB3380_IRQSTAT0_EP_INTR_MASK_IN (0xF << 17)
#define USB3380_IRQSTAT0_EP_INTR_MASK_OUT (0xF << 1)
u32 irqstat1;
#define POWER_STATE_CHANGE_INTERRUPT 27
#define PCI_ARBITER_TIMEOUT_INTERRUPT 26