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irqchip: mips-gic: Simplify gic_local_irq_domain_map()
Simplify gic_local_irq_domain_map() by: - Moving the check for invalid IRQs outside of the loop. - Moving the decision about whether to use gic_cpu_pin or timer_cpu_pin outside of the loop. - Using the new write_gic_vo_map() accessor function to avoid the need to handle each map register separately. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Acked-by: Marc Zyngier <marc.zyngier@arm.com> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/17027/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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parent
e98fcb2a8c
commit
a0dc5cb5e3
2 changed files with 16 additions and 47 deletions
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@ -498,58 +498,33 @@ static int gic_local_irq_domain_map(struct irq_domain *d, unsigned int virq,
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irq_hw_number_t hw)
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{
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int intr = GIC_HWIRQ_TO_LOCAL(hw);
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int ret = 0;
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int i;
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unsigned long flags;
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u32 val;
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if (!gic_local_irq_is_routable(intr))
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return -EPERM;
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if (intr > GIC_LOCAL_INT_FDC) {
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pr_err("Invalid local IRQ %d\n", intr);
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return -EINVAL;
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}
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if (intr == GIC_LOCAL_INT_TIMER) {
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/* CONFIG_MIPS_CMP workaround (see __gic_init) */
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val = GIC_MAP_PIN_MAP_TO_PIN | timer_cpu_pin;
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} else {
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val = GIC_MAP_PIN_MAP_TO_PIN | gic_cpu_pin;
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}
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spin_lock_irqsave(&gic_lock, flags);
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for (i = 0; i < gic_vpes; i++) {
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u32 val = GIC_MAP_TO_PIN_MSK | gic_cpu_pin;
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gic_write(GIC_REG(VPE_LOCAL, GIC_VPE_OTHER_ADDR),
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mips_cm_vp_id(i));
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switch (intr) {
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case GIC_LOCAL_INT_WD:
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gic_write32(GIC_REG(VPE_OTHER, GIC_VPE_WD_MAP), val);
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break;
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case GIC_LOCAL_INT_COMPARE:
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gic_write32(GIC_REG(VPE_OTHER, GIC_VPE_COMPARE_MAP),
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val);
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break;
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case GIC_LOCAL_INT_TIMER:
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/* CONFIG_MIPS_CMP workaround (see __gic_init) */
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val = GIC_MAP_TO_PIN_MSK | timer_cpu_pin;
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gic_write32(GIC_REG(VPE_OTHER, GIC_VPE_TIMER_MAP),
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val);
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break;
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case GIC_LOCAL_INT_PERFCTR:
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gic_write32(GIC_REG(VPE_OTHER, GIC_VPE_PERFCTR_MAP),
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val);
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break;
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case GIC_LOCAL_INT_SWINT0:
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gic_write32(GIC_REG(VPE_OTHER, GIC_VPE_SWINT0_MAP),
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val);
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break;
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case GIC_LOCAL_INT_SWINT1:
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gic_write32(GIC_REG(VPE_OTHER, GIC_VPE_SWINT1_MAP),
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val);
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break;
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case GIC_LOCAL_INT_FDC:
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gic_write32(GIC_REG(VPE_OTHER, GIC_VPE_FDC_MAP), val);
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break;
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default:
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pr_err("Invalid local IRQ %d\n", intr);
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ret = -EINVAL;
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break;
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}
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write_gic_vl_other(mips_cm_vp_id(i));
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write_gic_vo_map(intr, val);
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}
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spin_unlock_irqrestore(&gic_lock, flags);
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return ret;
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return 0;
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}
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static int gic_shared_irq_domain_map(struct irq_domain *d, unsigned int virq,
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@ -84,13 +84,7 @@
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#define GIC_VPE_MASK_OFS 0x0008
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#define GIC_VPE_RMASK_OFS 0x000c
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#define GIC_VPE_SMASK_OFS 0x0010
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#define GIC_VPE_WD_MAP_OFS 0x0040
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#define GIC_VPE_COMPARE_MAP_OFS 0x0044
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#define GIC_VPE_TIMER_MAP_OFS 0x0048
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#define GIC_VPE_FDC_MAP_OFS 0x004c
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#define GIC_VPE_PERFCTR_MAP_OFS 0x0050
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#define GIC_VPE_SWINT0_MAP_OFS 0x0054
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#define GIC_VPE_SWINT1_MAP_OFS 0x0058
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#define GIC_VPE_OTHER_ADDR_OFS 0x0080
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#define GIC_VPE_WD_CONFIG0_OFS 0x0090
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#define GIC_VPE_WD_COUNT0_OFS 0x0094
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