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ARM: bitops: ensure set/clear/change bitops take a word-aligned pointer
Add additional instructions to our assembly bitops functions to ensure that they only operate on word-aligned pointers. This will be necessary when we switch these operations to use the word-based exclusive operations. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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#if __LINUX_ARM_ARCH__ >= 6 && defined(CONFIG_CPU_32v6K)
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#if __LINUX_ARM_ARCH__ >= 6 && defined(CONFIG_CPU_32v6K)
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.macro bitop, instr
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.macro bitop, instr
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ands ip, r1, #3
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strneb r1, [ip] @ assert word-aligned
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mov r2, #1
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mov r2, #1
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and r3, r0, #7 @ Get bit offset
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and r3, r0, #7 @ Get bit offset
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add r1, r1, r0, lsr #3 @ Get byte offset
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add r1, r1, r0, lsr #3 @ Get byte offset
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@ -14,6 +16,8 @@
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.endm
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.endm
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.macro testop, instr, store
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.macro testop, instr, store
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ands ip, r1, #3
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strneb r1, [ip] @ assert word-aligned
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and r3, r0, #7 @ Get bit offset
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and r3, r0, #7 @ Get bit offset
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mov r2, #1
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mov r2, #1
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add r1, r1, r0, lsr #3 @ Get byte offset
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add r1, r1, r0, lsr #3 @ Get byte offset
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@ -32,6 +36,8 @@
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.endm
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.endm
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#else
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#else
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.macro bitop, instr
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.macro bitop, instr
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ands ip, r1, #3
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strneb r1, [ip] @ assert word-aligned
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and r2, r0, #7
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and r2, r0, #7
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mov r3, #1
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mov r3, #1
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mov r3, r3, lsl r2
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mov r3, r3, lsl r2
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@ -52,6 +58,8 @@
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* to avoid dirtying the data cache.
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* to avoid dirtying the data cache.
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*/
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*/
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.macro testop, instr, store
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.macro testop, instr, store
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ands ip, r1, #3
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strneb r1, [ip] @ assert word-aligned
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add r1, r1, r0, lsr #3
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add r1, r1, r0, lsr #3
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and r3, r0, #7
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and r3, r0, #7
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mov r0, #1
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mov r0, #1
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