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ASoC: nau8825: fix invalid configuration in Pre-Scalar of FLL
The clk_ref_div is not configured in the correct position of the register. The patch fixes that clk_ref_div, Pre-Scalar, is assigned the wrong value. Signed-off-by: John Hsu <KCHSU0@nuvoton.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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2 changed files with 4 additions and 2 deletions
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@ -2006,7 +2006,8 @@ static void nau8825_fll_apply(struct nau8825 *nau8825,
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NAU8825_FLL_INTEGER_MASK, fll_param->fll_int);
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/* FLL pre-scaler */
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regmap_update_bits(nau8825->regmap, NAU8825_REG_FLL4,
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NAU8825_FLL_REF_DIV_MASK, fll_param->clk_ref_div);
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NAU8825_FLL_REF_DIV_MASK,
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fll_param->clk_ref_div << NAU8825_FLL_REF_DIV_SFT);
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/* select divided VCO input */
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regmap_update_bits(nau8825->regmap, NAU8825_REG_FLL5,
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NAU8825_FLL_CLK_SW_MASK, NAU8825_FLL_CLK_SW_REF);
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@ -137,7 +137,8 @@
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#define NAU8825_FLL_CLK_SRC_FS (0x3 << NAU8825_FLL_CLK_SRC_SFT)
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/* FLL4 (0x07) */
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#define NAU8825_FLL_REF_DIV_MASK (0x3 << 10)
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#define NAU8825_FLL_REF_DIV_SFT 10
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#define NAU8825_FLL_REF_DIV_MASK (0x3 << NAU8825_FLL_REF_DIV_SFT)
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/* FLL5 (0x08) */
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#define NAU8825_FLL_PDB_DAC_EN (0x1 << 15)
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