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Code Issues Releases Wiki Activity

drm/nouveau/bios/therm: pointers are 32-bit

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Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
This commit is contained in:
Ben Skeggs 2016-11-18 11:20:32 +10:00
parent 8f6a5ab9b1
commit a215721fb6
1 changed files with 10 additions and 10 deletions
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20
drivers/gpu/drm/nouveau/nvkm/subdev/bios/therm.c
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@ -25,17 +25,17 @@
#include <subdev/bios/bit.h> #include <subdev/bios/bit.h>
#include <subdev/bios/therm.h> #include <subdev/bios/therm.h>
static u16 static u32
therm_table(struct nvkm_bios *bios, u8 *ver, u8 *hdr, u8 *len, u8 *cnt) therm_table(struct nvkm_bios *bios, u8 *ver, u8 *hdr, u8 *len, u8 *cnt)
{ {
struct bit_entry bit_P; struct bit_entry bit_P;
u16 therm = 0; u32 therm = 0;
if (!bit_entry(bios, 'P', &bit_P)) { if (!bit_entry(bios, 'P', &bit_P)) {
if (bit_P.version == 1) if (bit_P.version == 1)
therm = nvbios_rd16(bios, bit_P.offset + 12); therm = nvbios_rd32(bios, bit_P.offset + 12);
else if (bit_P.version == 2) else if (bit_P.version == 2)
therm = nvbios_rd16(bios, bit_P.offset + 16); therm = nvbios_rd32(bios, bit_P.offset + 16);
else else
nvkm_error(&bios->subdev, nvkm_error(&bios->subdev,
"unknown offset for thermal in BIT P %d\n", "unknown offset for thermal in BIT P %d\n",
@ -44,7 +44,7 @@ therm_table(struct nvkm_bios *bios, u8 *ver, u8 *hdr, u8 *len, u8 *cnt)
/* exit now if we haven't found the thermal table */ /* exit now if we haven't found the thermal table */
if (!therm) if (!therm)
return 0x0000; return 0;
*ver = nvbios_rd08(bios, therm + 0); *ver = nvbios_rd08(bios, therm + 0);
*hdr = nvbios_rd08(bios, therm + 1); *hdr = nvbios_rd08(bios, therm + 1);
@ -53,14 +53,14 @@ therm_table(struct nvkm_bios *bios, u8 *ver, u8 *hdr, u8 *len, u8 *cnt)
return therm + nvbios_rd08(bios, therm + 1); return therm + nvbios_rd08(bios, therm + 1);
} }
static u16 static u32
nvbios_therm_entry(struct nvkm_bios *bios, int idx, u8 *ver, u8 *len) nvbios_therm_entry(struct nvkm_bios *bios, int idx, u8 *ver, u8 *len)
{ {
u8 hdr, cnt; u8 hdr, cnt;
u16 therm = therm_table(bios, ver, &hdr, len, &cnt); u32 therm = therm_table(bios, ver, &hdr, len, &cnt);
if (therm && idx < cnt) if (therm && idx < cnt)
return therm + idx * *len; return therm + idx * *len;
return 0x0000; return 0;
} }
int int
@ -70,7 +70,7 @@ nvbios_therm_sensor_parse(struct nvkm_bios *bios,
{ {
s8 thrs_section, sensor_section, offset; s8 thrs_section, sensor_section, offset;
u8 ver, len, i; u8 ver, len, i;
u16 entry; u32 entry;
/* we only support the core domain for now */ /* we only support the core domain for now */
if (domain != NVBIOS_THERM_DOMAIN_CORE) if (domain != NVBIOS_THERM_DOMAIN_CORE)
@ -154,7 +154,7 @@ nvbios_therm_fan_parse(struct nvkm_bios *bios, struct nvbios_therm_fan *fan)
{ {
struct nvbios_therm_trip_point *cur_trip = NULL; struct nvbios_therm_trip_point *cur_trip = NULL;
u8 ver, len, i; u8 ver, len, i;
u16 entry; u32 entry;
uint8_t duty_lut[] = { 0, 0, 25, 0, 40, 0, 50, 0, uint8_t duty_lut[] = { 0, 0, 25, 0, 40, 0, 50, 0,
75, 0, 85, 0, 100, 0, 100, 0 }; 75, 0, 85, 0, 100, 0, 100, 0 };