drm/amd/pp: Simplify the create of powerplay instance

use adev as input parameter to create powerplay instance
directly. delete cgs wrap layer for power play create.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Rex Zhu 2018-02-26 19:58:49 +08:00 committed by Alex Deucher
parent 2eeb3a8399
commit a2c120ce6b
6 changed files with 20 additions and 53 deletions

View File

@ -42,27 +42,6 @@ struct amdgpu_cgs_device {
struct amdgpu_device *adev = \
((struct amdgpu_cgs_device *)cgs_device)->adev
static void *amdgpu_cgs_register_pp_handle(struct cgs_device *cgs_device,
int (*call_back_func)(struct amd_pp_init *, void **))
{
CGS_FUNC_ADEV;
struct amd_pp_init pp_init;
struct amd_powerplay *amd_pp;
if (call_back_func == NULL)
return NULL;
amd_pp = &(adev->powerplay);
pp_init.chip_family = adev->family;
pp_init.chip_id = adev->asic_type;
pp_init.pm_en = (amdgpu_dpm != 0 && !amdgpu_sriov_vf(adev)) ? true : false;
pp_init.feature_mask = amdgpu_pp_feature_mask;
pp_init.device = cgs_device;
if (call_back_func(&pp_init, &(amd_pp->pp_handle)))
return NULL;
return adev->powerplay.pp_handle;
}
static int amdgpu_cgs_alloc_gpu_mem(struct cgs_device *cgs_device,
enum cgs_gpu_mem_type type,
@ -1233,7 +1212,6 @@ static const struct cgs_ops amdgpu_cgs_ops = {
.is_virtualization_enabled = amdgpu_cgs_is_virtualization_enabled,
.enter_safe_mode = amdgpu_cgs_enter_safe_mode,
.lock_grbm_idx = amdgpu_cgs_lock_grbm_idx,
.register_pp_handle = amdgpu_cgs_register_pp_handle,
.set_temperature_range = amdgpu_cgs_set_temperature_range,
};

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@ -94,9 +94,7 @@ static int amdgpu_pp_early_init(void *handle)
}
if (adev->powerplay.ip_funcs->early_init)
ret = adev->powerplay.ip_funcs->early_init(
amd_pp->cgs_device ? amd_pp->cgs_device :
amd_pp->pp_handle);
ret = adev->powerplay.ip_funcs->early_init(adev);
return ret;
}

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@ -424,10 +424,6 @@ typedef int (*cgs_enter_safe_mode)(struct cgs_device *cgs_device, bool en);
typedef void (*cgs_lock_grbm_idx)(struct cgs_device *cgs_device, bool lock);
struct amd_pp_init;
typedef void* (*cgs_register_pp_handle)(struct cgs_device *cgs_device,
int (*call_back_func)(struct amd_pp_init *, void **));
typedef int (*cgs_set_temperature_range)(struct cgs_device *cgs_device,
int min_temperature,
int max_temperature);
@ -467,7 +463,6 @@ struct cgs_ops {
cgs_is_virtualization_enabled_t is_virtualization_enabled;
cgs_enter_safe_mode enter_safe_mode;
cgs_lock_grbm_idx lock_grbm_idx;
cgs_register_pp_handle register_pp_handle;
cgs_set_temperature_range set_temperature_range;
};
@ -547,8 +542,6 @@ struct cgs_device
#define cgs_lock_grbm_idx(cgs_device, lock) \
CGS_CALL(lock_grbm_idx, cgs_device, lock)
#define cgs_register_pp_handle(cgs_device, call_back_func) \
CGS_CALL(register_pp_handle, cgs_device, call_back_func)
#define cgs_set_temperature_range(dev, min_temp, max_temp) \
CGS_CALL(set_temperature_range, dev, min_temp, max_temp)

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@ -136,14 +136,6 @@ enum amd_pp_task {
AMD_PP_TASK_MAX
};
struct amd_pp_init {
struct cgs_device *device;
uint32_t chip_family;
uint32_t chip_id;
bool pm_en;
uint32_t feature_mask;
};
enum PP_SMC_POWER_PROFILE {
PP_SMC_POWER_PROFILE_FULLSCREEN3D = 0x0,
PP_SMC_POWER_PROFILE_POWERSAVING = 0x1,

View File

@ -29,6 +29,7 @@
#include "amd_powerplay.h"
#include "pp_instance.h"
#include "power_state.h"
#include "amdgpu.h"
#define PP_DPM_DISABLED 0xCCCC
@ -52,28 +53,30 @@ static inline int pp_check(struct pp_instance *handle)
return 0;
}
static int amd_powerplay_create(struct amd_pp_init *pp_init,
void **handle)
static int amd_powerplay_create(struct amdgpu_device *adev)
{
struct pp_instance *instance;
if (pp_init == NULL || handle == NULL)
if (adev == NULL)
return -EINVAL;
instance = kzalloc(sizeof(struct pp_instance), GFP_KERNEL);
if (instance == NULL)
return -ENOMEM;
instance->chip_family = pp_init->chip_family;
instance->chip_id = pp_init->chip_id;
instance->pm_en = pp_init->pm_en;
instance->feature_mask = pp_init->feature_mask;
instance->device = pp_init->device;
instance->chip_family = adev->family;
instance->chip_id = adev->asic_type;
instance->pm_en = (amdgpu_dpm != 0 && !amdgpu_sriov_vf(adev)) ? true : false;
instance->feature_mask = amdgpu_pp_feature_mask;
instance->device = adev->powerplay.cgs_device;
mutex_init(&instance->pp_lock);
*handle = instance;
adev->powerplay.pp_handle = instance;
return 0;
}
static int amd_powerplay_destroy(void *handle)
{
struct pp_instance *instance = (struct pp_instance *)handle;
@ -93,11 +96,14 @@ static int pp_early_init(void *handle)
{
int ret;
struct pp_instance *pp_handle = NULL;
struct amdgpu_device *adev = (struct amdgpu_device *)handle;
pp_handle = cgs_register_pp_handle(handle, amd_powerplay_create);
ret = amd_powerplay_create(adev);
if (!pp_handle)
return -EINVAL;
if (ret != 0)
return ret;
pp_handle = adev->powerplay.pp_handle;
ret = hwmgr_early_init(pp_handle);
if (ret)

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@ -30,6 +30,6 @@
#include "cgs_common.h"
#include "dm_pp_interface.h"
#include "kgd_pp_interface.h"
#include "amdgpu.h"
#endif /* _AMD_POWERPLAY_H_ */