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dt-bindings: net: mscc-miim: add lan966x compatible

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The MDIO controller has support to release the internal PHYs from reset
by specifying a second memory resource. This is different between the
currently supported SparX-5 and the LAN966x. Add a new compatible to
distinguish between these two.

Signed-off-by: Michael Walle <michael@walle.cc>
Acked-by: Horatiu Vultur <horatiu.vultur@microchip.com>
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
This commit is contained in:
Michael Walle 2022-03-18 21:13:22 +01:00 committed by Jakub Kicinski
parent c050f5e91b
commit a2e4b5adfd
1 changed files with 1 additions and 1 deletions
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2
Documentation/devicetree/bindings/net/mscc-miim.txt
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@ -2,7 +2,7 @@ Microsemi MII Management Controller (MIIM) / MDIO
=================================================
Properties:
- compatible: must be "mscc,ocelot-miim"
- compatible: must be "mscc,ocelot-miim" or "microchip,lan966x-miim"
- reg: The base address of the MDIO bus controller register bank. Optionally, a
second register bank can be defined if there is an associated reset register
for internal PHYs